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	Fixed MTP to work with TWRP
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								Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt
									
										
									
									
									
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								Documentation/devicetree/bindings/i2c/i2c-hix5hd2.txt
									
										
									
									
									
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							|  | @ -0,0 +1,24 @@ | |||
| I2C for Hisilicon hix5hd2 chipset platform | ||||
| 
 | ||||
| Required properties: | ||||
| - compatible: Must be "hisilicon,hix5hd2-i2c" | ||||
| - reg: physical base address of the controller and length of memory mapped | ||||
|      region. | ||||
| - interrupts: interrupt number to the cpu. | ||||
| - #address-cells = <1>; | ||||
| - #size-cells = <0>; | ||||
| - clocks: phandles to input clocks. | ||||
| 
 | ||||
| Optional properties: | ||||
| - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000 | ||||
| - Child nodes conforming to i2c bus binding | ||||
| 
 | ||||
| Examples: | ||||
| I2C0@f8b10000 { | ||||
| 	compatible = "hisilicon,hix5hd2-i2c"; | ||||
| 	reg = <0xf8b10000 0x1000>; | ||||
| 	interrupts = <0 38 4>; | ||||
| 	clocks = <&clock HIX5HD2_I2C0_RST>; | ||||
| 	#address-cells = <1>; | ||||
| 	#size-cells = <0>; | ||||
| } | ||||
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