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Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
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35
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Analog Devices ADAU1701
Required properties:
- compatible: Should contain "adi,adau1701"
- reg: The i2c address. Value depends on the state of ADDR0
and ADDR1, as wired in hardware.
Optional properties:
- reset-gpio: A GPIO spec to define which pin is connected to the
chip's !RESET pin. If specified, the driver will
assert a hardware reset at probe time.
- adi,pll-mode-gpios: An array of two GPIO specs to describe the GPIOs
the ADAU's PLL config pins are connected to.
The state of the pins are set according to the
configured clock divider on ASoC side before the
firmware is loaded.
- adi,pin-config: An array of 12 numerical values selecting one of the
pin configurations as described in the datasheet,
table 53. Note that the value of this property has
to be prefixed with '/bits/ 8'.
Examples:
i2c_bus {
adau1701@34 {
compatible = "adi,adau1701";
reg = <0x34>;
reset-gpio = <&gpio 23 0>;
adi,pll-mode-gpios = <&gpio 24 0 &gpio 25 0>;
adi,pin-config = /bits/ 8 <0x4 0x7 0x5 0x5 0x4 0x4
0x4 0x4 0x4 0x4 0x4 0x4>;
};
};

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ADI AXI-I2S controller
Required properties:
- compatible : Must be "adi,axi-i2s-1.00.a"
- reg : Must contain I2S core's registers location and length
- clocks : Pairs of phandle and specifier referencing the controller's clocks.
The controller expects two clocks, the clock used for the AXI interface and
the clock used as the sampling rate reference clock sample.
- clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
rate reference clock.
- dmas: Pairs of phandle and specifier for the DMA channels that are used by
the core. The core expects two dma channels, one for transmit and one for
receive.
- dma-names : "tx" for the transmit channel, "rx" for the receive channel.
For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
please check:
* resource-names.txt
* clock/clock-bindings.txt
* dma/dma.txt
Example:
i2s: i2s@0x77600000 {
compatible = "adi,axi-i2s-1.00.a";
reg = <0x77600000 0x1000>;
clocks = <&clk 15>, <&audio_clock>;
clock-names = "axi", "ref";
dmas = <&ps7_dma 0>, <&ps7_dma 1>;
dma-names = "tx", "rx";
};

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ADI AXI-SPDIF controller
Required properties:
- compatible : Must be "adi,axi-spdif-tx-1.00.a"
- reg : Must contain SPDIF core's registers location and length
- clocks : Pairs of phandle and specifier referencing the controller's clocks.
The controller expects two clocks, the clock used for the AXI interface and
the clock used as the sampling rate reference clock sample.
- clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
rate reference clock.
- dmas: Pairs of phandle and specifier for the DMA channel that is used by
the core. The core expects one dma channel for transmit.
- dma-names : Must be "tx"
For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
please check:
* resource-names.txt
* clock/clock-bindings.txt
* dma/dma.txt
Example:
spdif: spdif@0x77400000 {
compatible = "adi,axi-spdif-tx-1.00.a";
reg = <0x77600000 0x1000>;
clocks = <&clk 15>, <&audio_clock>;
clock-names = "axi", "ref";
dmas = <&ps7_dma 0>;
dma-names = "tx";
};

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Analog Devices SSM2602, SSM2603 and SSM2604 I2S audio CODEC devices
SSM2602 support both I2C and SPI as the configuration interface,
the selection is made by the MODE strap-in pin.
SSM2603 and SSM2604 only support I2C as the configuration interface.
Required properties:
- compatible : One of "adi,ssm2602", "adi,ssm2603" or "adi,ssm2604"
- reg : the I2C address of the device for I2C, the chip select
number for SPI.
Example:
ssm2602: ssm2602@1a {
compatible = "adi,ssm2602";
reg = <0x1a>;
};

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AK4104 S/PDIF transmitter
This device supports SPI mode only.
Required properties:
- compatible : "asahi-kasei,ak4104"
- reg : The chip select number on the SPI bus
- vdd-supply : A regulator node, providing 2.7V - 3.6V
Optional properties:
- reset-gpio : a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the device starts.
Example:
spdif: ak4104@0 {
compatible = "asahi-kasei,ak4104";
reg = <0>;
spi-max-frequency = <5000000>;
vdd-supply = <&vdd_3v3_reg>;
};

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AK4554 ADC/DAC
Required properties:
- compatible : "asahi-kasei,ak4554"
Example:
ak4554-adc-dac {
compatible = "asahi-kasei,ak4554";
};

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AK4642 I2C transmitter
This device supports I2C mode only.
Required properties:
- compatible : "asahi-kasei,ak4642" or "asahi-kasei,ak4643" or "asahi-kasei,ak4648"
- reg : The chip select number on the I2C bus
Example:
&i2c {
ak4648: ak4648@0x12 {
compatible = "asahi-kasei,ak4642";
reg = <0x12>;
};
};

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AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC
This device has no control interface.
Required properties:
- compatible : "asahi-kasei,ak5386"
Optional properties:
- reset-gpio : a GPIO spec for the reset/power down pin.
If specified, it will be deasserted at probe time.
- va-supply : a regulator spec, providing 5.0V
- vd-supply : a regulator spec, providing 3.3V
Example:
spdif: ak5386@0 {
compatible = "asahi-kasei,ak5386";
reset-gpio = <&gpio0 23>;
va-supply = <&vdd_5v0_reg>;
vd-supply = <&vdd_3v3_reg>;
};

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ALC5621/ALC5622/ALC5623 audio Codec
Required properties:
- compatible: "realtek,alc5623"
- reg: the I2C address of the device.
Optional properties:
- add-ctrl: Default register value for Reg-40h, Additional Control
Register. If absent or has the value of 0, the
register is untouched.
- jack-det-ctrl: Default register value for Reg-5Ah, Jack Detect
Control Register. If absent or has value 0, the
register is untouched.
Example:
alc5621: alc5621@1a {
compatible = "alc5621";
reg = <0x1a>;
add-ctrl = <0x3700>;
jack-det-ctrl = <0x4810>;
};

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ALC5632 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "realtek,alc5632"
- reg : the I2C address of the device.
- gpio-controller : Indicates this device is a GPIO controller.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
Pins on the device (for linking into audio routes):
* SPK_OUTP
* SPK_OUTN
* HP_OUT_L
* HP_OUT_R
* AUX_OUT_P
* AUX_OUT_N
* LINE_IN_L
* LINE_IN_R
* PHONE_P
* PHONE_N
* MIC1_P
* MIC1_N
* MIC2_P
* MIC2_N
* MICBIAS1
* DMICDAT
Example:
alc5632: alc5632@1e {
compatible = "realtek,alc5632";
reg = <0x1a>;
gpio-controller;
#gpio-cells = <2>;
};

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Device Tree bindings for the Armada 370 DB audio
================================================
These Device Tree bindings are used to describe the audio complex
found on the Armada 370 DB platform.
Mandatory properties:
* compatible: must be "marvell,a370db-audio"
* marvell,audio-controller: a phandle that points to the audio
controller of the Armada 370 SoC.
* marvell,audio-codec: a set of three phandles that points to:
1/ the analog audio codec connected to the Armada 370 SoC
2/ the S/PDIF transceiver
3/ the S/PDIF receiver
Example:
sound {
compatible = "marvell,a370db-audio";
marvell,audio-controller = <&audio_controller>;
marvell,audio-codec = <&audio_codec &spdif_out &spdif_in>;
status = "okay";
};

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* Atmel at91sam9g20ek wm8731 audio complex
Required properties:
- compatible: "atmel,at91sam9g20ek-wm8731-audio"
- atmel,model: The user-visible name of this sound complex.
- atmel,audio-routing: A list of the connections between audio components.
- atmel,ssc-controller: The phandle of the SSC controller
- atmel,audio-codec: The phandle of the WM8731 audio codec
Optional properties:
- pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt
Example:
sound {
compatible = "atmel,at91sam9g20ek-wm8731-audio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_mck>;
atmel,model = "wm8731 @ AT91SAMG20EK";
atmel,audio-routing =
"Ext Spk", "LHPOUT",
"Int MIC", "MICIN";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8731>;
};

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* Atmel at91sam9x5ek wm8731 audio complex
Required properties:
- compatible: "atmel,sam9x5-wm8731-audio"
- atmel,model: The user-visible name of this sound complex.
- atmel,ssc-controller: The phandle of the SSC controller
- atmel,audio-codec: The phandle of the WM8731 audio codec
- atmel,audio-routing: A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source.
Available audio endpoints for the audio-routing table:
Board connectors:
* Headphone Jack
* Line In Jack
wm8731 pins:
cf Documentation/devicetree/bindings/sound/wm8731.txt
Example:
sound {
compatible = "atmel,sam9x5-wm8731-audio";
atmel,model = "wm8731 @ AT91SAM9X5EK";
atmel,audio-routing =
"Headphone Jack", "RHPOUT",
"Headphone Jack", "LHPOUT",
"LLINEIN", "Line In Jack",
"RLINEIN", "Line In Jack";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8731>;
};

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Atmel ASoC driver with wm8904 audio codec complex
Required properties:
- compatible: "atmel,asoc-wm8904"
- atmel,model: The user-visible name of this sound complex.
- atmel,audio-routing: A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the WM8904's pins, and the jacks on the board:
WM8904 pins:
* IN1L
* IN1R
* IN2L
* IN2R
* IN3L
* IN3R
* HPOUTL
* HPOUTR
* LINEOUTL
* LINEOUTR
* MICBIAS
Board connectors:
* Headphone Jack
* Line In Jack
* Mic
- atmel,ssc-controller: The phandle of the SSC controller
- atmel,audio-codec: The phandle of the WM8904 audio codec
Optional properties:
- pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt
Example:
sound {
compatible = "atmel,asoc-wm8904";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck0_as_mck>;
atmel,model = "wm8904 @ AT91SAM9N12EK";
atmel,audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"Mic", "MICBIAS",
"IN1L", "Mic";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8904>;
};

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* Broadcom BCM2835 SoC I2S/PCM module
Required properties:
- compatible: "brcm,bcm2835-i2s"
- reg: A list of base address and size entries:
* The first entry should cover the PCM registers
* The second entry should cover the PCM clock registers
- dmas: List of DMA controller phandle and DMA request line ordered pairs.
- dma-names: Identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas.
One of the DMA channels will be responsible for transmission (should be
named "tx") and one for reception (should be named "rx").
Example:
bcm2835_i2s: i2s@7e203000 {
compatible = "brcm,bcm2835-i2s";
reg = <0x7e203000 0x20>,
<0x7e101098 0x02>;
dmas = <&dma 2>,
<&dma 3>;
dma-names = "tx", "rx";
};

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CS35L32 audio CODEC
Required properties:
- compatible : "cirrus,cs35l32"
- reg : the I2C address of the device for I2C. Address is determined by the level
of the AD0 pin. Level 0 is 0x40 while Level 1 is 0x41.
- VA-supply, VP-supply : power supplies for the device,
as covered in Documentation/devicetree/bindings/regulator/regulator.txt.
Optional properties:
- reset-gpios : a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the codec starts.
- cirrus,boost-manager : Boost voltage control.
0 = Automatically managed. Boost-converter output voltage is the higher
of the two: Class G or adaptive LED voltage.
1 = Automatically managed irrespective of audio, adapting for low-power
dissipation when LEDs are ON, and operating in Fixed-Boost Bypass Mode
if LEDs are OFF (VBST = VP).
2 = (Default) Boost voltage fixed in Bypass Mode (VBST = VP).
3 = Boost voltage fixed at 5 V.
- cirrus,sdout-datacfg : Data configuration for dual CS35L32 applications only.
Determines the data packed in a two-CS35L32 configuration.
0 = Left/right channels VMON[11:0], IMON[11:0], VPMON[7:0].
1 = Left/right channels VMON[11:0], IMON[11:0], STATUS.
2 = (Default) left/right channels VMON[15:0], IMON [15:0].
3 = Left/right channels VPMON[7:0], STATUS.
- cirrus,sdout-share : SDOUT sharing. Determines whether one or two CS35L32
devices are on board sharing SDOUT.
0 = (Default) One IC.
1 = Two IC's.
- cirrus,battery-recovery : Low battery nominal recovery threshold, rising VP.
0 = 3.1V
1 = 3.2V
2 = 3.3V (Default)
3 = 3.4V
- cirrus,battery-threshold : Low battery nominal threshold, falling VP.
0 = 3.1V
1 = 3.2V
2 = 3.3V
3 = 3.4V (Default)
4 = 3.5V
5 = 3.6V
Example:
codec: codec@40 {
compatible = "cirrus,cs35l32";
reg = <0x40>;
reset-gpios = <&gpio 10 0>;
cirrus,boost-manager = <0x03>;
cirrus,sdout-datacfg = <0x02>;
VA-supply = <&reg_audio>;
};

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CS4265 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "cirrus,cs4265"
- reg : the I2C address of the device for I2C. The I2C address depends on
the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f.
If it is low, the i2c address is 0x4e.
Optional properties:
- reset-gpios : a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the codec starts.
Examples:
codec_ad0_high: cs4265@4f { /* AD0 Pin is high */
compatible = "cirrus,cs4265";
reg = <0x4f>;
};
codec_ad0_low: cs4265@4e { /* AD0 Pin is low */
compatible = "cirrus,cs4265";
reg = <0x4e>;
};

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CS4270 audio CODEC
The driver for this device currently only supports I2C.
Required properties:
- compatible : "cirrus,cs4270"
- reg : the I2C address of the device for I2C
Optional properties:
- reset-gpio : a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the codec starts.
Example:
codec: cs4270@48 {
compatible = "cirrus,cs4270";
reg = <0x48>;
};

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Cirrus Logic CS4271 DT bindings
This driver supports both the I2C and the SPI bus.
Required properties:
- compatible: "cirrus,cs4271"
For required properties on SPI, please consult
Documentation/devicetree/bindings/spi/spi-bus.txt
Required properties on I2C:
- reg: the i2c address
Optional properties:
- reset-gpio: a GPIO spec to define which pin is connected to the chip's
!RESET pin
- cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
is enabled.
- cirrus,enable-soft-reset:
The CS4271 requires its LRCLK and MCLK to be stable before its RESET
line is de-asserted. That also means that clocks cannot be changed
without putting the chip back into hardware reset, which also requires
a complete re-initialization of all registers.
One (undocumented) workaround is to assert and de-assert the PDN bit
in the MODE2 register. This workaround can be enabled with this DT
property.
Note that this is not needed in case the clocks are stable
throughout the entire runtime of the codec.
Examples:
codec_i2c: cs4271@10 {
compatible = "cirrus,cs4271";
reg = <0x10>;
reset-gpio = <&gpio 23 0>;
};
codec_spi: cs4271@0 {
compatible = "cirrus,cs4271";
reg = <0x0>;
reset-gpio = <&gpio 23 0>;
spi-max-frequency = <6000000>;
};

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CS42L52 audio CODEC
Required properties:
- compatible : "cirrus,cs42l52"
- reg : the I2C address of the device for I2C
Optional properties:
- cirrus,reset-gpio : GPIO controller's phandle and the number
of the GPIO used to reset the codec.
- cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
Allowable values of 0x00 through 0x0F. These are raw values written to the
register, not the actual frequency. The frequency is determined by the following.
Frequency = (64xFs)/(N+2)
N = chgfreq_val
Fs = Sample Rate (variable)
- cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
as a differential input. If not present then the MICA input is configured as
Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
- cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
as a differential input. If not present then the MICB input is configured as
Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
- cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin
0 = 0.5 x VA
1 = 0.6 x VA
2 = 0.7 x VA
3 = 0.8 x VA
4 = 0.83 x VA
5 = 0.91 x VA
Example:
codec: codec@4a {
compatible = "cirrus,cs42l52";
reg = <0x4a>;
reset-gpio = <&gpio 10 0>;
cirrus,chgfreq-divisor = <0x05>;
cirrus.mica-differential-cfg;
cirrus,micbias-lvl = <5>;
};

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CS42L52 audio CODEC
Required properties:
- compatible : "cirrus,cs42l56"
- reg : the I2C address of the device for I2C
- VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
as covered in Documentation/devicetree/bindings/regulator/regulator.txt.
Optional properties:
- cirrus,gpio-nreset : GPIO controller's phandle and the number
of the GPIO used to reset the codec.
- cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
Allowable values of 0x00 through 0x0F. These are raw values written to the
register, not the actual frequency. The frequency is determined by the following.
Frequency = MCLK / 4 * (N+2)
N = chgfreq_val
MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
- cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
as a pseudo-differential input referenced to AIN1REF/AIN3A.
- cirrus,ain2a-ref-cfg, ain2b-ref-cfg : boolean, If present, AIN2A or AIN2B are configured
as a pseudo-differential input referenced to AIN2REF/AIN3B.
- cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin.
0 = 0.5 x VA
1 = 0.6 x VA
2 = 0.7 x VA
3 = 0.8 x VA
4 = 0.83 x VA
5 = 0.91 x VA
- cirrus,adaptive-pwr-cfg : Configures how the power to the Headphone and Lineout
Amplifiers adapt to the output signal levels.
0 = Adapt to Volume Mode. Voltage level determined by the sum of the relevant volume settings.
1 = Fixed - Headphone and Line Amp supply = + or - VCP/2.
2 = Fixed - Headphone and Line Amp supply = + or - VCP.
3 = Adapted to Signal; Voltage level is dynamically determined by the output signal.
- cirrus,hpf-left-freq, hpf-right-freq : Sets the corner frequency (-3dB point) for the internal High-Pass
Filter.
0 = 1.8Hz
1 = 119Hz
2 = 236Hz
3 = 464Hz
Example:
codec: codec@4b {
compatible = "cirrus,cs42l56";
reg = <0x4b>;
gpio-reset = <&gpio 10 0>;
cirrus,chgfreq-divisor = <0x05>;
cirrus.ain1_ref_cfg;
cirrus,micbias-lvl = <5>;
VA-supply = <&reg_audio>;
};

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CS42L73 audio CODEC
Required properties:
- compatible : "cirrus,cs42l73"
- reg : the I2C address of the device for I2C
Optional properties:
- reset_gpio : a GPIO spec for the reset pin.
- chgfreq : Charge Pump Frequency values 0x00-0x0F
Example:
codec: cs42l73@4a {
compatible = "cirrus,cs42l73";
reg = <0x4a>;
reset_gpio = <&gpio 10 0>;
chgfreq = <0x05>;
};

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CS42448/CS42888 audio CODEC
Required properties:
- compatible : must contain one of "cirrus,cs42448" and "cirrus,cs42888"
- reg : the I2C address of the device for I2C
- clocks : a list of phandles + clock-specifiers, one for each entry in
clock-names
- clock-names : must contain "mclk"
- VA-supply, VD-supply, VLS-supply, VLC-supply: power supplies for the device,
as covered in Documentation/devicetree/bindings/regulator/regulator.txt
Example:
codec: cs42888@48 {
compatible = "cirrus,cs42888";
reg = <0x48>;
clocks = <&codec_mclk 0>;
clock-names = "mclk";
VA-supply = <&reg_audio>;
VD-supply = <&reg_audio>;
VLS-supply = <&reg_audio>;
VLC-supply = <&reg_audio>;
};

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* Dialog DA9055 Audio CODEC
DA9055 provides Audio CODEC support (I2C only).
The Audio CODEC device in DA9055 has it's own I2C address which is configurable,
so the device is instantiated separately from the PMIC (MFD) device.
For details on accompanying PMIC I2C device, see the following:
Documentation/devicetree/bindings/mfd/da9055.txt
Required properties:
- compatible: "dlg,da9055-codec"
- reg: Specifies the I2C slave address
Example:
codec: da9055-codec@1a {
compatible = "dlg,da9055-codec";
reg = <0x1a>;
};

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* Texas Instruments SoC audio setups with TLV320AIC3X Codec
Required properties:
- compatible : "ti,da830-evm-audio" : forDM365/DA8xx/OMAPL1x/AM33xx
- ti,model : The user-visible name of this sound complex.
- ti,audio-codec : The phandle of the TLV320AIC3x audio codec
- ti,mcasp-controller : The phandle of the McASP controller
- ti,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the codec's pins, and the jacks on the board:
Optional properties:
- ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec.
- clocks : Reference to the master clock
- clock-names : The clock should be named "mclk"
- Either codec-clock-rate or the codec-clock reference has to be defined. If
the both are defined the driver attempts to set referenced clock to the
defined rate and takes the rate from the clock reference.
Board connectors:
* Headphone Jack
* Line Out
* Mic Jack
* Line In
Example:
sound {
compatible = "ti,da830-evm-audio";
ti,model = "DA830 EVM";
ti,audio-codec = <&tlv320aic3x>;
ti,mcasp-controller = <&mcasp1>;
ti,codec-clock-rate = <12000000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"Line Out", "LLOUT",
"Line Out", "RLOUT",
"MIC3L", "Mic Bias 2V",
"MIC3R", "Mic Bias 2V",
"Mic Bias 2V", "Mic Jack",
"LINE1L", "Line In",
"LINE2L", "Line In",
"LINE1R", "Line In",
"LINE2R", "Line In";
};

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Texas Instruments McASP controller
Required properties:
- compatible :
"ti,dm646x-mcasp-audio" : for DM646x platforms
"ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
"ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx)
"ti,dra7-mcasp-audio" : for DRA7xx platforms
- reg : Should contain reg specifiers for the entries in the reg-names property.
- reg-names : Should contain:
* "mpu" for the main registers (required). For compatibility with
existing software, it is recommended this is the first entry.
* "dat" for separate data port register access (optional).
- op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF,
IEC60958-1, and AES-3 formats.
- tdm-slots : Slots for TDM operation. Indicates number of channels transmitted
or received over one serializer.
- serial-dir : A list of serializer configuration. Each entry is a number
indication for serializer pin direction.
(0 - INACTIVE, 1 - TX, 2 - RX)
- dmas: two element list of DMA controller phandles and DMA request line
ordered pairs.
- dma-names: identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas. The dma
identifiers must be "rx" and "tx".
Optional properties:
- ti,hwmods : Must be "mcasp<n>", n is controller instance starting 0
- tx-num-evt : FIFO levels.
- rx-num-evt : FIFO levels.
- sram-size-playback : size of sram to be allocated during playback
- sram-size-capture : size of sram to be allocated during capture
- interrupts : Interrupt numbers for McASP, currently not used by the driver
- interrupt-names : Known interrupt names are "tx" and "rx"
- pinctrl-0: Should specify pin control group used for this controller.
- pinctrl-names: Should contain only one value - "default", for more details
please refer to pinctrl-bindings.txt
- fck_parent : Should contain a valid clock name which will be used as parent
for the McASP fck
Example:
mcasp0: mcasp0@1d00000 {
compatible = "ti,da830-mcasp-audio";
reg = <0x100000 0x3000>;
reg-names "mpu";
interrupts = <82>, <83>;
interrupt-names = "tx", "rx";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = <
0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */
0 0 0 0
0 0 0 1
2 0 0 0 >;
tx-num-evt = <1>;
rx-num-evt = <1>;
};

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Everest ES8328 audio CODEC
This device supports both I2C and SPI.
Required properties:
- compatible : "everest,es8328"
- DVDD-supply : Regulator providing digital core supply voltage 1.8 - 3.6V
- AVDD-supply : Regulator providing analog supply voltage 3.3V
- PVDD-supply : Regulator providing digital IO supply voltage 1.8 - 3.6V
- IPVDD-supply : Regulator providing analog output voltage 3.3V
- clocks : A 22.5792 or 11.2896 MHz clock
- reg : the I2C address of the device for I2C, the chip select number for SPI
Pins on the device (for linking into audio routes):
* LOUT1
* LOUT2
* ROUT1
* ROUT2
* LINPUT1
* RINPUT1
* LINPUT2
* RINPUT2
* Mic Bias
Example:
codec: es8328@11 {
compatible = "everest,es8328";
DVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
PVDD-supply = <&reg_3p3v>;
HPVDD-supply = <&reg_3p3v>;
clocks = <&clks 169>;
reg = <0x11>;
};

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Audio complex for Eukrea boards with tlv320aic23 codec.
Required properties:
- compatible : "eukrea,asoc-tlv320"
- eukrea,model : The user-visible name of this sound complex.
- ssi-controller : The phandle of the SSI controller.
- fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
- fsl,mux-ext-port : The external port of the i.MX audio muxer.
Note: The AUDMUX port numbering should start at 1, which is consistent with
hardware manual.
Example:
sound {
compatible = "eukrea,asoc-tlv320";
eukrea,model = "imx51-eukrea-tlv320aic23";
ssi-controller = <&ssi2>;
fsl,mux-int-port = <2>;
fsl,mux-ext-port = <3>;
};

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Freescale Asynchronous Sample Rate Converter (ASRC) Controller
The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
signal associated with an input clock into a signal associated with a different
output clock. The driver currently works as a Front End of DPCM with other Back
Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support
three substreams within totally 10 channels.
Required properties:
- compatible : Contains "fsl,imx35-asrc" or "fsl,imx53-asrc".
- reg : Offset and length of the register set for the device.
- interrupts : Contains the spdif interrupt.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc".
- clocks : Contains an entry for each entry in clock-names.
- clock-names : Contains the following entries
"mem" Peripheral access clock to access registers.
"ipg" Peripheral clock to driver module.
"asrck_<0-f>" Clock sources for input and output clock.
- big-endian : If this property is absent, the little endian mode
will be in use as default. Otherwise, the big endian
mode will be in use for all the device registers.
- fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends.
- fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends.
Example:
asrc: asrc@02034000 {
compatible = "fsl,imx53-asrc";
reg = <0x02034000 0x4000>;
interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 107>, <&clks 107>, <&clks 0>,
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
<&clks 107>, <&clks 0>, <&clks 0>;
clock-names = "mem", "ipg", "asrck0",
"asrck_1", "asrck_2", "asrck_3", "asrck_4",
"asrck_5", "asrck_6", "asrck_7", "asrck_8",
"asrck_9", "asrck_a", "asrck_b", "asrck_c",
"asrck_d", "asrck_e", "asrck_f";
dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
dma-names = "rxa", "rxb", "rxc",
"txa", "txb", "txc";
fsl,asrc-rate = <48000>;
fsl,asrc-width = <16>;
status = "okay";
};

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Freescale Enhanced Serial Audio Interface (ESAI) Controller
The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
for serial communication with a variety of serial devices, including industry
standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and
other DSPs. It has up to six transmitters and four receivers.
Required properties:
- compatible : Compatible list, must contain "fsl,imx35-esai" or
"fsl,vf610-esai"
- reg : Offset and length of the register set for the device.
- interrupts : Contains the spdif interrupt.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names : Two dmas have to be defined, "tx" and "rx".
- clocks: Contains an entry for each entry in clock-names.
- clock-names : Includes the following entries:
"core" The core clock used to access registers
"extal" The esai baud clock for esai controller used to derive
HCK, SCK and FS.
"fsys" The system clock derived from ahb clock used to derive
HCK, SCK and FS.
- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
This number is the maximum allowed value for TFCR[TFWM] or RFCR[RFWM].
- fsl,esai-synchronous: This is a boolean property. If present, indicating
that ESAI would work in the synchronous mode, which means all the settings
for Receiving would be duplicated from Transmition related registers.
- big-endian : If this property is absent, the native endian mode will
be in use as default, or the big endian mode will be in use for all the
device registers.
Example:
esai: esai@02024000 {
compatible = "fsl,imx35-esai";
reg = <0x02024000 0x4000>;
interrupts = <0 51 0x04>;
clocks = <&clks 208>, <&clks 118>, <&clks 208>;
clock-names = "core", "extal", "fsys";
dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
dma-names = "rx", "tx";
fsl,fifo-depth = <128>;
fsl,esai-synchronous;
big-endian;
status = "disabled";
};

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Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
The Freescale S/PDIF audio block is a stereo transceiver that allows the
processor to receive and transmit digital audio via an coaxial cable or
a fibre cable.
Required properties:
- compatible : Compatible list, must contain "fsl,imx35-spdif".
- reg : Offset and length of the register set for the device.
- interrupts : Contains the spdif interrupt.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names : Two dmas have to be defined, "tx" and "rx".
- clocks : Contains an entry for each entry in clock-names.
- clock-names : Includes the following entries:
"core" The core clock of spdif controller
"rxtx<0-7>" Clock source list for tx and rx clock.
This clock list should be identical to
the source list connecting to the spdif
clock mux in "SPDIF Transceiver Clock
Diagram" of SoC reference manual. It
can also be referred to TxClk_Source
bit of register SPDIF_STC.
- big-endian : If this property is absent, the native endian mode will
be in use as default, or the big endian mode will be in use for all the
device registers.
Example:
spdif: spdif@02004000 {
compatible = "fsl,imx35-spdif";
reg = <0x02004000 0x4000>;
interrupts = <0 52 0x04>;
dmas = <&sdma 14 18 0>,
<&sdma 15 18 0>;
dma-names = "rx", "tx";
clocks = <&clks 197>, <&clks 3>,
<&clks 197>, <&clks 107>,
<&clks 0>, <&clks 118>,
<&clks 62>, <&clks 139>,
<&clks 0>;
clock-names = "core", "rxtx0",
"rxtx1", "rxtx2",
"rxtx3", "rxtx4",
"rxtx5", "rxtx6",
"rxtx7";
big-endian;
status = "okay";
};

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Freescale Synchronous Serial Interface
The SSI is a serial device that communicates with audio codecs. It can
be programmed in AC97, I2S, left-justified, or right-justified modes.
Required properties:
- compatible: Compatible list, should contain one of the following
compatibles:
fsl,mpc8610-ssi
fsl,imx51-ssi
fsl,imx35-ssi
fsl,imx21-ssi
- cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
- reg: Offset and length of the register set for the device.
- interrupts: <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and
level information for the interrupt. This should be
encoded based on the information in section 2)
depending on the type of interrupt controller you
have.
- interrupt-parent: The phandle for the interrupt controller that
services interrupts for this device.
- fsl,playback-dma: Phandle to a node for the DMA channel to use for
playback of audio. This is typically dictated by SOC
design. See the notes below.
- fsl,capture-dma: Phandle to a node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. See the notes below.
- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
This number is the maximum allowed value for SFCSR[TFWM0].
- fsl,ssi-asynchronous:
If specified, the SSI is to be programmed in asynchronous
mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
all be connected to valid signals. In synchronous mode,
SRCK and SRFS are ignored. Asynchronous mode allows
playback and capture to use different sample sizes and
sample rates. Some drivers may require that SRCK and STCK
be connected together, and SRFS and STFS be connected
together. This would still allow different sample sizes,
but not different sample rates.
- clocks: "ipg" - Required clock for the SSI unit
"baud" - Required clock for SSI master mode. Otherwise this
clock is not used
Required are also ac97 link bindings if ac97 is used. See
Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary
bindings.
Optional properties:
- codec-handle: Phandle to a 'codec' node that defines an audio
codec connected to this SSI. This node is typically
a child of an I2C or other control node.
- fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to
filter the codec stream. This is necessary for some boards
where an incompatible codec is connected to this SSI, e.g.
on pca100 and pcm043.
- dmas: Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names: Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq
is not defined.
- fsl,mode: The operating mode for the AC97 interface only.
"ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master
Child 'codec' node required properties:
- compatible: Compatible list, contains the name of the codec
Child 'codec' node optional properties:
- clock-frequency: The frequency of the input clock, which typically comes
from an on-board dedicated oscillator.
Notes on fsl,playback-dma and fsl,capture-dma:
On SOCs that have an SSI, specific DMA channels are hard-wired for playback
and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
playback and DMA channel 3 for capture. The developer can choose which
DMA controller to use, but the channels themselves are hard-wired. The
purpose of these two properties is to represent this hardware design.
The device tree nodes for the DMA channels that are referenced by
"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
"fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
"fsl,mpc8610-dma-channel") can remain. If these nodes are left as
"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
drivers (fsldma) will attempt to use them, and it will conflict with the
sound drivers.

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Freescale Generic ASoC Sound Card with ASRC support
The Freescale Generic ASoC Sound Card can be used, ideally, for all Freescale
SoCs connecting with external CODECs.
The idea of this generic sound card is a bit like ASoC Simple Card. However,
for Freescale SoCs (especially those released in recent years), most of them
have ASRC (Documentation/devicetree/bindings/sound/fsl,asrc.txt) inside. And
this is a specific feature that might be painstakingly controlled and merged
into the Simple Card.
So having this generic sound card allows all Freescale SoC users to benefit
from the simplification of a new card support and the capability of the wide
sample rates support through ASRC.
Note: The card is initially designed for those sound cards who use I2S and
PCM DAI formats. However, it'll be also possible to support those non
I2S/PCM type sound cards, such as S/PDIF audio and HDMI audio, as long
as the driver has been properly upgraded.
The compatible list for this generic sound card currently:
"fsl,imx-audio-cs42888"
"fsl,imx-audio-wm8962"
(compatible with Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt)
"fsl,imx-audio-sgtl5000"
(compatible with Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt)
Required properties:
- compatible : Contains one of entries in the compatible list.
- model : The user-visible name of this sound complex
- audio-cpu : The phandle of an CPU DAI controller
- audio-codec : The phandle of an audio codec
- audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the
connection's sink, the second being the connection's
source. There're a few pre-designed board connectors:
* Line Out Jack
* Line In Jack
* Headphone Jack
* Mic Jack
* Ext Spk
* AMIC (stands for Analog Microphone Jack)
* DMIC (stands for Digital Microphone Jack)
Note: The "Mic Jack" and "AMIC" are redundant while
coexsiting in order to support the old bindings
of wm8962 and sgtl5000.
Optional properties:
- audio-asrc : The phandle of ASRC. It can be absent if there's no
need to add ASRC support via DPCM.
Example:
sound-cs42888 {
compatible = "fsl,imx-audio-cs42888";
model = "cs42888-audio";
audio-cpu = <&esai>;
audio-asrc = <&asrc>;
audio-codec = <&cs42888>;
audio-routing =
"Line Out Jack", "AOUT1L",
"Line Out Jack", "AOUT1R",
"Line Out Jack", "AOUT2L",
"Line Out Jack", "AOUT2R",
"Line Out Jack", "AOUT3L",
"Line Out Jack", "AOUT3R",
"Line Out Jack", "AOUT4L",
"Line Out Jack", "AOUT4R",
"AIN1L", "Line In Jack",
"AIN1R", "Line In Jack",
"AIN2L", "Line In Jack",
"AIN2R", "Line In Jack";
};

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Freescale Synchronous Audio Interface (SAI).
The SAI is based on I2S module that used communicating with audio codecs,
which provides a synchronous audio interface that supports fullduplex
serial interfaces with frame synchronization such as I2S, AC97, TDM, and
codec/DSP interfaces.
Required properties:
- compatible: Compatible list, contains "fsl,vf610-sai" or "fsl,imx6sx-sai".
- reg: Offset and length of the register set for the device.
- clocks: Must contain an entry for each entry in clock-names.
- clock-names : Must include the "bus" for register access and "mclk1" "mclk2"
"mclk3" for bit clock and frame clock providing.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names : Two dmas have to be defined, "tx" and "rx".
- pinctrl-names: Must contain a "default" entry.
- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
See ../pinctrl/pinctrl-bindings.txt for details of the property values.
- big-endian: Boolean property, required if all the FTM_PWM registers
are big-endian rather than little-endian.
- lsb-first: Configures whether the LSB or the MSB is transmitted first for
the fifo data. If this property is absent, the MSB is transmitted first as
default, or the LSB is transmitted first.
- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
that SAI will work in the synchronous mode (sync Tx with Rx) which means
both the transimitter and receiver will send and receive data by following
receiver's bit clocks and frame sync clocks.
- fsl,sai-asynchronous: This is a boolean property. If present, indicating
that SAI will work in the asynchronous mode, which means both transimitter
and receiver will send and receive data by following their own bit clocks
and frame sync clocks separately.
Note:
- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
default synchronous mode (sync Rx with Tx) will be used, which means both
transimitter and receiver will send and receive data by following clocks
of transimitter.
- fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive.
Example:
sai2: sai@40031000 {
compatible = "fsl,vf610-sai";
reg = <0x40031000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2_1>;
clocks = <&clks VF610_CLK_PLATFORM_BUS>,
<&clks VF610_CLK_SAI2>,
<&clks 0>, <&clks 0>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>,
<&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>;
big-endian;
lsb-first;
};

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Device-Tree bindings for dummy HDMI codec
Required properties:
- compatible: should be "linux,hdmi-audio".
CODEC output pins:
* TX
CODEC input pins:
* RX
Example node:
hdmi_audio: hdmi_audio@0 {
compatible = "linux,hdmi-audio";
status = "okay";
};

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Freescale i.MX audio complex with ES8328 codec
Required properties:
- compatible : "fsl,imx-audio-es8328"
- model : The user-visible name of this sound complex
- ssi-controller : The phandle of the i.MX SSI controller
- jack-gpio : Optional GPIO for headphone jack
- audio-amp-supply : Power regulator for speaker amps
- audio-codec : The phandle of the ES8328 audio codec
- audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the
connection's sink, the second being the connection's
source. Valid names could be power supplies, ES8328
pins, and the jacks on the board:
Power supplies:
* audio-amp
ES8328 pins:
* LOUT1
* LOUT2
* ROUT1
* ROUT2
* LINPUT1
* LINPUT2
* RINPUT1
* RINPUT2
* Mic PGA
Board connectors:
* Headphone
* Speaker
* Mic Jack
- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
- mux-ext-port : The external port of the i.MX audio muxer (AUDMIX)
Note: The AUDMUX port numbering should start at 1, which is consistent with
hardware manual.
Example:
sound {
compatible = "fsl,imx-audio-es8328";
model = "imx-audio-es8328";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
jack-gpio = <&gpio5 15 0>;
audio-amp-supply = <&reg_audio_amp>;
audio-routing =
"Speaker", "LOUT2",
"Speaker", "ROUT2",
"Speaker", "audio-amp",
"Headphone", "ROUT1",
"Headphone", "LOUT1",
"LINPUT1", "Mic Jack",
"RINPUT1", "Mic Jack",
"Mic Jack", "Mic Bias";
mux-int-port = <1>;
mux-ext-port = <3>;
};

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Freescale i.MX audio complex with SGTL5000 codec
Required properties:
- compatible : "fsl,imx-audio-sgtl5000"
- model : The user-visible name of this sound complex
- ssi-controller : The phandle of the i.MX SSI controller
- audio-codec : The phandle of the SGTL5000 audio codec
- audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names could be power
supplies, SGTL5000 pins, and the jacks on the board:
Power supplies:
* Mic Bias
SGTL5000 pins:
* MIC_IN
* LINE_IN
* HP_OUT
* LINE_OUT
Board connectors:
* Mic Jack
* Line In Jack
* Headphone Jack
* Line Out Jack
* Ext Spk
- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
- mux-ext-port : The external port of the i.MX audio muxer
Note: The AUDMUX port numbering should start at 1, which is consistent with
hardware manual.
Example:
sound {
compatible = "fsl,imx51-babbage-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx51-babbage-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <3>;
};

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Freescale i.MX audio complex with S/PDIF transceiver
Required properties:
- compatible : "fsl,imx-audio-spdif"
- model : The user-visible name of this sound complex
- spdif-controller : The phandle of the i.MX S/PDIF controller
Optional properties:
- spdif-out : This is a boolean property. If present, the transmitting
function of S/PDIF will be enabled, indicating there's a physical
S/PDIF out connector/jack on the board or it's connecting to some
other IP block, such as an HDMI encoder/display-controller.
- spdif-in : This is a boolean property. If present, the receiving
function of S/PDIF will be enabled, indicating there's a physical
S/PDIF in connector/jack on the board.
* Note: At least one of these two properties should be set in the DT binding.
Example:
sound-spdif {
compatible = "fsl,imx-audio-spdif";
model = "imx-spdif";
spdif-controller = <&spdif>;
spdif-out;
spdif-in;
};

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Freescale i.MX audio complex with WM8962 codec
Required properties:
- compatible : "fsl,imx-audio-wm8962"
- model : The user-visible name of this sound complex
- ssi-controller : The phandle of the i.MX SSI controller
- audio-codec : The phandle of the WM8962 audio codec
- audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names could be power
supplies, WM8962 pins, and the jacks on the board:
Power supplies:
* Mic Bias
Board connectors:
* Mic Jack
* Headphone Jack
* Ext Spk
- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
- mux-ext-port : The external port of the i.MX audio muxer
Note: The AUDMUX port numbering should start at 1, which is consistent with
hardware manual.
Example:
sound {
compatible = "fsl,imx6q-sabresd-wm8962",
"fsl,imx-audio-wm8962";
model = "wm8962-audio";
ssi-controller = <&ssi2>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"Ext Spk", "SPKOUTL",
"Ext Spk", "SPKOUTR",
"MICBIAS", "AMIC",
"IN3R", "MICBIAS",
"DMIC", "MICBIAS",
"DMICDAT", "DMIC";
mux-int-port = <2>;
mux-ext-port = <3>;
};

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Freescale Digital Audio Mux (AUDMUX) device
Required properties:
- compatible : "fsl,imx21-audmux" for AUDMUX version firstly used on i.MX21,
or "fsl,imx31-audmux" for the version firstly used on i.MX31.
- reg : Should contain AUDMUX registers location and length
An initial configuration can be setup using child nodes.
Required properties of optional child nodes:
- fsl,audmux-port : Integer of the audmux port that is configured by this
child node.
- fsl,port-config : List of configuration options for the specific port. For
imx31-audmux and above, it is a list of tuples <ptcr pdcr>. For
imx21-audmux it is a list of pcr values.
Example:
audmux@021d8000 {
compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
reg = <0x021d8000 0x4000>;
};

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MAX98090 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "maxim,max98090" or "maxim,max98091".
- reg : The I2C address of the device.
- interrupts : The CODEC's interrupt output.
Optional properties:
- clocks: The phandle of the master clock to the CODEC
- clock-names: Should be "mclk"
Pins on the device (for linking into audio routes):
* MIC1
* MIC2
* DMICL
* DMICR
* IN1
* IN2
* IN3
* IN4
* IN5
* IN6
* IN12
* IN34
* IN56
* HPL
* HPR
* SPKL
* SPKR
* RCVL
* RCVR
* MICBIAS
Example:
audio-codec@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
};

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MAX98095 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "maxim,max98095".
- reg : The I2C address of the device.
Optional properties:
- clocks: The phandle of the master clock to the CODEC
- clock-names: Should be "mclk"
Example:
max98095: codec@11 {
compatible = "maxim,max98095";
reg = <0x11>;
};

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Marvell PXA SSP CPU DAI bindings
Required properties:
compatible Must be "mrvl,pxa-ssp-dai"
port A phandle reference to a PXA ssp upstream device
Example:
/* upstream device */
ssp0: ssp@41000000 {
compatible = "mrvl,pxa3xx-ssp";
reg = <0x41000000 0x40>;
interrupts = <24>;
clock-names = "pxa27x-ssp.0";
dmas = <&dma 13
&dma 14>;
dma-names = "rx", "tx";
};
/* DAI as user */
ssp_dai0: ssp_dai@0 {
compatible = "mrvl,pxa-ssp-dai";
port = <&ssp0>;
};

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DT bindings for ARM PXA2xx PCM platform driver
This is just a dummy driver that registers the PXA ASoC platform driver.
It does not have any resources assigned.
Required properties:
- compatible 'mrvl,pxa-pcm-audio'
Example:
pxa_pcm_audio: snd_soc_pxa_audio {
compatible = "mrvl,pxa-pcm-audio";
};

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* mvebu (Kirkwood, Dove, Armada 370) audio controller
Required properties:
- compatible:
"marvell,kirkwood-audio" for Kirkwood platforms
"marvell,dove-audio" for Dove platforms
"marvell,armada370-audio" for Armada 370 platforms
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts:
with "marvell,kirkwood-audio", the audio interrupt
with "marvell,dove-audio", a list of two interrupts, the first for
the data flow, and the second for errors.
- clocks: one or two phandles.
The first one is mandatory and defines the internal clock.
The second one is optional and defines an external clock.
- clock-names: names associated to the clocks:
"internal" for the internal clock
"extclk" for the external clock
Example:
i2s1: audio-controller@b4000 {
compatible = "marvell,dove-audio";
reg = <0xb4000 0x2210>;
interrupts = <21>, <22>;
clocks = <&gate_clk 13>;
clock-names = "internal";
};

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* Freescale MXS audio complex with SGTL5000 codec
Required properties:
- compatible: "fsl,mxs-audio-sgtl5000"
- model: The user-visible name of this sound complex
- saif-controllers: The phandle list of the MXS SAIF controller
- audio-codec: The phandle of the SGTL5000 audio codec
Example:
sound {
compatible = "fsl,imx28-evk-sgtl5000",
"fsl,mxs-audio-sgtl5000";
model = "imx28-evk-sgtl5000";
saif-controllers = <&saif0 &saif1>;
audio-codec = <&sgtl5000>;
};

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* Freescale MXS Serial Audio Interface (SAIF)
Required properties:
- compatible: Should be "fsl,<chip>-saif"
- reg: Should contain registers location and length
- interrupts: Should contain ERROR interrupt number
- dmas: DMA specifier, consisting of a phandle to DMA controller node
and SAIF DMA channel ID.
Refer to dma.txt and fsl-mxs-dma.txt for details.
- dma-names: Must be "rx-tx".
Optional properties:
- fsl,saif-master: phandle to the master SAIF. It's only required for
the slave SAIF.
Note: Each SAIF controller should have an alias correctly numbered
in "aliases" node.
Example:
aliases {
saif0 = &saif0;
saif1 = &saif1;
};
saif0: saif@80042000 {
compatible = "fsl,imx28-saif";
reg = <0x80042000 2000>;
interrupts = <59>;
dmas = <&dma_apbx 4>;
dma-names = "rx-tx";
};
saif1: saif@80046000 {
compatible = "fsl,imx28-saif";
reg = <0x80046000 2000>;
interrupts = <58>;
dmas = <&dma_apbx 5>;
dma-names = "rx-tx";
fsl,saif-master = <&saif0>;
};

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* Nokia N900 audio setup
Required properties:
- compatible: Should contain "nokia,n900-audio"
- nokia,cpu-dai: phandle for the McBSP node
- nokia,audio-codec: phandles for the main TLV320AIC3X node and the
auxiliary TLV320AIC3X node (in this order)
- nokia,headphone-amplifier: phandle for the TPA6130A2 node
- tvout-selection-gpios: GPIO for tvout selection
- jack-detection-gpios: GPIO for jack detection
- eci-switch-gpios: GPIO for ECI (Enhancement Control Interface) switch
- speaker-amplifier-gpios: GPIO for speaker amplifier
Example:
sound {
compatible = "nokia,n900-audio";
nokia,cpu-dai = <&mcbsp2>;
nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
nokia,headphone-amplifier = <&tpa6130a2>;
tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
};

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NVIDIA Tegra audio complex
Required properties:
- compatible : "nvidia,tegra-audio-alc5632"
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- pll_a
- pll_a_out0
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the ALC5632's pins as documented in the binding for the device
and:
* Headset Stereophone
* Int Spk
* Headset Mic
* Digital Mic
- nvidia,i2s-controller : The phandle of the Tegra I2S controller
- nvidia,audio-codec : The phandle of the ALC5632 audio codec
Example:
sound {
compatible = "nvidia,tegra-audio-alc5632-paz00",
"nvidia,tegra-audio-alc5632";
nvidia,model = "Compal PAZ00";
nvidia,audio-routing =
"Int Spk", "SPK_OUTP",
"Int Spk", "SPK_OUTN",
"Headset Mic","MICBIAS1",
"MIC1_N", "Headset Mic",
"MIC1_P", "Headset Mic",
"Headset Stereophone", "HP_OUT_R",
"Headset Stereophone", "HP_OUT_L";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&alc5632>;
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra audio complex, with MAX98090 CODEC
Required properties:
- compatible : "nvidia,tegra-audio-max98090"
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- pll_a
- pll_a_out0
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the MAX98090's pins (as documented in its binding), and the jacks
on the board:
* Headphones
* Speakers
* Mic Jack
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
connected to the CODEC.
- nvidia,audio-codec : The phandle of the MAX98090 audio codec.
Optional properties:
- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
- nvidia,mic-det-gpios : The GPIO that detect microphones are plugged in
Example:
sound {
compatible = "nvidia,tegra-audio-max98090-venice2",
"nvidia,tegra-audio-max98090";
nvidia,model = "NVIDIA Tegra Venice2";
nvidia,audio-routing =
"Headphones", "HPR",
"Headphones", "HPL",
"Speakers", "SPKR",
"Speakers", "SPKL",
"Mic Jack", "MICBIAS",
"IN34", "Mic Jack";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&acodec>;
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA124_CLK_EXTERN1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra audio complex, with RT5640 CODEC
Required properties:
- compatible : "nvidia,tegra-audio-rt5640"
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- pll_a
- pll_a_out0
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the RT5640's pins (as documented in its binding), and the jacks
on the board:
* Headphones
* Speakers
* Mic Jack
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
connected to the CODEC.
- nvidia,audio-codec : The phandle of the RT5640 audio codec. This binding
assumes that AIF1 on the CODEC is connected to Tegra.
Optional properties:
- nvidia,hp-det-gpios : The GPIO that detects headphones are plugged in
Example:
sound {
compatible = "nvidia,tegra-audio-rt5640-dalmore",
"nvidia,tegra-audio-rt5640";
nvidia,model = "NVIDIA Tegra Dalmore";
nvidia,audio-routing =
"Headphones", "HPOR",
"Headphones", "HPOL",
"Speakers", "SPORP",
"Speakers", "SPORN",
"Speakers", "SPOLP",
"Speakers", "SPOLN";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&rt5640>;
nvidia,hp-det-gpios = <&gpio 143 0>; /* GPIO PR7 */
clocks = <&tegra_car 216>, <&tegra_car 217>, <&tegra_car 120>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra audio complex for TrimSlice
Required properties:
- compatible : "nvidia,tegra-audio-trimslice"
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Must include the following entries:
"pll_a" (The Tegra clock of that name),
"pll_a_out0" (The Tegra clock of that name),
"mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
- nvidia,audio-codec : The phandle of the WM8903 audio codec
Example:
sound {
compatible = "nvidia,tegra-audio-trimslice";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&codec>;
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra audio complex
Required properties:
- compatible : "nvidia,tegra-audio-wm8753"
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- pll_a
- pll_a_out0
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the WM8753's pins as documented in the binding for the WM8753,
and the jacks on the board:
* Headphone Jack
* Mic Jack
- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
- nvidia,audio-codec : The phandle of the WM8753 audio codec
Example:
sound {
compatible = "nvidia,tegra-audio-wm8753-whistler",
"nvidia,tegra-audio-wm8753"
nvidia,model = "tegra-wm8753-harmony";
nvidia,audio-routing =
"Headphone Jack", "LOUT1",
"Headphone Jack", "ROUT1";
nvidia,i2s-controller = <&i2s1>;
nvidia,audio-codec = <&wm8753>;
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra audio complex
Required properties:
- compatible : "nvidia,tegra-audio-wm8903"
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- pll_a
- pll_a_out0
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the WM8903's pins (documented in the WM8903 binding document),
and the jacks on the board:
* Headphone Jack
* Int Spk
* Mic Jack
- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller
- nvidia,audio-codec : The phandle of the WM8903 audio codec
Optional properties:
- nvidia,spkr-en-gpios : The GPIO that enables the speakers
- nvidia,hp-mute-gpios : The GPIO that mutes the headphones
- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
- nvidia,int-mic-en-gpios : The GPIO that enables the internal microphone
- nvidia,ext-mic-en-gpios : The GPIO that enables the external microphone
Example:
sound {
compatible = "nvidia,tegra-audio-wm8903-harmony",
"nvidia,tegra-audio-wm8903"
nvidia,model = "tegra-wm8903-harmony";
nvidia,audio-routing =
"Headphone Jack", "HPOUTR",
"Headphone Jack", "HPOUTL",
"Int Spk", "ROP",
"Int Spk", "RON",
"Int Spk", "LOP",
"Int Spk", "LON",
"Mic Jack", "MICBIAS",
"IN1L", "Mic Jack";
nvidia,i2s-controller = <&i2s1>;
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&codec 2 0>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra audio complex
Required properties:
- compatible : "nvidia,tegra-audio-wm9712"
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- pll_a
- pll_a_out0
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the WM9712's pins, and the jacks on the board:
WM9712 pins:
* MONOOUT
* HPOUTL
* HPOUTR
* LOUT2
* ROUT2
* OUT3
* LINEINL
* LINEINR
* PHONE
* PCBEEP
* MIC1
* MIC2
* Mic Bias
Board connectors:
* Headphone
* LineIn
* Mic
- nvidia,ac97-controller : The phandle of the Tegra AC97 controller
Example:
sound {
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
"nvidia,tegra-audio-wm9712";
nvidia,model = "Toradex Colibri T20";
nvidia,audio-routing =
"Headphone", "HPOUTL",
"Headphone", "HPOUTR",
"LineIn", "LINEINL",
"LineIn", "LINEINR",
"Mic", "MIC1";
nvidia,ac97-controller = <&ac97>;
clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};

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NVIDIA Tegra 20 AC97 controller
Required properties:
- compatible : "nvidia,tegra20-ac97"
- reg : Should contain AC97 controller registers location and length
- interrupts : Should contain AC97 interrupt
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
- ac97
- dmas : Must contain an entry for each entry in clock-names.
See ../dma/dma.txt for details.
- dma-names : Must include the following entries:
- rx
- tx
- clocks : Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
of the GPIO used to reset the external AC97 codec
- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
of the GPIO corresponding with the AC97 DAP _FS line
Example:
ac97@70002000 {
compatible = "nvidia,tegra20-ac97";
reg = <0x70002000 0x200>;
interrupts = <0 81 0x04>;
nvidia,codec-reset-gpio = <&gpio 170 0>;
nvidia,codec-sync-gpio = <&gpio 120 0>;
clocks = <&tegra_car 3>;
resets = <&tegra_car 3>;
reset-names = "ac97";
dmas = <&apbdma 12>, <&apbdma 12>;
dma-names = "rx", "tx";
};

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NVIDIA Tegra 20 DAS (Digital Audio Switch) controller
Required properties:
- compatible : "nvidia,tegra20-das"
- reg : Should contain DAS registers location and length
Example:
das@70000c00 {
compatible = "nvidia,tegra20-das";
reg = <0x70000c00 0x80>;
};

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NVIDIA Tegra 20 I2S controller
Required properties:
- compatible : "nvidia,tegra20-i2s"
- reg : Should contain I2S registers location and length
- interrupts : Should contain I2S interrupt
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
- i2s
- dmas : Must contain an entry for each entry in clock-names.
See ../dma/dma.txt for details.
- dma-names : Must include the following entries:
- rx
- tx
- clocks : Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
Example:
i2s@70002800 {
compatible = "nvidia,tegra20-i2s";
reg = <0x70002800 0x200>;
interrupts = < 45 >;
clocks = <&tegra_car 11>;
resets = <&tegra_car 11>;
reset-names = "i2s";
dmas = <&apbdma 21>, <&apbdma 21>;
dma-names = "rx", "tx";
};

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NVIDIA Tegra30 AHUB (Audio Hub)
Required properties:
- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub", etc.
- reg : Should contain the register physical address and length for each of
the AHUB's register blocks.
- Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
- Tegra114 requires an additional entry, for the APBIF2 register block.
- interrupts : Should contain AHUB interrupt
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries:
- d_audio
- apbif
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
Tegra30 and later:
- d_audio
- apbif
- i2s0
- i2s1
- i2s2
- i2s3
- i2s4
- dam0
- dam1
- dam2
- spdif
Tegra114 and later additionally require:
- amx
- adx
Tegra124 and later additionally require:
- amx1
- adx1
- afc0
- afc1
- afc2
- afc3
- afc4
- afc5
- ranges : The bus address mapping for the configlink register bus.
Can be empty since the mapping is 1:1.
- dmas : Must contain an entry for each entry in clock-names.
See ../dma/dma.txt for details.
- dma-names : Must include the following entries:
- rx0 .. rx<n>
- tx0 .. tx<n>
... where n is:
Tegra30: 3
Tegra114, Tegra124: 9
- #address-cells : For the configlink bus. Should be <1>;
- #size-cells : For the configlink bus. Should be <1>.
AHUB client modules need to specify the IDs of their CIFs (Client InterFaces).
For RX CIFs, the numbers indicate the register number within AHUB routing
register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).
For TX CIFs, the numbers indicate the bit position within the AHUB routing
registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
Example:
ahub@70080000 {
compatible = "nvidia,tegra30-ahub";
reg = <0x70080000 0x200 0x70080200 0x100>;
interrupts = < 0 103 0x04 >;
nvidia,dma-request-selector = <&apbdma 1>;
clocks = <&tegra_car 106>, <&tegra_car 107>;
clock-names = "d_audio", "apbif";
resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
<&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
<&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
<&tegra_car 110>, <&tegra_car 10>;
reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
"i2s3", "i2s4", "dam0", "dam1", "dam2",
"spdif";
dmas = <&apbdma 1>, <&apbdma 1>;
<&apbdma 2>, <&apbdma 2>;
<&apbdma 3>, <&apbdma 3>;
<&apbdma 4>, <&apbdma 4>;
dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3";
ranges;
#address-cells = <1>;
#size-cells = <1>;
};

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NVIDIA Tegra30 HDA controller
Required properties:
- compatible : "nvidia,tegra30-hda"
- reg : Should contain the HDA registers location and length.
- interrupts : The interrupt from the HDA controller.
- clocks : Must contain an entry for each required entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names : Must include the following entries: hda, hdacodec_2x, hda2hdmi
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries: hda, hdacodec_2x, hda2hdmi
Example:
hda@0,70030000 {
compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
reg = <0x0 0x70030000 0x0 0x10000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_HDA>,
<&tegra_car TEGRA124_CLK_HDA2HDMI>,
<&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
clock-names = "hda", "hda2hdmi", "hda2codec_2x";
resets = <&tegra_car 125>, /* hda */
<&tegra_car 128>; /* hda2hdmi */
<&tegra_car 111>, /* hda2codec_2x */
reset-names = "hda", "hda2hdmi", "hda2codec_2x";
};

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NVIDIA Tegra30 I2S controller
Required properties:
- compatible : "nvidia,tegra30-i2s"
- reg : Should contain I2S registers location and length
- clocks : Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
- i2s
- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)
first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
Example:
i2s@70080300 {
compatible = "nvidia,tegra30-i2s";
reg = <0x70080300 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car 11>;
resets = <&tegra_car 11>;
reset-names = "i2s";
};

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* Texas Instruments OMAP4+ and twl6040 based audio setups
Required properties:
- compatible: "ti,abe-twl6040"
- ti,model: Name of the sound card ( for example "SDP4430")
- ti,mclk-freq: MCLK frequency for HPPLL operation
- ti,mcpdm: phandle for the McPDM node
- ti,twl6040: phandle for the twl6040 core node
- ti,audio-routing: List of connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source.
Optional properties:
- ti,dmic: phandle for the OMAP dmic node if the machine have it connected
- ti,jack_detection: Need to be present if the board capable to detect jack
insertion, removal.
Available audio endpoints for the audio-routing table:
Board connectors:
* Headset Stereophone
* Earphone Spk
* Ext Spk
* Line Out
* Vibrator
* Headset Mic
* Main Handset Mic
* Sub Handset Mic
* Line In
* Digital Mic
twl6040 pins:
* HSOL
* HSOR
* EP
* HFL
* HFR
* AUXL
* AUXR
* VIBRAL
* VIBRAR
* HSMIC
* MAINMIC
* SUBMIC
* AFML
* AFMR
* Headset Mic Bias
* Main Mic Bias
* Digital Mic1 Bias
* Digital Mic2 Bias
Digital mic pins:
* DMic
Example:
sound {
compatible = "ti,abe-twl6040";
ti,model = "SDP4430";
ti,jack-detection;
ti,mclk-freq = <38400000>;
ti,mcpdm = <&mcpdm>;
ti,dmic = <&dmic>;
ti,twl6040 = <&twl6040>;
/* Audio routing */
ti,audio-routing =
"Headset Stereophone", "HSOL",
"Headset Stereophone", "HSOR",
"Earphone Spk", "EP",
"Ext Spk", "HFL",
"Ext Spk", "HFR",
"Line Out", "AUXL",
"Line Out", "AUXR",
"Vibrator", "VIBRAL",
"Vibrator", "VIBRAR",
"HSMIC", "Headset Mic",
"Headset Mic", "Headset Mic Bias",
"MAINMIC", "Main Handset Mic",
"Main Handset Mic", "Main Mic Bias",
"SUBMIC", "Sub Handset Mic",
"Sub Handset Mic", "Main Mic Bias",
"AFML", "Line In",
"AFMR", "Line In",
"DMic", "Digital Mic",
"Digital Mic", "Digital Mic1 Bias";
};

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* Texas Instruments OMAP4+ Digital Microphone Module
Required properties:
- compatible: "ti,omap4-dmic"
- reg: Register location and size as an array:
<MPU access base address, size>,
<L3 interconnect address, size>;
- interrupts: Interrupt number for DMIC
- interrupt-parent: The parent interrupt controller
- ti,hwmods: Name of the hwmod associated with OMAP dmic IP
Example:
dmic: dmic@4012e000 {
compatible = "ti,omap4-dmic";
reg = <0x4012e000 0x7f>, /* MPU private access */
<0x4902e000 0x7f>; /* L3 Interconnect */
interrupts = <0 114 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "dmic";
};

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* Texas Instruments OMAP2+ McBSP module
Required properties:
- compatible: "ti,omap2420-mcbsp" for McBSP on OMAP2420
"ti,omap2430-mcbsp" for McBSP on OMAP2430
"ti,omap3-mcbsp" for McBSP on OMAP3
"ti,omap4-mcbsp" for McBSP on OMAP4 and newer SoC
- reg: Register location and size, for OMAP4+ as an array:
<MPU access base address, size>,
<L3 interconnect address, size>;
- reg-names: Array of strings associated with the address space
- interrupts: Interrupt numbers for the McBSP port, as an array in case the
McBSP IP have more interrupt lines:
<OCP compliant irq>,
<TX irq>,
<RX irq>;
- interrupt-names: Array of strings associated with the interrupt numbers
- interrupt-parent: The parent interrupt controller
- ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC)
- ti,hwmods: Name of the hwmod associated to the McBSP port
Example:
mcbsp2: mcbsp@49022000 {
compatible = "ti,omap3-mcbsp";
reg = <0x49022000 0xff>,
<0x49028000 0xff>;
reg-names = "mpu", "sidetone";
interrupts = <0 17 0x4>, /* OCP compliant interrupt */
<0 62 0x4>, /* TX interrupt */
<0 63 0x4>, /* RX interrupt */
<0 4 0x4>; /* Sidetone */
interrupt-names = "common", "tx", "rx", "sidetone";
interrupt-parent = <&intc>;
ti,buffer-size = <1280>;
ti,hwmods = "mcbsp2";
};

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* Texas Instruments OMAP4+ McPDM
Required properties:
- compatible: "ti,omap4-mcpdm"
- reg: Register location and size as an array:
<MPU access base address, size>,
<L3 interconnect address, size>;
- interrupts: Interrupt number for McPDM
- interrupt-parent: The parent interrupt controller
- ti,hwmods: Name of the hwmod associated to the McPDM
Example:
mcpdm: mcpdm@40132000 {
compatible = "ti,omap4-mcpdm";
reg = <0x40132000 0x7f>, /* MPU private access */
<0x49032000 0x7f>; /* L3 Interconnect */
interrupts = <0 112 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "mcpdm";
};

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* Texas Instruments SoC with twl4030 based audio setups
Required properties:
- compatible: "ti,omap-twl4030"
- ti,model: Name of the sound card (for example "omap3beagle")
- ti,mcbsp: phandle for the McBSP node
- ti,codec: phandle for the twl4030 audio node
Optional properties:
- ti,mcbsp-voice: phandle for the McBSP node connected to the voice port of twl
- ti, jack-det-gpio: Jack detect GPIO
- ti,audio-routing: List of connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source.
If the routing is not provided all possible connection will be available
Available audio endpoints for the audio-routing table:
Board connectors:
* Headset Stereophone
* Earpiece Spk
* Handsfree Spk
* Ext Spk
* Main Mic
* Sub Mic
* Headset Mic
* Carkit Mic
* Digital0 Mic
* Digital1 Mic
* Line In
twl4030 pins:
* HSOL
* HSOR
* EARPIECE
* HFL
* HFR
* PREDRIVEL
* PREDRIVER
* CARKITL
* CARKITR
* MAINMIC
* SUBMIC
* HSMIC
* DIGIMIC0
* DIGIMIC1
* CARKITMIC
* AUXL
* AUXR
* Headset Mic Bias
* Mic Bias 1 /* Used for Main Mic or Digimic0 */
* Mic Bias 2 /* Used for Sub Mic or Digimic1 */
Example:
sound {
compatible = "ti,omap-twl4030";
ti,model = "omap3beagle";
ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
};

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Texas Instruments pcm1792a DT bindings
This driver supports the SPI bus.
Required properties:
- compatible: "ti,pcm1792a"
For required properties on SPI, please consult
Documentation/devicetree/bindings/spi/spi-bus.txt
Examples:
codec_spi: 1792a@0 {
compatible = "ti,pcm1792a";
spi-max-frequency = <600000>;
};

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PCM512x audio CODECs
These devices support both I2C and SPI (configured with pin strapping
on the board).
Required properties:
- compatible : One of "ti,pcm5121" or "ti,pcm5122"
- reg : the I2C address of the device for I2C, the chip select
number for SPI.
- AVDD-supply, DVDD-supply, and CPVDD-supply : power supplies for the
device, as covered in bindings/regulator/regulator.txt
Optional properties:
- clocks : A clock specifier for the clock connected as SCLK. If this
is absent the device will be configured to clock from BCLK.
Example:
pcm5122: pcm5122@4c {
compatible = "ti,pcm5122";
reg = <0x4c>;
AVDD-supply = <&reg_3v3_analog>;
DVDD-supply = <&reg_1v8>;
CPVDD-supply = <&reg_3v3>;
};

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Renesas FSI
Required properties:
- compatible : "renesas,sh_fsi2" or "renesas,sh_fsi"
- reg : Should contain the register physical address and length
- interrupts : Should contain FSI interrupt
- fsia,spdif-connection : FSI is connected by S/PDFI
- fsia,stream-mode-support : FSI supports 16bit stream mode.
- fsia,use-internal-clock : FSI uses internal clock when master mode.
- fsib,spdif-connection : same as fsia
- fsib,stream-mode-support : same as fsia
- fsib,use-internal-clock : same as fsia
Example:
sh_fsi2: sh_fsi2@0xec230000 {
compatible = "renesas,sh_fsi2";
reg = <0xec230000 0x400>;
interrupts = <0 146 0x4>;
fsia,spdif-connection;
fsia,stream-mode-support;
fsia,use-internal-clock;
};

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Renesas R-Car sound
Required properties:
- compatible : "renesas,rcar_sound-gen1" if generation1
"renesas,rcar_sound-gen2" if generation2
- reg : Should contain the register physical address.
required register is
SRU/ADG/SSI if generation1
SRU/ADG/SSIU/SSI if generation2
- rcar_sound,ssi : Should contain SSI feature.
The number of SSI subnode should be same as HW.
see below for detail.
- rcar_sound,src : Should contain SRC feature.
The number of SRC subnode should be same as HW.
see below for detail.
- rcar_sound,dvc : Should contain DVC feature.
The number of DVC subnode should be same as HW.
see below for detail.
- rcar_sound,dai : DAI contents.
The number of DAI subnode should be same as HW.
see below for detail.
SSI subnode properties:
- interrupts : Should contain SSI interrupt for PIO transfer
- shared-pin : if shared clock pin
- pio-transfer : use PIO transfer mode
- no-busif : BUSIF is not ussed when [mem -> SSI] via DMA case
SRC subnode properties:
no properties at this point
DAI subnode properties:
- playback : list of playback modules
- capture : list of capture modules
Example:
rcar_sound: rcar_sound@0xffd90000 {
#sound-dai-cells = <1>;
compatible = "renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x1280>; /* SSI */
rcar_sound,dvc {
dvc0: dvc@0 { };
dvc1: dvc@1 { };
};
rcar_sound,src {
src0: src@0 { };
src1: src@1 { };
src2: src@2 { };
src3: src@3 { };
src4: src@4 { };
src5: src@5 { };
src6: src@6 { };
src7: src@7 { };
src8: src@8 { };
src9: src@9 { };
};
rcar_sound,ssi {
ssi0: ssi@0 {
interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
};
ssi1: ssi@1 {
interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
};
ssi2: ssi@2 {
interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
};
ssi3: ssi@3 {
interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
};
ssi4: ssi@4 {
interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
};
ssi5: ssi@5 {
interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
};
ssi6: ssi@6 {
interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
};
ssi7: ssi@7 {
interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
};
ssi8: ssi@8 {
interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
};
ssi9: ssi@9 {
interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
};
};
rcar_sound,dai {
dai0 {
playback = <&ssi5 &src5>;
capture = <&ssi6>;
};
dai1 {
playback = <&ssi3>;
};
dai2 {
capture = <&ssi4>;
};
dai3 {
playback = <&ssi7>;
};
dai4 {
capture = <&ssi8>;
};
};
};

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* Rockchip I2S controller
The I2S bus (Inter-IC sound bus) is a serial link for digital
audio data transfer between devices in the system.
Required properties:
- compatible: should be one of the followings
- "rockchip,rk3066-i2s": for rk3066
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
- "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: should contain the I2S interrupt.
- #address-cells: should be 1.
- #size-cells: should be 0.
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: should include "tx" and "rx".
- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
- clock-names: should contain followings:
- "i2s_hclk": clock for I2S BUS
- "i2s_clk" : clock for I2S controller
Example for rk3288 I2S controller:
i2s@ff890000 {
compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
reg = <0xff890000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&pdma1 0>, <&pdma1 1>;
dma-names = "tx", "rx";
clock-names = "i2s_hclk", "i2s_clk";
clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
};

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RT5640/RT5639 audio CODEC
This device supports I2C only.
Required properties:
- compatible : One of "realtek,rt5640" or "realtek,rt5639".
- reg : The I2C address of the device.
- interrupts : The CODEC's interrupt output.
Optional properties:
- realtek,in1-differential
- realtek,in2-differential
Boolean. Indicate MIC1/2 input are differential, rather than single-ended.
- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
Pins on the device (for linking into audio routes) for RT5639/RT5640:
* DMIC1
* DMIC2
* MICBIAS1
* IN1P
* IN1R
* IN2P
* IN2R
* HPOL
* HPOR
* LOUTL
* LOUTR
* SPOLP
* SPOLN
* SPORP
* SPORN
Additional pins on the device for RT5640:
* MONOP
* MONON
Example:
rt5640 {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
realtek,ldo1-en-gpios =
<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
};

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RT5677 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "realtek,rt5677".
- reg : The I2C address of the device.
- interrupts : The CODEC's interrupt output.
- gpio-controller : Indicates this device is a GPIO controller.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional parameters (currently unused).
Optional properties:
- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
- realtek,in1-differential
- realtek,in2-differential
- realtek,lout1-differential
- realtek,lout2-differential
- realtek,lout3-differential
Boolean. Indicate MIC1/2 input and LOUT1/2/3 outputs are differential,
rather than single-ended.
Pins on the device (for linking into audio routes):
* IN1P
* IN1N
* IN2P
* IN2N
* MICBIAS1
* DMIC1
* DMIC2
* DMIC3
* DMIC4
* LOUT1
* LOUT2
* LOUT3
Example:
rt5677 {
compatible = "realtek,rt5677";
reg = <0x2c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
gpio-controller;
#gpio-cells = <2>;
realtek,pow-ldo2-gpio =
<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
realtek,in1-differential = "true";
};

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Samsung Exynos Odroid X2/U3 audio complex with MAX98090 codec
Required properties:
- compatible : "samsung,odroidx2-audio" - for Odroid X2 board,
"samsung,odroidu3-audio" - for Odroid U3 board
- samsung,model : the user-visible name of this sound complex
- samsung,i2s-controller : the phandle of the I2S controller
- samsung,audio-codec : the phandle of the MAX98090 audio codec
- samsung,audio-routing : a list of the connections between audio
components; each entry is a pair of strings, the first being the
connection's sink, the second being the connection's source;
valid names for sources and sinks are the MAX98090's pins (as
documented in its binding), and the jacks on the board
For Odroid X2:
* Headphone Jack
* Mic Jack
* DMIC
For Odroid U3:
* Headphone Jack
* Speakers
Example:
sound {
compatible = "samsung,odroidu3-audio";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&max98090>;
samsung,model = "Odroid-X2";
samsung,audio-routing =
"Headphone Jack", "HPL",
"Headphone Jack", "HPR",
"IN1", "Mic Jack",
"Mic Jack", "MICBIAS";
};

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Samsung SMDK audio complex
Required properties:
- compatible : "samsung,smdk-wm8994"
- samsung,i2s-controller: The phandle of the Samsung I2S0 controller
- samsung,audio-codec: The phandle of the WM8994 audio codec
Example:
sound {
compatible = "samsung,smdk-wm8994";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&wm8994>;
};

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* Samsung I2S controller
Required SoC Specific Properties:
- compatible : should be one of the following.
- samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
secondary fifo, s/w reset control and internal mux for root clk src.
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(7.1) I2S with
secondary fifo, s/w reset control, internal mux for root clk src and
TDM support. TDM (Time division multiplexing) is to allow transfer of
multiple channel audio data on single data line.
- reg: physical base address of the controller and length of memory mapped
region.
- dmas: list of DMA controller phandle and DMA request line ordered pairs.
- dma-names: identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas.
- clocks: Handle to iis clock and RCLK source clk.
- clock-names:
i2s0 uses some base clks from CMU and some are from audio subsystem internal
clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
"i2s_opclk1" as shown in the example below.
i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
be "iis" and "i2s_opclk0".
"iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
doesn't have any such mux.
Optional SoC Specific Properties:
- samsung,idma-addr: Internal DMA register base address of the audio
sub system(used in secondary sound source).
- pinctrl-0: Should specify pin control groups used for this controller.
- pinctrl-names: Should contain only one value - "default".
Example:
i2s0: i2s@03830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
dmas = <&pdma0 10
&pdma0 9
&pdma0 8>;
dma-names = "tx", "rx", "tx-sec";
clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
samsung,idma-addr = <0x03000000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
};

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* Freescale SGTL5000 Stereo Codec
Required properties:
- compatible : "fsl,sgtl5000".
- reg : the I2C address of the device
- clocks : the clock provider of SYS_MCLK
- VDDA-supply : the regulator provider of VDDA
- VDDIO-supply: the regulator provider of VDDIO
Optional properties:
- VDDD-supply : the regulator provider of VDDD
Example:
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 150>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>;
};

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Simple-Card:
Simple-Card specifies audio DAI connections of SoC <-> codec.
Required properties:
- compatible : "simple-audio-card"
Optional properties:
- simple-audio-card,name : User specified audio sound card name, one string
property.
- simple-audio-card,widgets : Please refer to widgets.txt.
- simple-audio-card,routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the
connection's sink, the second being the connection's
source.
- simple-audio-card,mclk-fs : Multiplication factor between stream rate and codec
mclk.
- simple-audio-card,hp-det-gpio : Reference to GPIO that signals when
headphones are attached.
- simple-audio-card,mic-det-gpio : Reference to GPIO that signals when
a microphone is attached.
Optional subnodes:
- simple-audio-card,dai-link : Container for dai-link level
properties and the CPU and CODEC
sub-nodes. This container may be
omitted when the card has only one
DAI link. See the examples and the
section bellow.
Dai-link subnode properties and subnodes:
If dai-link subnode is omitted and the subnode properties are directly
under "sound"-node the subnode property and subnode names have to be
prefixed with "simple-audio-card,"-prefix.
Required dai-link subnodes:
- cpu : CPU sub-node
- codec : CODEC sub-node
Optional dai-link subnode properties:
- format : CPU/CODEC common audio format.
"i2s", "right_j", "left_j" , "dsp_a"
"dsp_b", "ac97", "pdm", "msb", "lsb"
- frame-master : Indicates dai-link frame master.
phandle to a cpu or codec subnode.
- bitclock-master : Indicates dai-link bit clock master.
phandle to a cpu or codec subnode.
- bitclock-inversion : bool property. Add this if the
dai-link uses bit clock inversion.
- frame-inversion : bool property. Add this if the
dai-link uses frame clock inversion.
For backward compatibility the frame-master and bitclock-master
properties can be used as booleans in codec subnode to indicate if the
codec is the dai-link frame or bit clock master. In this case there
should be no dai-link node, the same properties should not be present
at sound-node level, and the bitclock-inversion and frame-inversion
properties should also be placed in the codec node if needed.
Required CPU/CODEC subnodes properties:
- sound-dai : phandle and port of CPU/CODEC
Optional CPU/CODEC subnodes properties:
- dai-tdm-slot-num : Please refer to tdm-slot.txt.
- dai-tdm-slot-width : Please refer to tdm-slot.txt.
- clocks / system-clock-frequency : specify subnode's clock if needed.
it can be specified via "clocks" if system has
clock node (= common clock), or "system-clock-frequency"
(if system doens't support common clock)
Example 1 - single DAI link:
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "VF610-Tower-Sound-Card";
simple-audio-card,format = "left_j";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Headphone", "Headphone Jack",
"Speaker", "External Speaker";
simple-audio-card,routing =
"MIC_IN", "Microphone Jack",
"Headphone Jack", "HP_OUT",
"External Speaker", "LINE_OUT";
simple-audio-card,cpu {
sound-dai = <&sh_fsi2 0>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&ak4648>;
clocks = <&osc>;
};
};
&i2c0 {
ak4648: ak4648@12 {
#sound-dai-cells = <0>;
compatible = "asahi-kasei,ak4648";
reg = <0x12>;
};
};
sh_fsi2: sh_fsi2@ec230000 {
#sound-dai-cells = <1>;
compatible = "renesas,sh_fsi2";
reg = <0xec230000 0x400>;
interrupt-parent = <&gic>;
interrupts = <0 146 0x4>;
};
Example 2 - many DAI links:
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Cubox Audio";
simple-audio-card,dai-link@0 { /* I2S - HDMI */
format = "i2s";
cpu {
sound-dai = <&audio1 0>;
};
codec {
sound-dai = <&tda998x 0>;
};
};
simple-audio-card,dai-link@1 { /* S/PDIF - HDMI */
cpu {
sound-dai = <&audio1 1>;
};
codec {
sound-dai = <&tda998x 1>;
};
};
simple-audio-card,dai-link@2 { /* S/PDIF - S/PDIF */
cpu {
sound-dai = <&audio1 1>;
};
codec {
sound-dai = <&spdif_codec>;
};
};
};

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SiRF internal audio CODEC
Required properties:
- compatible : "sirf,atlas6-audio-codec" or "sirf,prima2-audio-codec"
- reg : the register address of the device.
- clocks: the clock of SiRF internal audio codec
Example:
audiocodec: audiocodec@b0040000 {
compatible = "sirf,atlas6-audio-codec";
reg = <0xb0040000 0x10000>;
clocks = <&clks 27>;
};

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* SiRF SoC audio port
Required properties:
- compatible: "sirf,audio-port"
- reg: Base address and size entries:
- dmas: List of DMA controller phandle and DMA request line ordered pairs.
- dma-names: Identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas.
One of the DMA channels will be responsible for transmission (should be
named "tx") and one for reception (should be named "rx").
Example:
audioport: audioport@b0040000 {
compatible = "sirf,audio-port";
reg = <0xb0040000 0x10000>;
dmas = <&dmac1 3>, <&dmac1 8>;
dma-names = "rx", "tx";
};

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* SiRF atlas6 and prima2 internal audio codec and port based audio setups
Required properties:
- compatible: "sirf,sirf-audio-card"
- sirf,audio-platform: phandle for the platform node
- sirf,audio-codec: phandle for the SiRF internal codec node
Optional properties:
- hp-pa-gpios: Need to be present if the board need control external
headphone amplifier.
- spk-pa-gpios: Need to be present if the board need control external
speaker amplifier.
- hp-switch-gpios: Need to be present if the board capable to detect jack
insertion, removal.
Available audio endpoints for the audio-routing table:
Board connectors:
* Headset Stereophone
* Ext Spk
* Line In
* Mic
SiRF internal audio codec pins:
* HPOUTL
* HPOUTR
* SPKOUT
* Ext Mic
* Mic Bias
Example:
sound {
compatible = "sirf,sirf-audio-card";
sirf,audio-codec = <&audiocodec>;
sirf,audio-platform = <&audioport>;
hp-pa-gpios = <&gpio 44 0>;
spk-pa-gpios = <&gpio 46 0>;
hp-switch-gpios = <&gpio 45 0>;
};

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* SiRF SoC USP module
Required properties:
- compatible: "sirf,prima2-usp-pcm"
- reg: Base address and size entries:
- dmas: List of DMA controller phandle and DMA request line ordered pairs.
- dma-names: Identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas.
One of the DMA channels will be responsible for transmission (should be
named "tx") and one for reception (should be named "rx").
- clocks: USP controller clock source
- pinctrl-names: Must contain a "default" entry.
- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
Example:
usp0: usp@b0080000 {
compatible = "sirf,prima2-usp-pcm";
reg = <0xb0080000 0x10000>;
clocks = <&clks 28>;
dmas = <&dmac1 1>, <&dmac1 2>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&usp0_only_utfs_pins_a>;
};

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Audio Binding for Snow boards
Required properties:
- compatible : Can be one of the following,
"google,snow-audio-max98090" or
"google,snow-audio-max98091" or
"google,snow-audio-max98095"
- samsung,i2s-controller: The phandle of the Samsung I2S controller
- samsung,audio-codec: The phandle of the audio codec
Optional:
- samsung,model: The name of the sound-card
Example:
sound {
compatible = "google,snow-audio-max98095";
samsung,model = "Snow-I2S-MAX98095";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&max98095>;
};

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AC97 link bindings
These bindings can be included within any other device node.
Required properties:
- pinctrl-names: Has to contain following states to setup the correct
pinmuxing for the used gpios:
"ac97-running": AC97-link is active
"ac97-reset": AC97-link reset state
"ac97-warm-reset": AC97-link warm reset state
- ac97-gpios: List of gpio phandles with args in the order ac97-sync,
ac97-sdata, ac97-reset
Example:
ssi {
...
pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
pinctrl-0 = <&ac97link_running>;
pinctrl-1 = <&ac97link_running>;
pinctrl-2 = <&ac97link_reset>;
pinctrl-3 = <&ac97link_warm_reset>;
ac97-gpios = <&gpio3 20 0 &gpio3 22 0 &gpio3 28 0>;
...
};

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Device-Tree bindings for dummy spdif receiver
Required properties:
- compatible: should be "linux,spdif-dir".
Example node:
codec: spdif-receiver {
compatible = "linux,spdif-dir";
};

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Device-Tree bindings for dummy spdif transmitter
Required properties:
- compatible: should be "linux,spdif-dit".
Example node:
codec: spdif-transmitter {
compatible = "linux,spdif-dit";
};

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SSM2518 audio amplifier
This device supports I2C only.
Required properties:
- compatible : Must be "adi,ssm2518"
- reg : the I2C address of the device. This will either be 0x34 (ADDR pin low)
or 0x35 (ADDR pin high)
Optional properties:
- gpios : GPIO connected to the nSD pin. If the property is not present it is
assumed that the nSD pin is hardwired to always on.
Example:
ssm2518: ssm2518@34 {
compatible = "adi,ssm2518";
reg = <0x34>;
gpios = <&gpio 5 0>;
};

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Analog Devices SSM4567 audio amplifier
This device supports I2C only.
Required properties:
- compatible : Must be "adi,ssm4567"
- reg : the I2C address of the device. This will either be 0x34 (LR_SEL/ADDR connected to AGND),
0x35 (LR_SEL/ADDR connected to IOVDD) or 0x36 (LR_SEL/ADDR open).
Example:
ssm4567: ssm4567@34 {
compatible = "adi,ssm4567";
reg = <0x34>;
};

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STA350 audio CODEC
The driver for this device only supports I2C.
Required properties:
- compatible: "st,sta350"
- reg: the I2C address of the device for I2C
- reset-gpios: a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the codec starts.
- power-down-gpios: a GPIO spec for the power down pin. If specified,
it will be deasserted before communication to the codec
starts.
- vdd-dig-supply: regulator spec, providing 3.3V
- vdd-pll-supply: regulator spec, providing 3.3V
- vcc-supply: regulator spec, providing 5V - 26V
Optional properties:
- st,output-conf: number, Selects the output configuration:
0: 2-channel (full-bridge) power, 2-channel data-out
1: 2 (half-bridge). 1 (full-bridge) on-board power
2: 2 Channel (Full-Bridge) Power, 1 Channel FFX
3: 1 Channel Mono-Parallel
If parameter is missing, mode 0 will be enabled.
This property has to be specified as '/bits/ 8' value.
- st,ch1-output-mapping: Channel 1 output mapping
- st,ch2-output-mapping: Channel 2 output mapping
- st,ch3-output-mapping: Channel 3 output mapping
0: Channel 1
1: Channel 2
2: Channel 3
If parameter is missing, channel 1 is chosen.
This properties have to be specified as '/bits/ 8' values.
- st,thermal-warning-recover:
If present, thermal warning recovery is enabled.
- st,thermal-warning-adjustment:
If present, thermal warning adjustment is enabled.
- st,fault-detect-recovery:
If present, then fault recovery will be enabled.
- st,ffx-power-output-mode: string
The FFX power output mode selects how the FFX output timing is
configured. Must be one of these values:
- "drop-compensation"
- "tapered-compensation"
- "full-power-mode"
- "variable-drop-compensation" (default)
- st,drop-compensation-ns: number
Only required for "st,ffx-power-output-mode" ==
"variable-drop-compensation".
Specifies the drop compensation in nanoseconds.
The value must be in the range of 0..300, and only
multiples of 20 are allowed. Default is 140ns.
- st,overcurrent-warning-adjustment:
If present, overcurrent warning adjustment is enabled.
- st,max-power-use-mpcc:
If present, then MPCC bits are used for MPC coefficients,
otherwise standard MPC coefficients are used.
- st,max-power-corr:
If present, power bridge correction for THD reduction near maximum
power output is enabled.
- st,am-reduction-mode:
If present, FFX mode runs in AM reduction mode, otherwise normal
FFX mode is used.
- st,odd-pwm-speed-mode:
If present, PWM speed mode run on odd speed mode (341.3 kHz) on all
channels. If not present, normal PWM spped mode (384 kHz) will be used.
- st,distortion-compensation:
If present, distortion compensation variable uses DCC coefficient.
If not present, preset DC coefficient is used.
- st,invalid-input-detect-mute:
If present, automatic invalid input detect mute is enabled.
- st,activate-mute-output:
If present, a mute output will be activated in ase the volume will
reach a value lower than -76 dBFS.
- st,bridge-immediate-off:
If present, the bridge will be switched off immediately after the
power-down-gpio goes low. Otherwise, the bridge will wait for 13
million clock cycles to pass before shutting down.
- st,noise-shape-dc-cut:
If present, the noise-shaping technique on the DC cutoff filter are
enabled.
- st,powerdown-master-volume:
If present, the power-down pin and I2C power-down functions will
act on the master volume. Otherwise, the functions will act on the
mute commands.
- st,powerdown-delay-divider:
If present, the bridge power-down time will be divided by the provided
value. If not specified, a divider of 1 will be used. Allowed values
are 1, 2, 4, 8, 16, 32, 64 and 128.
This property has to be specified as '/bits/ 8' value.
Example:
codec: sta350@38 {
compatible = "st,sta350";
reg = <0x1c>;
reset-gpios = <&gpio1 19 0>;
power-down-gpios = <&gpio1 16 0>;
st,output-conf = /bits/ 8 <0x3>; // set output to 2-channel
// (full-bridge) power,
// 2-channel data-out
st,ch1-output-mapping = /bits/ 8 <0>; // set channel 1 output ch 1
st,ch2-output-mapping = /bits/ 8 <0>; // set channel 2 output ch 1
st,ch3-output-mapping = /bits/ 8 <0>; // set channel 3 output ch 1
st,max-power-correction; // enables power bridge
// correction for THD reduction
// near maximum power output
st,invalid-input-detect-mute; // mute if no valid digital
// audio signal is provided.
};

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Texas Instruments - tas2552 Codec module
The tas2552 serial control bus communicates through I2C protocols
Required properties:
- compatible - One of:
"ti,tas2552" - TAS2552
- reg - I2C slave address
- supply-*: Required supply regulators are:
"vbat" battery voltage
"iovdd" I/O Voltage
"avdd" Analog DAC Voltage
Optional properties:
- enable-gpio - gpio pin to enable/disable the device
Example:
tas2552: tas2552@41 {
compatible = "ti,tas2552";
reg = <0x41>;
enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
};
For more product information please see the link below:
http://www.ti.com/product/TAS2552

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TDM slot:
This specifies audio DAI's TDM slot.
TDM slot properties:
dai-tdm-slot-num : Number of slots in use.
dai-tdm-slot-width : Width in bits for each slot.
For instance:
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <8>;
And for each spcified driver, there could be one .of_xlate_tdm_slot_mask()
to specify a explicit mapping of the channels and the slots. If it's absent
the default snd_soc_of_xlate_tdm_slot_mask() will be used to generating the
tx and rx masks.
For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
for an active slot as default, and the default active bits are at the LSB of
the masks.

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Texas Instruments PCM1681 8-channel PWM Processor
Required properties:
- compatible: Should contain "ti,pcm1681".
- reg: The i2c address. Should contain <0x4c>.
Examples:
i2c_bus {
pcm1681@4c {
compatible = "ti,pcm1681";
reg = <0x4c>;
};
};

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Texas Instruments TAS5086 6-channel PWM Processor
Required properties:
- compatible: Should contain "ti,tas5086".
- reg: The i2c address. Should contain <0x1b>.
Optional properties:
- reset-gpio: A GPIO spec to define which pin is connected to the
chip's !RESET pin. If specified, the driver will
assert a hardware reset at probe time.
- ti,charge-period: This property should contain the time in microseconds
that closely matches the external single-ended
split-capacitor charge period. The hardware chip
waits for this period of time before starting the
PWM signals. This helps reduce pops and clicks.
When not specified, the hardware default of 1300ms
is retained.
- ti,mid-z-channel-X: Boolean properties, X being a number from 1 to 6.
If given, channel X will start with the Mid-Z start
sequence, otherwise the default Low-Z scheme is used.
The correct configuration depends on how the power
stages connected to the PWM output pins work. Not all
power stages are compatible to Mid-Z - please refer
to the datasheets for more details.
Most systems should not set any of these properties.
- avdd-supply: Power supply for AVDD, providing 3.3V
- dvdd-supply: Power supply for DVDD, providing 3.3V
Examples:
i2c_bus {
tas5086@1b {
compatible = "ti,tas5086";
reg = <0x1b>;
reset-gpio = <&gpio 23 0>;
ti,charge-period = <156000>;
avdd-supply = <&vdd_3v3_reg>;
dvdd-supply = <&vdd_3v3_reg>;
};
};

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Texas Instruments - tlv320aic31xx Codec module
The tlv320aic31xx serial control bus communicates through I2C protocols
Required properties:
- compatible - "string" - One of:
"ti,tlv320aic310x" - Generic TLV320AIC31xx with mono speaker amp
"ti,tlv320aic311x" - Generic TLV320AIC31xx with stereo speaker amp
"ti,tlv320aic3100" - TLV320AIC3100 (mono speaker amp, no MiniDSP)
"ti,tlv320aic3110" - TLV320AIC3110 (stereo speaker amp, no MiniDSP)
"ti,tlv320aic3120" - TLV320AIC3120 (mono speaker amp, MiniDSP)
"ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
- reg - <int> - I2C slave address
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
Optional properties:
- gpio-reset - gpio pin number used for codec reset
- ai31xx-micbias-vg - MicBias Voltage setting
1 or MICBIAS_2_0V - MICBIAS output is powered to 2.0V
2 or MICBIAS_2_5V - MICBIAS output is powered to 2.5V
3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
If this node is not mentioned or if the value is unknown, then
micbias is set to 2.0V.
CODEC output pins:
* HPL
* HPR
* SPL, devices with stereo speaker amp
* SPR, devices with stereo speaker amp
* SPK, devices with mono speaker amp
* MICBIAS
CODEC input pins:
* MIC1LP
* MIC1RP
* MIC1LM
The pins can be used in referring sound node's audio-routing property.
Example:
#include <dt-bindings/sound/tlv320aic31xx-micbias.h>
tlv320aic31xx: tlv320aic31xx@18 {
compatible = "ti,tlv320aic311x";
reg = <0x18>;
ai31xx-micbias-vg = <MICBIAS_OFF>;
HPVDD-supply = <&regulator>;
SPRVDD-supply = <&regulator>;
SPLVDD-supply = <&regulator>;
AVDD-supply = <&regulator>;
IOVDD-supply = <&regulator>;
DVDD-supply = <&regulator>;
};

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Texas Instruments - tlv320aic32x4 Codec module
The tlv320aic32x4 serial control bus communicates through I2C protocols
Required properties:
- compatible: Should be "ti,tlv320aic32x4"
- reg: I2C slave address
- supply-*: Required supply regulators are:
"iov" - digital IO power supply
"ldoin" - LDO power supply
"dv" - Digital core power supply
"av" - Analog core power supply
If you supply ldoin, dv and av are optional. Otherwise they are required
See regulator/regulator.txt for more information about the detailed binding
format.
Optional properties:
- reset-gpios: Reset-GPIO phandle with args as described in gpio/gpio.txt
- clocks/clock-names: Clock named 'mclk' for the master clock of the codec.
See clock/clock-bindings.txt for information about the detailed format.
Example:
codec: tlv320aic32x4@18 {
compatible = "ti,tlv320aic32x4";
reg = <0x18>;
clocks = <&clks 201>;
clock-names = "mclk";
};

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Texas Instruments - tlv320aic3x Codec module
The tlv320aic3x serial control bus communicates through I2C protocols
Required properties:
- compatible - "string" - One of:
"ti,tlv320aic3x" - Generic TLV320AIC3x device
"ti,tlv320aic33" - TLV320AIC33
"ti,tlv320aic3007" - TLV320AIC3007
"ti,tlv320aic3106" - TLV320AIC3106
- reg - <int> - I2C slave address
Optional properties:
- gpio-reset - gpio pin number used for codec reset
- ai3x-gpio-func - <array of 2 int> - AIC3X_GPIO1 & AIC3X_GPIO2 Functionality
- ai3x-micbias-vg - MicBias Voltage required.
1 - MICBIAS output is powered to 2.0V,
2 - MICBIAS output is powered to 2.5V,
3 - MICBIAS output is connected to AVDD,
If this node is not mentioned or if the value is incorrect, then MicBias
is powered down.
- AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the
device as covered in Documentation/devicetree/bindings/regulator/regulator.txt
CODEC output pins:
* LLOUT
* RLOUT
* MONO_LOUT
* HPLOUT
* HPROUT
* HPLCOM
* HPRCOM
CODEC input pins:
* MIC3L
* MIC3R
* LINE1L
* LINE2L
* LINE1R
* LINE2R
The pins can be used in referring sound node's audio-routing property.
Example:
tlv320aic3x: tlv320aic3x@1b {
compatible = "ti,tlv320aic3x";
reg = <0x1b>;
AVDD-supply = <&regulator>;
IOVDD-supply = <&regulator>;
DRVDD-supply = <&regulator>;
DVDD-supply = <&regulator>;
};

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Texas Instruments - tpa6130a2 Codec module
The tpa6130a2 serial control bus communicates through I2C protocols
Required properties:
- compatible - "string" - One of:
"ti,tpa6130a2" - TPA6130A2
"ti,tpa6140a2" - TPA6140A2
- reg - <int> - I2C slave address
- Vdd-supply - <phandle> - power supply regulator
Optional properties:
- power-gpio - gpio pin to power the device
Example:
tpa6130a2: tpa6130a2@60 {
compatible = "ti,tpa6130a2";
reg = <0x60>;
Vdd-supply = <&vmmc2>;
power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
};

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* MOP500 Audio Machine Driver
This node is responsible for linking together all ux500 Audio Driver components.
Required properties:
- compatible : "stericsson,snd-soc-mop500"
Non-standard properties:
- stericsson,cpu-dai : Phandle to the CPU-side DAI
- stericsson,audio-codec : Phandle to the Audio CODEC
- stericsson,card-name : Over-ride default card name
Example:
sound {
compatible = "stericsson,snd-soc-mop500";
stericsson,cpu-dai = <&msp1 &msp3>;
stericsson,audio-codec = <&codec>;
};
msp1: msp@80124000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80124000 0x1000>;
interrupts = <0 62 0x4>;
v-ape-supply = <&db8500_vape_reg>;
};
msp3: msp@80125000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80125000 0x1000>;
interrupts = <0 62 0x4>;
v-ape-supply = <&db8500_vape_reg>;
};
codec: ab8500-codec {
compatible = "stericsson,ab8500-codec";
stericsson,earpeice-cmv = <950>; /* Units in mV. */
};

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* ux500 MSP (CPU-side Digital Audio Interface)
Required properties:
- compatible :"stericsson,ux500-msp-i2s"
- reg : Physical base address and length of the device's registers.
Optional properties:
- interrupts : The interrupt output from the device.
- interrupt-parent : The parent interrupt controller.
- <name>-supply : Phandle to the regulator <name> supply
Example:
sound {
compatible = "stericsson,snd-soc-mop500";
stericsson,platform-pcm-dma = <&pcm>;
stericsson,cpu-dai = <&msp1 &msp3>;
stericsson,audio-codec = <&codec>;
};
pcm: ux500-pcm {
compatible = "stericsson,ux500-pcm";
};
msp1: msp@80124000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80124000 0x1000>;
interrupts = <0 62 0x4>;
v-ape-supply = <&db8500_vape_reg>;
};
msp3: msp@80125000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80125000 0x1000>;
interrupts = <0 62 0x4>;
v-ape-supply = <&db8500_vape_reg>;
};
codec: ab8500-codec {
compatible = "stericsson,ab8500-codec";
stericsson,earpeice-cmv = <950>; /* Units in mV. */
};

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Widgets:
This mainly specifies audio off-codec DAPM widgets.
Each entry is a pair of strings in DT:
"template-wname", "user-supplied-wname"
The "template-wname" being the template widget name and currently includes:
"Microphone", "Line", "Headphone" and "Speaker".
The "user-supplied-wname" being the user specified widget name.
For instance:
simple-audio-widgets =
"Microphone", "Microphone Jack",
"Line", "Line In Jack",
"Line", "Line Out Jack",
"Headphone", "Headphone Jack",
"Speaker", "Speaker External";

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