mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-31 08:08:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
183
arch/arm/boot/dts/imx53-ard.dts
Normal file
183
arch/arm/boot/dts/imx53-ard.dts
Normal file
|
|
@ -0,0 +1,183 @@
|
|||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx53.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX53 Automotive Reference Design Board";
|
||||
compatible = "fsl,imx53-ard", "fsl,imx53";
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x40000000>;
|
||||
};
|
||||
|
||||
eim-cs1@f4000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eim-bus", "simple-bus";
|
||||
reg = <0xf4000000 0x3ff0000>;
|
||||
ranges;
|
||||
|
||||
lan9220@f4000000 {
|
||||
compatible = "smsc,lan9220", "smsc,lan9115";
|
||||
reg = <0xf4000000 0x2000000>;
|
||||
phy-mode = "mii";
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <31 0x8>;
|
||||
reg-io-width = <4>;
|
||||
/*
|
||||
* VDD33A and VDDVARIO of LAN9220 are supplied by
|
||||
* SW4_3V3 of LTC3589. Before the regulator driver
|
||||
* for this PMIC is available, we use a fixed dummy
|
||||
* 3V3 regulator to get LAN9220 driver probing work.
|
||||
*/
|
||||
vdd33a-supply = <®_3p3v>;
|
||||
vddvario-supply = <®_3p3v>;
|
||||
smsc,irq-push-pull;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg_3p3v: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <0>;
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
home {
|
||||
label = "Home";
|
||||
gpios = <&gpio5 10 0>;
|
||||
linux,code = <102>; /* KEY_HOME */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
back {
|
||||
label = "Back";
|
||||
gpios = <&gpio5 11 0>;
|
||||
linux,code = <158>; /* KEY_BACK */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
program {
|
||||
label = "Program";
|
||||
gpios = <&gpio5 12 0>;
|
||||
linux,code = <362>; /* KEY_PROGRAM */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
volume-up {
|
||||
label = "Volume Up";
|
||||
gpios = <&gpio5 13 0>;
|
||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||
};
|
||||
|
||||
volume-down {
|
||||
label = "Volume Down";
|
||||
gpios = <&gpio4 0 0>;
|
||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
cd-gpios = <&gpio1 1 0>;
|
||||
wp-gpios = <&gpio1 9 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
imx53-ard {
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX53_PAD_GPIO_1__GPIO1_1 0x80000000
|
||||
MX53_PAD_GPIO_9__GPIO1_9 0x80000000
|
||||
MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
|
||||
MX53_PAD_GPIO_10__GPIO4_0 0x80000000
|
||||
MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000
|
||||
MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000
|
||||
MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000
|
||||
MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000
|
||||
MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000
|
||||
MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000
|
||||
MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000
|
||||
MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000
|
||||
MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000
|
||||
MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000
|
||||
MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000
|
||||
MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000
|
||||
MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000
|
||||
MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000
|
||||
MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000
|
||||
MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000
|
||||
MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000
|
||||
MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000
|
||||
MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000
|
||||
MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000
|
||||
MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
|
||||
MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
|
||||
MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
|
||||
MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
|
||||
MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
|
||||
MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
|
||||
MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
|
||||
MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
|
||||
MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
|
||||
MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_esdhc1: esdhc1grp {
|
||||
fsl,pins = <
|
||||
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
|
||||
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
|
||||
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
|
||||
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
|
||||
MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5
|
||||
MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5
|
||||
MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5
|
||||
MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5
|
||||
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
|
||||
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Add table
Add a link
Reference in a new issue