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	Fixed MTP to work with TWRP
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								arch/arm/boot/dts/pxa27x.dtsi
									
										
									
									
									
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										56
									
								
								arch/arm/boot/dts/pxa27x.dtsi
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,56 @@ | |||
| /* The pxa3xx skeleton simply augments the 2xx version */ | ||||
| #include "pxa2xx.dtsi" | ||||
| #include "dt-bindings/clock/pxa2xx-clock.h" | ||||
| 
 | ||||
| / { | ||||
| 	model = "Marvell PXA27x familiy SoC"; | ||||
| 	compatible = "marvell,pxa27x"; | ||||
| 
 | ||||
| 	pxabus { | ||||
| 		pxairq: interrupt-controller@40d00000 { | ||||
| 			marvell,intc-priority; | ||||
| 			marvell,intc-nr-irqs = <34>; | ||||
| 		}; | ||||
| 
 | ||||
| 		pwm0: pwm@40b00000 { | ||||
| 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | ||||
| 			reg = <0x40b00000 0x10>; | ||||
| 			#pwm-cells = <1>; | ||||
| 		}; | ||||
| 
 | ||||
| 		pwm1: pwm@40b00010 { | ||||
| 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | ||||
| 			reg = <0x40b00010 0x10>; | ||||
| 			#pwm-cells = <1>; | ||||
| 		}; | ||||
| 
 | ||||
| 		pwm2: pwm@40c00000 { | ||||
| 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | ||||
| 			reg = <0x40c00000 0x10>; | ||||
| 			#pwm-cells = <1>; | ||||
| 		}; | ||||
| 
 | ||||
| 		pwm3: pwm@40c00010 { | ||||
| 			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; | ||||
| 			reg = <0x40c00010 0x10>; | ||||
| 			#pwm-cells = <1>; | ||||
| 		}; | ||||
| 	}; | ||||
| 
 | ||||
| 	clocks { | ||||
| 	       /* | ||||
| 		* The muxing of external clocks/internal dividers for osc* clock | ||||
| 		* sources has been hidden under the carpet by now. | ||||
| 		*/ | ||||
| 		#address-cells = <1>; | ||||
| 		#size-cells = <1>; | ||||
| 		ranges; | ||||
| 
 | ||||
| 		pxa2xx_clks: pxa2xx_clks@41300004 { | ||||
| 			compatible = "marvell,pxa-clocks"; | ||||
| 			#clock-cells = <1>; | ||||
| 			status = "okay"; | ||||
| 		}; | ||||
| 	}; | ||||
| 
 | ||||
| }; | ||||
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