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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 15:48:52 +01:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
92
arch/arm/boot/dts/s5pv210-torbreck.dts
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92
arch/arm/boot/dts/s5pv210-torbreck.dts
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/*
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* Samsung's S5PV210 SoC device tree source
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*
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* Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
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*
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* Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
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* Tomasz Figa <t.figa@samsung.com>
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*
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* Board device tree source for Torbreck board.
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*
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* NOTE: This file is completely based on original board file for mach-torbreck
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* available in Linux 3.15 and intends to provide equivalent level of hardware
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* support. Due to lack of hardware, _no_ testing has been performed.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "s5pv210.dtsi"
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/ {
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model = "aESOP Torbreck based on S5PV210";
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compatible = "aesop,torbreck", "samsung,s5pv210";
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chosen {
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bootargs = "console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x20000000 0x20000000>;
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};
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};
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&xusbxti {
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clock-frequency = <24000000>;
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&sdhci0 {
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bus-width = <4>;
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus1 &sd0_bus4>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sdhci1 {
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bus-width = <4>;
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pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus1 &sd1_bus4>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sdhci2 {
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bus-width = <4>;
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pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sdhci3 {
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bus-width = <4>;
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pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_cd &sd3_bus1 &sd3_bus4>;
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pinctrl-names = "default";
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status = "okay";
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};
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&i2s0 {
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status = "okay";
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};
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