mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 23:58:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
633
arch/arm/boot/dts/s5pv210.dtsi
Normal file
633
arch/arm/boot/dts/s5pv210.dtsi
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@ -0,0 +1,633 @@
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/*
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* Samsung's S5PV210 SoC device tree source
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*
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* Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
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*
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* Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
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* Tomasz Figa <t.figa@samsung.com>
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*
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* Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
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* based board files can include this file and provide values for board specfic
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* bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/s5pv210.h>
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#include <dt-bindings/clock/s5pv210-audss.h>
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/ {
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aliases {
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csis0 = &csis0;
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fimc0 = &fimc0;
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fimc1 = &fimc1;
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fimc2 = &fimc2;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2s0 = &i2s0;
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i2s1 = &i2s1;
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i2s2 = &i2s2;
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pinctrl0 = &pinctrl0;
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spi0 = &spi0;
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spi1 = &spi1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a8";
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reg = <0>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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external-clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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xxti: oscillator@0 {
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compatible = "fixed-clock";
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reg = <0>;
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clock-frequency = <0>;
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clock-output-names = "xxti";
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#clock-cells = <0>;
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};
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xusbxti: oscillator@1 {
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compatible = "fixed-clock";
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reg = <1>;
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clock-frequency = <0>;
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clock-output-names = "xusbxti";
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#clock-cells = <0>;
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};
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};
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onenand: onenand@b0000000 {
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compatible = "samsung,s5pv210-onenand";
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reg = <0xb0600000 0x2000>,
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<0xb0000000 0x20000>,
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<0xb0040000 0x20000>;
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interrupt-parent = <&vic1>;
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interrupts = <31>;
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clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
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clock-names = "bus", "onenand";
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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chipid@e0000000 {
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compatible = "samsung,s5pv210-chipid";
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reg = <0xe0000000 0x1000>;
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};
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clocks: clock-controller@e0100000 {
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compatible = "samsung,s5pv210-clock", "simple-bus";
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reg = <0xe0100000 0x10000>;
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clock-names = "xxti", "xusbxti";
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clocks = <&xxti>, <&xusbxti>;
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#clock-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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pmu_syscon: syscon@e0108000 {
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compatible = "samsung-s5pv210-pmu", "syscon";
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reg = <0xe0108000 0x8000>;
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};
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};
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pinctrl0: pinctrl@e0200000 {
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compatible = "samsung,s5pv210-pinctrl";
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reg = <0xe0200000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <30>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupts = <16>;
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interrupt-parent = <&vic0>;
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};
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};
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "arm,amba-bus";
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ranges;
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pdma0: dma@e0900000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0xe0900000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <19>;
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clocks = <&clocks CLK_PDMA0>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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};
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pdma1: dma@e0a00000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0xe0a00000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <20>;
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clocks = <&clocks CLK_PDMA1>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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};
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};
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spi0: spi@e1300000 {
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compatible = "samsung,s5pv210-spi";
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reg = <0xe1300000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <15>;
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dmas = <&pdma0 7>, <&pdma0 6>;
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dma-names = "tx", "rx";
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clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
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clock-names = "spi", "spi_busclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_bus>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@e1400000 {
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compatible = "samsung,s5pv210-spi";
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reg = <0xe1400000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <16>;
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dmas = <&pdma1 7>, <&pdma1 6>;
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dma-names = "tx", "rx";
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clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
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clock-names = "spi", "spi_busclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_bus>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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keypad: keypad@e1600000 {
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compatible = "samsung,s5pv210-keypad";
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reg = <0xe1600000 0x1000>;
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interrupt-parent = <&vic2>;
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interrupts = <25>;
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clocks = <&clocks CLK_KEYIF>;
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clock-names = "keypad";
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status = "disabled";
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};
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i2c0: i2c@e1800000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0xe1800000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <14>;
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clocks = <&clocks CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@e1a00000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0xe1a00000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <19>;
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clocks = <&clocks CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-0 = <&i2c2_bus>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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audio-subsystem {
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compatible = "samsung,s5pv210-audss", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clk_audss: clock-controller@eee10000 {
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compatible = "samsung,s5pv210-audss-clock";
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reg = <0xeee10000 0x1000>;
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clock-names = "hclk", "xxti",
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"fout_epll",
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"sclk_audio0";
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clocks = <&clocks DOUT_HCLKP>, <&xxti>,
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<&clocks FOUT_EPLL>,
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<&clocks SCLK_AUDIO0>;
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#clock-cells = <1>;
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};
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i2s0: i2s@eee30000 {
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compatible = "samsung,s5pv210-i2s";
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reg = <0xeee30000 0x1000>;
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interrupt-parent = <&vic2>;
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interrupts = <16>;
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dma-names = "rx", "tx", "tx-sec";
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dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
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clock-names = "iis",
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"i2s_opclk0",
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"i2s_opclk1";
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clocks = <&clk_audss CLK_I2S>,
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<&clk_audss CLK_I2S>,
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<&clk_audss CLK_DOUT_AUD_BUS>;
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samsung,idma-addr = <0xc0010000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_bus>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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};
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i2s1: i2s@e2100000 {
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compatible = "samsung,s3c6410-i2s";
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reg = <0xe2100000 0x1000>;
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interrupt-parent = <&vic2>;
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interrupts = <17>;
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dma-names = "rx", "tx";
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dmas = <&pdma1 12>, <&pdma1 13>;
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clock-names = "iis", "i2s_opclk0";
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clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1_bus>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s2: i2s@e2a00000 {
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compatible = "samsung,s3c6410-i2s";
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reg = <0xe2a00000 0x1000>;
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interrupt-parent = <&vic2>;
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interrupts = <18>;
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dma-names = "rx", "tx";
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dmas = <&pdma1 14>, <&pdma1 15>;
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clock-names = "iis", "i2s_opclk0";
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clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s2_bus>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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pwm: pwm@e2500000 {
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compatible = "samsung,s5pc100-pwm";
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reg = <0xe2500000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <21>, <22>, <23>, <24>, <25>;
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clock-names = "timers";
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clocks = <&clocks CLK_PWM>;
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#pwm-cells = <3>;
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};
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watchdog: watchdog@e2700000 {
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compatible = "samsung,s3c2410-wdt";
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reg = <0xe2700000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <26>;
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clock-names = "watchdog";
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clocks = <&clocks CLK_WDT>;
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};
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rtc: rtc@e2800000 {
|
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compatible = "samsung,s3c6410-rtc";
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reg = <0xe2800000 0x100>;
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interrupt-parent = <&vic0>;
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interrupts = <28>, <29>;
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clocks = <&clocks CLK_RTC>;
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clock-names = "rtc";
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status = "disabled";
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||||
};
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uart0: serial@e2900000 {
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compatible = "samsung,s5pv210-uart";
|
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reg = <0xe2900000 0x400>;
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interrupt-parent = <&vic1>;
|
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interrupts = <10>;
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clock-names = "uart", "clk_uart_baud0",
|
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"clk_uart_baud1";
|
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clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
|
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<&clocks SCLK_UART0>;
|
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status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@e2900400 {
|
||||
compatible = "samsung,s5pv210-uart";
|
||||
reg = <0xe2900400 0x400>;
|
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interrupt-parent = <&vic1>;
|
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interrupts = <11>;
|
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clock-names = "uart", "clk_uart_baud0",
|
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"clk_uart_baud1";
|
||||
clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
|
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<&clocks SCLK_UART1>;
|
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status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@e2900800 {
|
||||
compatible = "samsung,s5pv210-uart";
|
||||
reg = <0xe2900800 0x400>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <12>;
|
||||
clock-names = "uart", "clk_uart_baud0",
|
||||
"clk_uart_baud1";
|
||||
clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
|
||||
<&clocks SCLK_UART2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@e2900c00 {
|
||||
compatible = "samsung,s5pv210-uart";
|
||||
reg = <0xe2900c00 0x400>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <13>;
|
||||
clock-names = "uart", "clk_uart_baud0",
|
||||
"clk_uart_baud1";
|
||||
clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
|
||||
<&clocks SCLK_UART3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci0: sdhci@eb000000 {
|
||||
compatible = "samsung,s3c6410-sdhci";
|
||||
reg = <0xeb000000 0x100000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <26>;
|
||||
clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
|
||||
clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
|
||||
<&clocks SCLK_MMC0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci1: sdhci@eb100000 {
|
||||
compatible = "samsung,s3c6410-sdhci";
|
||||
reg = <0xeb100000 0x100000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <27>;
|
||||
clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
|
||||
clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
|
||||
<&clocks SCLK_MMC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci2: sdhci@eb200000 {
|
||||
compatible = "samsung,s3c6410-sdhci";
|
||||
reg = <0xeb200000 0x100000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <28>;
|
||||
clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
|
||||
clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
|
||||
<&clocks SCLK_MMC2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci3: sdhci@eb300000 {
|
||||
compatible = "samsung,s3c6410-sdhci";
|
||||
reg = <0xeb300000 0x100000>;
|
||||
interrupt-parent = <&vic3>;
|
||||
interrupts = <2>;
|
||||
clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
|
||||
clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
|
||||
<&clocks SCLK_MMC3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsotg: hsotg@ec000000 {
|
||||
compatible = "samsung,s3c6400-hsotg";
|
||||
reg = <0xec000000 0x20000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <24>;
|
||||
clocks = <&clocks CLK_USB_OTG>;
|
||||
clock-names = "otg";
|
||||
phy-names = "usb2-phy";
|
||||
phys = <&usbphy 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usbphy@ec100000 {
|
||||
compatible = "samsung,s5pv210-usb2-phy";
|
||||
reg = <0xec100000 0x100>;
|
||||
samsung,pmureg-phandle = <&pmu_syscon>;
|
||||
clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
|
||||
clock-names = "phy", "ref";
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci: ehci@ec200000 {
|
||||
compatible = "samsung,exynos4210-ehci";
|
||||
reg = <0xec200000 0x100>;
|
||||
interrupts = <23>;
|
||||
interrupt-parent = <&vic1>;
|
||||
clocks = <&clocks CLK_USB_HOST>;
|
||||
clock-names = "usbhost";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
phys = <&usbphy 1>;
|
||||
};
|
||||
};
|
||||
|
||||
ohci: ohci@ec300000 {
|
||||
compatible = "samsung,exynos4210-ohci";
|
||||
reg = <0xec300000 0x100>;
|
||||
interrupts = <23>;
|
||||
clocks = <&clocks CLK_USB_HOST>;
|
||||
clock-names = "usbhost";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
phys = <&usbphy 1>;
|
||||
};
|
||||
};
|
||||
|
||||
mfc: codec@f1700000 {
|
||||
compatible = "samsung,mfc-v5";
|
||||
reg = <0xf1700000 0x10000>;
|
||||
interrupt-parent = <&vic2>;
|
||||
interrupts = <14>;
|
||||
clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
|
||||
clock-names = "sclk_mfc", "mfc";
|
||||
};
|
||||
|
||||
vic0: interrupt-controller@f2000000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0xf2000000 0x1000>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
vic1: interrupt-controller@f2100000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0xf2100000 0x1000>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
vic2: interrupt-controller@f2200000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0xf2200000 0x1000>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
vic3: interrupt-controller@f2300000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0xf2300000 0x1000>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
fimd: fimd@f8000000 {
|
||||
compatible = "samsung,exynos4210-fimd";
|
||||
interrupt-parent = <&vic2>;
|
||||
reg = <0xf8000000 0x20000>;
|
||||
interrupt-names = "fifo", "vsync", "lcd_sys";
|
||||
interrupts = <0>, <1>, <2>;
|
||||
clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
|
||||
clock-names = "sclk_fimd", "fimd";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
g2d: g2d@fa000000 {
|
||||
compatible = "samsung,s5pv210-g2d";
|
||||
reg = <0xfa000000 0x1000>;
|
||||
interrupt-parent = <&vic2>;
|
||||
interrupts = <9>;
|
||||
clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
|
||||
clock-names = "sclk_fimg2d", "fimg2d";
|
||||
};
|
||||
|
||||
mdma1: mdma@fa200000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0xfa200000 0x1000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <18>;
|
||||
clocks = <&clocks CLK_MDMA>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <1>;
|
||||
};
|
||||
|
||||
i2c1: i2c@fab00000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0xfab00000 0x1000>;
|
||||
interrupt-parent = <&vic2>;
|
||||
interrupts = <13>;
|
||||
clocks = <&clocks CLK_I2C1>;
|
||||
clock-names = "i2c";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_bus>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
camera: camera {
|
||||
compatible = "samsung,fimc", "simple-bus";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <>;
|
||||
clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
|
||||
clock-names = "sclk_cam0", "sclk_cam1";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clock_cam: clock-controller {
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
csis0: csis@fa600000 {
|
||||
compatible = "samsung,s5pv210-csis";
|
||||
reg = <0xfa600000 0x4000>;
|
||||
interrupt-parent = <&vic2>;
|
||||
interrupts = <29>;
|
||||
clocks = <&clocks CLK_CSIS>,
|
||||
<&clocks SCLK_CSIS>;
|
||||
clock-names = "clk_csis",
|
||||
"sclk_csis";
|
||||
bus-width = <4>;
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
fimc0: fimc@fb200000 {
|
||||
compatible = "samsung,s5pv210-fimc";
|
||||
reg = <0xfb200000 0x1000>;
|
||||
interrupts = <5>;
|
||||
interrupt-parent = <&vic2>;
|
||||
clocks = <&clocks CLK_FIMC0>,
|
||||
<&clocks SCLK_FIMC0>;
|
||||
clock-names = "fimc",
|
||||
"sclk_fimc";
|
||||
samsung,pix-limits = <4224 8192 1920 4224>;
|
||||
samsung,mainscaler-ext;
|
||||
samsung,cam-if;
|
||||
};
|
||||
|
||||
fimc1: fimc@fb300000 {
|
||||
compatible = "samsung,s5pv210-fimc";
|
||||
reg = <0xfb300000 0x1000>;
|
||||
interrupt-parent = <&vic2>;
|
||||
interrupts = <6>;
|
||||
clocks = <&clocks CLK_FIMC1>,
|
||||
<&clocks SCLK_FIMC1>;
|
||||
clock-names = "fimc",
|
||||
"sclk_fimc";
|
||||
samsung,pix-limits = <4224 8192 1920 4224>;
|
||||
samsung,mainscaler-ext;
|
||||
samsung,cam-if;
|
||||
};
|
||||
|
||||
fimc2: fimc@fb400000 {
|
||||
compatible = "samsung,s5pv210-fimc";
|
||||
reg = <0xfb400000 0x1000>;
|
||||
interrupt-parent = <&vic2>;
|
||||
interrupts = <7>;
|
||||
clocks = <&clocks CLK_FIMC2>,
|
||||
<&clocks SCLK_FIMC2>;
|
||||
clock-names = "fimc",
|
||||
"sclk_fimc";
|
||||
samsung,pix-limits = <4224 8192 1920 4224>;
|
||||
samsung,mainscaler-ext;
|
||||
samsung,lcd-wb;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "s5pv210-pinctrl.dtsi"
|
||||
Loading…
Add table
Add a link
Reference in a new issue