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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
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Fixed MTP to work with TWRP
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awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
33
arch/arm/mach-ebsa110/include/mach/entry-macro.S
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33
arch/arm/mach-ebsa110/include/mach/entry-macro.S
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/*
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* arch/arm/mach-ebsa110/include/mach/entry-macro.S
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*
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* Low-level IRQ helper macros for ebsa110 platform.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#define IRQ_STAT 0xff000000 /* read */
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.macro get_irqnr_preamble, base, tmp
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mov \base, #IRQ_STAT
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.endm
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.macro get_irqnr_and_base, irqnr, stat, base, tmp
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ldrb \stat, [\base] @ get interrupts
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mov \irqnr, #0
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tst \stat, #15
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addeq \irqnr, \irqnr, #4
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moveq \stat, \stat, lsr #4
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tst \stat, #3
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addeq \irqnr, \irqnr, #2
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moveq \stat, \stat, lsr #2
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tst \stat, #1
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addeq \irqnr, \irqnr, #1
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moveq \stat, \stat, lsr #1
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tst \stat, #1 @ bit 0 should be set
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.endm
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24
arch/arm/mach-ebsa110/include/mach/hardware.h
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24
arch/arm/mach-ebsa110/include/mach/hardware.h
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@ -0,0 +1,24 @@
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/*
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* arch/arm/mach-ebsa110/include/mach/hardware.h
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*
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* Copyright (C) 1996-2000 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the hardware definitions of the EBSA-110.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#define ISAMEM_BASE 0xe0000000
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#define ISAIO_BASE 0xf0000000
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/*
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* RAM definitions
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*/
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#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
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#endif
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81
arch/arm/mach-ebsa110/include/mach/io.h
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81
arch/arm/mach-ebsa110/include/mach/io.h
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@ -0,0 +1,81 @@
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/*
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* arch/arm/mach-ebsa110/include/mach/io.h
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*
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* Copyright (C) 1997,1998 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Modifications:
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* 06-Dec-1997 RMK Created.
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*/
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#ifndef __ASM_ARM_ARCH_IO_H
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#define __ASM_ARM_ARCH_IO_H
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u8 __inb8(unsigned int port);
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void __outb8(u8 val, unsigned int port);
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u8 __inb16(unsigned int port);
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void __outb16(u8 val, unsigned int port);
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u16 __inw(unsigned int port);
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void __outw(u16 val, unsigned int port);
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u32 __inl(unsigned int port);
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void __outl(u32 val, unsigned int port);
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u8 __readb(const volatile void __iomem *addr);
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u16 __readw(const volatile void __iomem *addr);
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u32 __readl(const volatile void __iomem *addr);
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void __writeb(u8 val, void __iomem *addr);
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void __writew(u16 val, void __iomem *addr);
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void __writel(u32 val, void __iomem *addr);
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/*
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* Argh, someone forgot the IOCS16 line. We therefore have to handle
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* the byte stearing by selecting the correct byte IO functions here.
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*/
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#ifdef ISA_SIXTEEN_BIT_PERIPHERAL
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#define inb(p) __inb16(p)
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#define outb(v,p) __outb16(v,p)
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#else
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#define inb(p) __inb8(p)
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#define outb(v,p) __outb8(v,p)
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#endif
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#define inw(p) __inw(p)
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#define outw(v,p) __outw(v,p)
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#define inl(p) __inl(p)
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#define outl(v,p) __outl(v,p)
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#define readb(b) __readb(b)
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#define readw(b) __readw(b)
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#define readl(b) __readl(b)
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define writeb(v,b) __writeb(v,b)
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#define writew(v,b) __writew(v,b)
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#define writel(v,b) __writel(v,b)
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extern void insb(unsigned int port, void *buf, int sz);
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extern void insw(unsigned int port, void *buf, int sz);
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extern void insl(unsigned int port, void *buf, int sz);
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extern void outsb(unsigned int port, const void *buf, int sz);
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extern void outsw(unsigned int port, const void *buf, int sz);
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extern void outsl(unsigned int port, const void *buf, int sz);
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/* can't support writesb atm */
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extern void writesw(void __iomem *addr, const void *data, int wordlen);
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extern void writesl(void __iomem *addr, const void *data, int longlen);
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/* can't support readsb atm */
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extern void readsw(const void __iomem *addr, void *data, int wordlen);
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extern void readsl(const void __iomem *addr, void *data, int longlen);
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#endif
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20
arch/arm/mach-ebsa110/include/mach/irqs.h
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20
arch/arm/mach-ebsa110/include/mach/irqs.h
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/*
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* arch/arm/mach-ebsa110/include/mach/irqs.h
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*
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* Copyright (C) 1996 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define NR_IRQS 8
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#define IRQ_EBSA110_PRINTER 0
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#define IRQ_EBSA110_COM1 1
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#define IRQ_EBSA110_COM2 2
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#define IRQ_EBSA110_ETHERNET 3
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#define IRQ_EBSA110_TIMER0 4
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#define IRQ_EBSA110_TIMER1 5
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#define IRQ_EBSA110_PCMCIA 6
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#define IRQ_EBSA110_IMMEDIATE 7
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25
arch/arm/mach-ebsa110/include/mach/memory.h
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25
arch/arm/mach-ebsa110/include/mach/memory.h
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/*
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* arch/arm/mach-ebsa110/include/mach/memory.h
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*
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* Copyright (C) 1996-1999 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 20-Oct-1996 RMK Created
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* 31-Dec-1997 RMK Fixed definitions to reduce warnings
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* 21-Mar-1999 RMK Renamed to memory.h
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* RMK Moved TASK_SIZE and PAGE_OFFSET here
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*/
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H
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/*
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* Cache flushing area - SRAM
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*/
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#define FLUSH_BASE_PHYS 0x40000000
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#define FLUSH_BASE 0xdf000000
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#endif
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44
arch/arm/mach-ebsa110/include/mach/uncompress.h
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44
arch/arm/mach-ebsa110/include/mach/uncompress.h
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/*
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* arch/arm/mach-ebsa110/include/mach/uncompress.h
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*
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* Copyright (C) 1996,1997,1998 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_reg.h>
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#define SERIAL_BASE ((unsigned char *)0xf0000be0)
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/*
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* This does not append a newline
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*/
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static inline void putc(int c)
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{
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unsigned char v, *base = SERIAL_BASE;
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do {
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v = base[UART_LSR << 2];
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barrier();
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} while (!(v & UART_LSR_THRE));
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base[UART_TX << 2] = c;
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}
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static inline void flush(void)
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{
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unsigned char v, *base = SERIAL_BASE;
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do {
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v = base[UART_LSR << 2];
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barrier();
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} while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) !=
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(UART_LSR_TEMT|UART_LSR_THRE));
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}
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/*
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* nothing to do
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*/
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#define arch_decomp_setup()
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