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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 23:58:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
177
arch/arm/mach-ks8695/irq.c
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177
arch/arm/mach-ks8695/irq.c
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/*
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* arch/arm/mach-ks8695/irq.c
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*
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* Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
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* Copyright (C) 2006 Simtec Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-gpio.h>
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static void ks8695_irq_mask(struct irq_data *d)
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{
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unsigned long inten;
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inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
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inten &= ~(1 << d->irq);
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__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
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}
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static void ks8695_irq_unmask(struct irq_data *d)
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{
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unsigned long inten;
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inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN);
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inten |= (1 << d->irq);
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__raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN);
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}
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static void ks8695_irq_ack(struct irq_data *d)
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{
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__raw_writel((1 << d->irq), KS8695_IRQ_VA + KS8695_INTST);
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}
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static struct irq_chip ks8695_irq_level_chip;
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static struct irq_chip ks8695_irq_edge_chip;
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static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
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{
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unsigned long ctrl, mode;
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unsigned short level_triggered = 0;
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ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
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switch (type) {
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case IRQ_TYPE_LEVEL_HIGH:
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mode = IOPC_TM_HIGH;
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level_triggered = 1;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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mode = IOPC_TM_LOW;
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level_triggered = 1;
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break;
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case IRQ_TYPE_EDGE_RISING:
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mode = IOPC_TM_RISING;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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mode = IOPC_TM_FALLING;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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mode = IOPC_TM_EDGE;
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break;
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default:
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return -EINVAL;
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}
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switch (d->irq) {
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case KS8695_IRQ_EXTERN0:
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ctrl &= ~IOPC_IOEINT0TM;
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ctrl |= IOPC_IOEINT0_MODE(mode);
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break;
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case KS8695_IRQ_EXTERN1:
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ctrl &= ~IOPC_IOEINT1TM;
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ctrl |= IOPC_IOEINT1_MODE(mode);
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break;
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case KS8695_IRQ_EXTERN2:
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ctrl &= ~IOPC_IOEINT2TM;
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ctrl |= IOPC_IOEINT2_MODE(mode);
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break;
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case KS8695_IRQ_EXTERN3:
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ctrl &= ~IOPC_IOEINT3TM;
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ctrl |= IOPC_IOEINT3_MODE(mode);
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break;
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default:
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return -EINVAL;
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}
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if (level_triggered) {
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irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip,
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handle_level_irq);
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}
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else {
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irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip,
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handle_edge_irq);
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}
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__raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
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return 0;
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}
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static struct irq_chip ks8695_irq_level_chip = {
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.irq_ack = ks8695_irq_mask,
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.irq_mask = ks8695_irq_mask,
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.irq_unmask = ks8695_irq_unmask,
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.irq_set_type = ks8695_irq_set_type,
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};
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static struct irq_chip ks8695_irq_edge_chip = {
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.irq_ack = ks8695_irq_ack,
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.irq_mask = ks8695_irq_mask,
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.irq_unmask = ks8695_irq_unmask,
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.irq_set_type = ks8695_irq_set_type,
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};
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void __init ks8695_init_irq(void)
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{
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unsigned int irq;
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/* Disable all interrupts initially */
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__raw_writel(0, KS8695_IRQ_VA + KS8695_INTMC);
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__raw_writel(0, KS8695_IRQ_VA + KS8695_INTEN);
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for (irq = 0; irq < NR_IRQS; irq++) {
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switch (irq) {
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/* Level-triggered interrupts */
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case KS8695_IRQ_BUS_ERROR:
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case KS8695_IRQ_UART_MODEM_STATUS:
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case KS8695_IRQ_UART_LINE_STATUS:
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case KS8695_IRQ_UART_RX:
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case KS8695_IRQ_COMM_TX:
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case KS8695_IRQ_COMM_RX:
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irq_set_chip_and_handler(irq,
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&ks8695_irq_level_chip,
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handle_level_irq);
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break;
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/* Edge-triggered interrupts */
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default:
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/* clear pending bit */
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ks8695_irq_ack(irq_get_irq_data(irq));
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irq_set_chip_and_handler(irq,
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&ks8695_irq_edge_chip,
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handle_edge_irq);
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}
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set_irq_flags(irq, IRQF_VALID);
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}
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}
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