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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 01:28:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
236
arch/arm/mach-pxa/cm-x255.c
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236
arch/arm/mach-pxa/cm-x255.c
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/*
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* linux/arch/arm/mach-pxa/cm-x255.c
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*
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* Copyright (C) 2007, 2008 CompuLab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand-gpio.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/pxa2xx_spi.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <mach/pxa25x.h>
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#include "generic.h"
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#define GPIO_NAND_CS (5)
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#define GPIO_NAND_ALE (4)
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#define GPIO_NAND_CLE (3)
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#define GPIO_NAND_RB (10)
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static unsigned long cmx255_pin_config[] = {
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/* AC'97 */
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GPIO28_AC97_BITCLK,
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GPIO29_AC97_SDATA_IN_0,
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GPIO30_AC97_SDATA_OUT,
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GPIO31_AC97_SYNC,
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/* BTUART */
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GPIO42_BTUART_RXD,
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GPIO43_BTUART_TXD,
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GPIO44_BTUART_CTS,
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GPIO45_BTUART_RTS,
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/* STUART */
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GPIO46_STUART_RXD,
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GPIO47_STUART_TXD,
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/* LCD */
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GPIOxx_LCD_TFT_16BPP,
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/* SSP1 */
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GPIO23_SSP1_SCLK,
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GPIO24_SSP1_SFRM,
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GPIO25_SSP1_TXD,
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GPIO26_SSP1_RXD,
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/* SSP2 */
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GPIO81_SSP2_CLK_OUT,
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GPIO82_SSP2_FRM_OUT,
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GPIO83_SSP2_TXD,
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GPIO84_SSP2_RXD,
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/* PC Card */
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GPIO48_nPOE,
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GPIO49_nPWE,
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GPIO50_nPIOR,
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GPIO51_nPIOW,
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GPIO52_nPCE_1,
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GPIO53_nPCE_2,
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GPIO54_nPSKTSEL,
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GPIO55_nPREG,
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GPIO56_nPWAIT,
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GPIO57_nIOIS16,
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/* SDRAM and local bus */
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GPIO15_nCS_1,
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GPIO78_nCS_2,
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GPIO79_nCS_3,
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GPIO80_nCS_4,
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GPIO33_nCS_5,
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GPIO18_RDY,
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/* GPIO */
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GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
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GPIO9_GPIO, /* PC card reset */
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/* NAND controls */
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GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
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GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */
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GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */
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GPIO10_GPIO, /* NAND Ready/Busy */
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/* interrupts */
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GPIO22_GPIO, /* DM9000 interrupt */
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};
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#if defined(CONFIG_SPI_PXA2XX)
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static struct pxa2xx_spi_master pxa_ssp_master_info = {
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.num_chipselect = 1,
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};
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static struct spi_board_info spi_board_info[] __initdata = {
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[0] = {
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.modalias = "rtc-max6902",
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.max_speed_hz = 1000000,
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.bus_num = 1,
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.chip_select = 0,
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},
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};
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static void __init cmx255_init_rtc(void)
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{
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pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
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spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
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}
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#else
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static inline void cmx255_init_rtc(void) {}
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#endif
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#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
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static struct mtd_partition cmx255_nor_partitions[] = {
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{
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.name = "ARMmon",
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.size = 0x00030000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE /* force read-only */
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} , {
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.name = "ARMmon setup block",
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.size = 0x00010000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE /* force read-only */
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} , {
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.name = "kernel",
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.size = 0x00160000,
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.offset = MTDPART_OFS_APPEND,
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} , {
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.name = "ramdisk",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND
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}
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};
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static struct physmap_flash_data cmx255_nor_flash_data[] = {
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{
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.width = 2, /* bankwidth in bytes */
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.parts = cmx255_nor_partitions,
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.nr_parts = ARRAY_SIZE(cmx255_nor_partitions)
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}
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};
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static struct resource cmx255_nor_resource = {
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.start = PXA_CS0_PHYS,
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.end = PXA_CS0_PHYS + SZ_8M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device cmx255_nor = {
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.name = "physmap-flash",
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.id = -1,
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.dev = {
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.platform_data = cmx255_nor_flash_data,
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},
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.resource = &cmx255_nor_resource,
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.num_resources = 1,
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};
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static void __init cmx255_init_nor(void)
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{
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platform_device_register(&cmx255_nor);
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}
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#else
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static inline void cmx255_init_nor(void) {}
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#endif
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#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
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static struct resource cmx255_nand_resource[] = {
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[0] = {
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.start = PXA_CS1_PHYS,
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.end = PXA_CS1_PHYS + 11,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = PXA_CS5_PHYS,
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.end = PXA_CS5_PHYS + 3,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct mtd_partition cmx255_nand_parts[] = {
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[0] = {
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.name = "cmx255-nand",
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.size = MTDPART_SIZ_FULL,
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.offset = 0,
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},
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};
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static struct gpio_nand_platdata cmx255_nand_platdata = {
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.gpio_nce = GPIO_NAND_CS,
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.gpio_cle = GPIO_NAND_CLE,
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.gpio_ale = GPIO_NAND_ALE,
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.gpio_rdy = GPIO_NAND_RB,
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.gpio_nwp = -1,
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.parts = cmx255_nand_parts,
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.num_parts = ARRAY_SIZE(cmx255_nand_parts),
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.chip_delay = 25,
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};
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static struct platform_device cmx255_nand = {
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.name = "gpio-nand",
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.num_resources = ARRAY_SIZE(cmx255_nand_resource),
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.resource = cmx255_nand_resource,
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.id = -1,
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.dev = {
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.platform_data = &cmx255_nand_platdata,
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}
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};
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static void __init cmx255_init_nand(void)
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{
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platform_device_register(&cmx255_nand);
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}
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#else
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static inline void cmx255_init_nand(void) {}
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#endif
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void __init cmx255_init(void)
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{
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pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
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cmx255_init_rtc();
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cmx255_init_nor();
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cmx255_init_nand();
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}
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