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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-02 17:15:37 +01:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
82
arch/blackfin/include/asm/bfin_twi.h
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82
arch/blackfin/include/asm/bfin_twi.h
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/*
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* bfin_twi.h - interface to Blackfin TWIs
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*
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* Copyright 2005-2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_BFIN_TWI_H__
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#define __ASM_BFIN_TWI_H__
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#include <asm/blackfin.h>
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#define DEFINE_TWI_REG(reg_name, reg) \
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static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \
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{ return bfin_read16(&iface->regs_base->reg); } \
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static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \
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{ bfin_write16(&iface->regs_base->reg, v); }
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DEFINE_TWI_REG(CLKDIV, clkdiv)
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DEFINE_TWI_REG(SLAVE_CTL, slave_ctl)
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DEFINE_TWI_REG(SLAVE_STAT, slave_stat)
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DEFINE_TWI_REG(SLAVE_ADDR, slave_addr)
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DEFINE_TWI_REG(MASTER_CTL, master_ctl)
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DEFINE_TWI_REG(MASTER_STAT, master_stat)
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DEFINE_TWI_REG(MASTER_ADDR, master_addr)
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DEFINE_TWI_REG(INT_STAT, int_stat)
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DEFINE_TWI_REG(INT_MASK, int_mask)
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DEFINE_TWI_REG(FIFO_STAT, fifo_stat)
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DEFINE_TWI_REG(XMT_DATA8, xmt_data8)
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DEFINE_TWI_REG(XMT_DATA16, xmt_data16)
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#if !ANOMALY_16000030
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DEFINE_TWI_REG(RCV_DATA8, rcv_data8)
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DEFINE_TWI_REG(RCV_DATA16, rcv_data16)
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#else
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static inline u16 read_RCV_DATA8(struct bfin_twi_iface *iface)
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{
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u16 ret;
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unsigned long flags;
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flags = hard_local_irq_save();
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ret = bfin_read16(&iface->regs_base->rcv_data8);
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hard_local_irq_restore(flags);
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return ret;
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}
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static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface)
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{
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u16 ret;
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unsigned long flags;
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flags = hard_local_irq_save();
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ret = bfin_read16(&iface->regs_base->rcv_data16);
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hard_local_irq_restore(flags);
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return ret;
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}
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#endif
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static inline u16 read_FIFO_CTL(struct bfin_twi_iface *iface)
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{
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return bfin_read16(&iface->regs_base->fifo_ctl);
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}
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static inline void write_FIFO_CTL(struct bfin_twi_iface *iface, u16 v)
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{
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bfin_write16(&iface->regs_base->fifo_ctl, v);
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SSYNC();
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}
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static inline u16 read_CONTROL(struct bfin_twi_iface *iface)
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{
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return bfin_read16(&iface->regs_base->control);
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}
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static inline void write_CONTROL(struct bfin_twi_iface *iface, u16 v)
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{
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SSYNC();
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bfin_write16(&iface->regs_base->control, v);
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}
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#endif
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