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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-03 01:25:36 +01:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
74
arch/blackfin/include/asm/clocks.h
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74
arch/blackfin/include/asm/clocks.h
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/*
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* Common Clock definitions for various kernel files
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*
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* Copyright 2007-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _BFIN_CLOCKS_H
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#define _BFIN_CLOCKS_H
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#include <asm/dpmc.h>
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#ifdef CONFIG_CCLK_DIV_1
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# define CONFIG_CCLK_ACT_DIV CCLK_DIV1
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# define CONFIG_CCLK_DIV 1
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#endif
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#ifdef CONFIG_CCLK_DIV_2
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# define CONFIG_CCLK_ACT_DIV CCLK_DIV2
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# define CONFIG_CCLK_DIV 2
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#endif
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#ifdef CONFIG_CCLK_DIV_4
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# define CONFIG_CCLK_ACT_DIV CCLK_DIV4
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# define CONFIG_CCLK_DIV 4
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#endif
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#ifdef CONFIG_CCLK_DIV_8
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# define CONFIG_CCLK_ACT_DIV CCLK_DIV8
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# define CONFIG_CCLK_DIV 8
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#endif
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#ifndef CONFIG_PLL_BYPASS
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# ifndef CONFIG_CLKIN_HALF
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# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
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# else
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# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2)
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# endif
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# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV)
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# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV)
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#else
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# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ)
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# define CONFIG_CCLK_HZ (CONFIG_CLKIN_HZ)
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# define CONFIG_SCLK_HZ (CONFIG_CLKIN_HZ)
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# define CONFIG_VCO_MULT 0
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#endif
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#include <linux/clk.h>
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struct clk_ops {
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unsigned long (*get_rate)(struct clk *clk);
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unsigned long (*round_rate)(struct clk *clk, unsigned long rate);
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int (*set_rate)(struct clk *clk, unsigned long rate);
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int (*enable)(struct clk *clk);
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int (*disable)(struct clk *clk);
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};
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struct clk {
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struct clk *parent;
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const char *name;
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unsigned long rate;
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spinlock_t lock;
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u32 flags;
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const struct clk_ops *ops;
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void __iomem *reg;
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u32 mask;
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u32 shift;
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};
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int clk_init(void);
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#endif
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