mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 07:38:52 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
1
arch/m32r/platforms/mappi/Makefile
Normal file
1
arch/m32r/platforms/mappi/Makefile
Normal file
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@ -0,0 +1 @@
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obj-y := setup.o io.o
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242
arch/m32r/platforms/mappi/dot.gdbinit
Normal file
242
arch/m32r/platforms/mappi/dot.gdbinit
Normal file
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@ -0,0 +1,242 @@
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# .gdbinit file
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# $Id: dot.gdbinit.mappi,v 1.4 2004/10/20 02:24:37 takata Exp $
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#-----
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# NOTE: this file is generated by a script, "gen_gdbinit.pl".
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# (Please type "gen_gdbinit.pl --help" and check the help message).
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# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
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#-----
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# target platform: mappi
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# setting
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set width 0d70
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set radix 0d16
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debug_chaos
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# clk xin:cpu:bif:bus=30:360:180:90
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define clock_init
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set *(unsigned long *)0x00ef4024 = 2
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set *(unsigned long *)0x00ef4020 = 1
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set *(unsigned long *)0x00ef4010 = 0
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set *(unsigned long *)0x00ef4014 = 0
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set *(unsigned long *)0x00ef4004 = 5
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shell sleep 0.1
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set *(unsigned long *)0x00ef4008 = 0x00000200
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end
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# Initialize programmable ports
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define port_init
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set $sfrbase = 0x00ef0000
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set *(unsigned short *)0x00ef1060 = 0x5555
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set *(unsigned short *)0x00ef1062 = 0x5555
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set *(unsigned short *)0x00ef1064 = 0x5555
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set *(unsigned short *)0x00ef1066 = 0x5555
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set *(unsigned short *)0x00ef1068 = 0x5555
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set *(unsigned short *)0x00ef106a = 0x0000
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set *(unsigned short *)0x00ef106e = 0x5555
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set *(unsigned short *)0x00ef1070 = 0x5555
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# LED ON
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set *(unsigned char *)($sfrbase + 0x1015) = 0xff
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set *(unsigned char *)($sfrbase + 0x1085) = 0xff
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shell sleep 0.1
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# LED OFF
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set *(unsigned char *)($sfrbase + 0x1085) = 0x00
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end
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document port_init
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P5=LED(output), P6.b4=LAN_RESET(output)
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end
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# Initialize SDRAM controller
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define sdram_init
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# SDIR0
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set *(unsigned long *)0x00ef6008 = 0x00000182
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# SDIR1
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set *(unsigned long *)0x00ef600c = 0x00000001
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# Initialize wait
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shell sleep 0.1
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# Ch0-MOD
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set *(unsigned long *)0x00ef602c = 0x00000020
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# Ch0-TR
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set *(unsigned long *)0x00ef6028 = 0x00051502
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# Ch0-ADR (size:64MB)
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set *(unsigned long *)0x00ef6020 = 0x08000004
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# AutoRef On
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set *(unsigned long *)0x00ef6004 = 0x00010e2b
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# Access enable
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set *(unsigned long *)0x00ef6024 = 0x00000001
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end
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document sdram_init
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SDRAM controller initialization
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0x08000000 - 0x0bffffff (64MB)
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end
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# Initialize LAN controller
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define lanc_init
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set $sfrbase = 0x00ef0000
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# Set BSEL3 (BSEL3 for the Chaos's bselc)
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set *(unsigned long *)($sfrbase + 0x5300) = 0x0a0a8040
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set *(unsigned long *)($sfrbase + 0x5304) = 0x01120203
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set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
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# Reset (P5=LED,P6.b4=LAN_RESET)
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set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
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set *(unsigned char *)($sfrbase + 0x1016) = 0xff
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set *(unsigned char *)($sfrbase + 0x1086) = 0xff
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shell sleep 0.1
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# swivel: 0=normal, 4=reverse
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# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
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set *(unsigned char *)($sfrbase + 0x1086) = 0x04
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set *(unsigned long *)(0x0c000330) = 0xffffffff
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# Set mac address
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set $lanc = (void*)0x0c000300
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set *(unsigned long *)($lanc + 0x0000) = 0x00610010
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set *(unsigned long *)($lanc + 0x0004) = 0x00200030
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set *(unsigned long *)($lanc + 0x0008) = 0x00400050
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set *(unsigned long *)($lanc + 0x000c) = 0x00600007
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end
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document lanc_init
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LAN controller initialization
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ex.) MAC address: 10 20 30 40 50 60
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end
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# LCD & CRT dual-head setting (8bpp)
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define dispc_init
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set $sfrbase = 0x00ef0000
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# BSEL4 Dispc
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set *(unsigned long *)($sfrbase + 0x5400) = 0x0e0e8000
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set *(unsigned long *)($sfrbase + 0x5404) = 0x0012220a
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end
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# MMU enable
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define mmu_enable
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set $evb=0x88000000
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set *(unsigned long *)0xffff0024=1
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end
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# MMU disable
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define mmu_disable
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set $evb=0
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set *(unsigned long *)0xffff0024=0
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end
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# Show TLB entries
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define show_tlb_entries
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set $i = 0
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set $addr = $arg0
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set $nr_entries = $arg1
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use_mon_code
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while ($i < $nr_entries)
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set $tlb_tag = *(unsigned long*)$addr
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set $tlb_data = *(unsigned long*)($addr + 4)
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printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
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set $i = $i + 1
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set $addr = $addr + 8
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end
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use_debug_dma
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end
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define itlb
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set $itlb=0xfe000000
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show_tlb_entries $itlb 0d32
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end
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define dtlb
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set $dtlb=0xfe000800
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show_tlb_entries $dtlb 0d32
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end
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# Show current task structure
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define show_current
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set $current = $spi & 0xffffe000
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printf "$current=0x%08lX\n",$current
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print *(struct task_struct *)$current
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end
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# Show user assigned task structure
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define show_task
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set = $arg0 & 0xffffe000
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printf "$task=0x%08lX\n",$task
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print *(struct task_struct *)$task
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end
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document show_task
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Show user assigned task structure
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arg0 : task structure address
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end
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# Show M32R registers
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define show_regs
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printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
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printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
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printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
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printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
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printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
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printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
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printf "EVB[0x%08lX]\n",$evb
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end
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# Setup all
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define setup
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use_mon_code
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set *(unsigned int)0xfffffffc=0x60
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shell sleep 0.1
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clock_init
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shell sleep 0.1
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port_init
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sdram_init
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lanc_init
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dispc_init
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set $evb=0x08000000
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end
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# Load modules
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define load_modules
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use_debug_dma
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load
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end
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# Set kernel parameters
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define set_kernel_parameters
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set $param = (void*)0x08001000
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# INITRD_START
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# set *(unsigned long *)($param + 0x0010) = 0x08300000
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# INITRD_SIZE
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# set *(unsigned long *)($param + 0x0014) = 0x00000000
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# M32R_CPUCLK
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set *(unsigned long *)($param + 0x0018) = 0d360000000
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# M32R_BUSCLK
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set *(unsigned long *)($param + 0x001c) = 0d90000000
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# M32R_TIMER_DIVIDE
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set *(unsigned long *)($param + 0x0020) = 0d128
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set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
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end
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# Boot
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define boot
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set_kernel_parameters
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set $fp = 0
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set $pc = 0x08002000
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si
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c
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end
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# Set breakpoints
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define set_breakpoints
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b *0x08000030
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end
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# Restart
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define restart
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sdireset
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sdireset
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setup
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load_modules
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boot
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end
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sdireset
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sdireset
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file vmlinux
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target m32rsdi
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setup
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#load_modules
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#set_breakpoints
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#boot
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245
arch/m32r/platforms/mappi/dot.gdbinit.nommu
Normal file
245
arch/m32r/platforms/mappi/dot.gdbinit.nommu
Normal file
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@ -0,0 +1,245 @@
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# .gdbinit file
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# $Id$
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#-----
|
||||
# NOTE: this file is generated by a script, "gen_gdbinit.pl".
|
||||
# (Please type "gen_gdbinit.pl --help" and check the help message).
|
||||
# $ Id: gen_gdbinit.pl,v 1.5 2004/01/23 08:23:25 takata Exp $
|
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#-----
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# target platform: mappi
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# setting
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set width 0d70
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set radix 0d16
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debug_chaos
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# clk xin:cpu:bif:bus=25:200:50:50
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define clock_init
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set *(unsigned long *)0x00ef4024 = 2
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set *(unsigned long *)0x00ef4020 = 2
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set *(unsigned long *)0x00ef4010 = 0
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set *(unsigned long *)0x00ef4014 = 0
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set *(unsigned long *)0x00ef4004 = 3
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shell sleep 0.1
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set *(unsigned long *)0x00ef4008 = 0x00000200
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end
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# Initialize programmable ports
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define port_init
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set $sfrbase = 0x00ef0000
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set *(unsigned short *)0x00ef1060 = 0x5555
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set *(unsigned short *)0x00ef1062 = 0x5555
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set *(unsigned short *)0x00ef1064 = 0x5555
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set *(unsigned short *)0x00ef1066 = 0x5555
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set *(unsigned short *)0x00ef1068 = 0x5555
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set *(unsigned short *)0x00ef106a = 0x0000
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set *(unsigned short *)0x00ef106e = 0x5555
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set *(unsigned short *)0x00ef1070 = 0x5555
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# LED ON
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set *(unsigned char *)($sfrbase + 0x1015) = 0xff
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set *(unsigned char *)($sfrbase + 0x1085) = 0xff
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shell sleep 0.1
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# LED OFF
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set *(unsigned char *)($sfrbase + 0x1085) = 0x00
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end
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document port_init
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||||
P5=LED(output), P6.b4=LAN_RESET(output)
|
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end
|
||||
|
||||
# Initialize SDRAM controller
|
||||
define sdram_init
|
||||
# SDIR0
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||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
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# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
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# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00051502
|
||||
# Ch0-ADR (size:64MB)
|
||||
set *(unsigned long *)0x00ef6020 = 0x00000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010f05
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
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||||
end
|
||||
document sdram_init
|
||||
SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller
|
||||
define lanc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# Set BSEL3 (BSEL3 for the Chaos's bselc)
|
||||
set *(unsigned long *)($sfrbase + 0x5300) = 0x07078040
|
||||
set *(unsigned long *)($sfrbase + 0x5304) = 0x01110102
|
||||
set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
|
||||
# Reset (P5=LED,P6.b4=LAN_RESET)
|
||||
set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
|
||||
set *(unsigned char *)($sfrbase + 0x1016) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0xff
|
||||
shell sleep 0.1
|
||||
# swivel: 0=normal, 4=reverse
|
||||
# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0x04
|
||||
set *(unsigned long *)(0x0c000330) = 0xffffffff
|
||||
# Set mac address
|
||||
set $lanc = (void*)0x0c000300
|
||||
set *(unsigned long *)($lanc + 0x0000) = 0x00610010
|
||||
set *(unsigned long *)($lanc + 0x0004) = 0x00200030
|
||||
set *(unsigned long *)($lanc + 0x0008) = 0x00400050
|
||||
set *(unsigned long *)($lanc + 0x000c) = 0x00600007
|
||||
end
|
||||
document lanc_init
|
||||
LAN controller initialization
|
||||
ex.) MAC address: 10 20 30 40 50 60
|
||||
end
|
||||
|
||||
# LCD & CRT dual-head setting (8bpp)
|
||||
define dispc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# BSEL4 Dispc
|
||||
set *(unsigned long *)($sfrbase + 0x5400) = 0x06078000
|
||||
set *(unsigned long *)($sfrbase + 0x5404) = 0x00101101
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
set $nr_entries = $arg1
|
||||
use_mon_code
|
||||
while ($i < $nr_entries)
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb 0d32
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb 0d32
|
||||
end
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
clock_init
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
lanc_init
|
||||
dispc_init
|
||||
set $evb=0x00000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x00001000
|
||||
# INITRD_START
|
||||
#set *(unsigned long *)($param + 0x0010) = 0x082a0000
|
||||
# INITRD_SIZE
|
||||
#set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d200000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d50000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.bbox-httpd nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $fp = 0
|
||||
set $pc=0x00002000
|
||||
set *(long *)0xfffffff4=0x8080
|
||||
# b load_flat_binary
|
||||
# set *(unsigned char *)0x08001003=0x63
|
||||
# set *(unsigned char *)0x08001003=0x02
|
||||
si
|
||||
# c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
setup
|
||||
load_modules
|
||||
boot
|
||||
|
||||
344
arch/m32r/platforms/mappi/dot.gdbinit.smp
Normal file
344
arch/m32r/platforms/mappi/dot.gdbinit.smp
Normal file
|
|
@ -0,0 +1,344 @@
|
|||
# .gdbinit file
|
||||
# $Id$
|
||||
|
||||
# setting
|
||||
set width 0d70
|
||||
set radix 0d16
|
||||
debug_chaos
|
||||
|
||||
# clk xin:cpu:bif:bus=1:4:2:1
|
||||
define clock_init_on
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
# set *(unsigned long *)0x00ef4008 = 0x0201
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:4:1:1
|
||||
define clock_init_on_1411
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:4:2:1
|
||||
define clock_init_on_1421
|
||||
set *(unsigned long *)0x00ef4024 = 2
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x1
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:8:2:1
|
||||
define clock_init_on_1821
|
||||
set *(unsigned long *)0x00ef4024 = 3
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x3
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:8:4:1
|
||||
define clock_init_on_1841
|
||||
set *(unsigned long *)0x00ef4024 = 3
|
||||
set *(unsigned long *)0x00ef4020 = 1
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x3
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:16:8:1
|
||||
define clock_init_on_11681
|
||||
set *(unsigned long *)0x00ef4024 = 4
|
||||
set *(unsigned long *)0x00ef4020 = 2
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
set *(unsigned long *)0x00ef4004 = 0x7
|
||||
shell sleep 0.1
|
||||
set *(unsigned long *)0x00ef4008 = 0x0200
|
||||
end
|
||||
|
||||
# clk xin:cpu:bif:bus=1:1:1:1
|
||||
define clock_init_off
|
||||
# CPU
|
||||
set *(unsigned long *)0x00ef4010 = 0
|
||||
set *(unsigned long *)0x00ef4014 = 0
|
||||
# BIF
|
||||
set *(unsigned long *)0x00ef4020 = 0
|
||||
# BUS
|
||||
set *(unsigned long *)0x00ef4024 = 0
|
||||
# PLL
|
||||
set *(unsigned long *)0x00ef4008 = 0x0000
|
||||
end
|
||||
|
||||
# Initialize programmable ports
|
||||
define port_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
set *(unsigned short *)0x00ef1060 = 0x5555
|
||||
set *(unsigned short *)0x00ef1062 = 0x5555
|
||||
set *(unsigned short *)0x00ef1064 = 0x5555
|
||||
set *(unsigned short *)0x00ef1066 = 0x5555
|
||||
set *(unsigned short *)0x00ef1068 = 0x5555
|
||||
set *(unsigned short *)0x00ef106a = 0x0000
|
||||
set *(unsigned short *)0x00ef106e = 0x5555
|
||||
set *(unsigned short *)0x00ef1070 = 0x5555
|
||||
# LED ON
|
||||
set *(unsigned char *)($sfrbase + 0x1015) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0xff
|
||||
shell sleep 0.1
|
||||
# LED OFF
|
||||
set *(unsigned char *)($sfrbase + 0x1085) = 0x00
|
||||
end
|
||||
document port_init
|
||||
P5=LED(output), P6.b4=LAN_RESET(output)
|
||||
end
|
||||
|
||||
# Initialize SDRAM controller for Mappi
|
||||
define sdram_init
|
||||
# SDIR0
|
||||
set *(unsigned long *)0x00ef6008 = 0x00000182
|
||||
# SDIR1
|
||||
set *(unsigned long *)0x00ef600c = 0x00000001
|
||||
# Initialize wait
|
||||
shell sleep 0.1
|
||||
# Ch0-MOD
|
||||
set *(unsigned long *)0x00ef602c = 0x00000020
|
||||
# Ch0-TR
|
||||
set *(unsigned long *)0x00ef6028 = 0x00010002
|
||||
# Ch0-ADR
|
||||
set *(unsigned long *)0x00ef6020 = 0x08000004
|
||||
# AutoRef On
|
||||
set *(unsigned long *)0x00ef6004 = 0x00010107
|
||||
# Access enable
|
||||
set *(unsigned long *)0x00ef6024 = 0x00000001
|
||||
end
|
||||
document sdram_init
|
||||
Mappi SDRAM controller initialization
|
||||
0x08000000 - 0x0bffffff (64MB)
|
||||
end
|
||||
|
||||
# Initialize LAN controller for Mappi
|
||||
define lanc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# Set BSEL3 (BSEL3 for the Chaos's bselc)
|
||||
# set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
|
||||
# set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
|
||||
set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
|
||||
set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
|
||||
set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
|
||||
# Reset (P5=LED,P6.b4=LAN_RESET)
|
||||
set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
|
||||
set *(unsigned char *)($sfrbase + 0x1016) = 0xff
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0xff
|
||||
shell sleep 0.1
|
||||
# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
|
||||
set *(unsigned char *)($sfrbase + 0x1086) = 0x04
|
||||
set *(unsigned long *)(0x0c000330) = 0xffffffff
|
||||
# Set mac address
|
||||
set $lanc = (void*)0x0c000300
|
||||
set *(unsigned long *)($lanc + 0x0000) = 0x00610010
|
||||
set *(unsigned long *)($lanc + 0x0004) = 0x00200030
|
||||
set *(unsigned long *)($lanc + 0x0008) = 0x00400050
|
||||
set *(unsigned long *)($lanc + 0x000c) = 0x00600007
|
||||
end
|
||||
document lanc_init
|
||||
Mappi LAN controller initialization
|
||||
ex.) MAC address: 10 20 30 40 50 60
|
||||
end
|
||||
|
||||
# LCD & CRT dual-head setting (8bpp)
|
||||
define dispc_init
|
||||
set $sfrbase = 0x00ef0000
|
||||
# BSEL4 Dispc
|
||||
# 20MHz
|
||||
# set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
|
||||
# set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
|
||||
# 40MHz
|
||||
set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
|
||||
set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
|
||||
end
|
||||
|
||||
# MMU enable
|
||||
define mmu_enable
|
||||
set $evb=0x88000000
|
||||
set *(unsigned long *)0xffff0024=1
|
||||
end
|
||||
|
||||
# MMU disable
|
||||
define mmu_disable
|
||||
set $evb=0
|
||||
set *(unsigned long *)0xffff0024=0
|
||||
end
|
||||
|
||||
# Show TLB entries
|
||||
define show_tlb_entries
|
||||
set $i = 0
|
||||
set $addr = $arg0
|
||||
use_mon_code
|
||||
while ($i < 0d32 )
|
||||
set $tlb_tag = *(unsigned long*)$addr
|
||||
set $tlb_data = *(unsigned long*)($addr + 4)
|
||||
printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
|
||||
set $i = $i + 1
|
||||
set $addr = $addr + 8
|
||||
end
|
||||
use_debug_dma
|
||||
end
|
||||
define itlb
|
||||
set $itlb=0xfe000000
|
||||
show_tlb_entries $itlb
|
||||
end
|
||||
define dtlb
|
||||
set $dtlb=0xfe000800
|
||||
show_tlb_entries $dtlb
|
||||
end
|
||||
|
||||
|
||||
# Show current task structure
|
||||
define show_current
|
||||
set $current = $spi & 0xffffe000
|
||||
printf "$current=0x%08lX\n",$current
|
||||
print *(struct task_struct *)$current
|
||||
end
|
||||
|
||||
# Show user assigned task structure
|
||||
define show_task
|
||||
set $task = $arg0 & 0xffffe000
|
||||
printf "$task=0x%08lX\n",$task
|
||||
print *(struct task_struct *)$task
|
||||
end
|
||||
document show_task
|
||||
Show user assigned task structure
|
||||
arg0 : task structure address
|
||||
end
|
||||
|
||||
# Show M32R registers
|
||||
define show_regs
|
||||
printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
|
||||
printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
|
||||
printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
|
||||
printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp
|
||||
printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
|
||||
printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
|
||||
printf "EVB[0x%08lX]\n",$evb
|
||||
end
|
||||
|
||||
|
||||
# Setup all
|
||||
define setup
|
||||
use_mon_code
|
||||
set *(unsigned int)0xfffffffc=0x60
|
||||
shell sleep 0.1
|
||||
# clock_init_on_1411
|
||||
clock_init_on_1421
|
||||
# clock_init_on_1821
|
||||
# clock_init_on_1841
|
||||
# clock_init_on_11681
|
||||
# clock_init_off
|
||||
shell sleep 0.1
|
||||
port_init
|
||||
sdram_init
|
||||
lanc_init
|
||||
dispc_init
|
||||
set $evb=0x08000000
|
||||
end
|
||||
|
||||
# Load modules
|
||||
define load_modules
|
||||
use_debug_dma
|
||||
load
|
||||
# load ramdisk_082a0000.mot
|
||||
# load romfs_082a0000.mot
|
||||
# use_mon_code
|
||||
end
|
||||
|
||||
# Set kernel parameters
|
||||
define set_kernel_parameters
|
||||
set $param = (void*)0x08001000
|
||||
# INITRD_START
|
||||
# set *(unsigned long *)($param + 0x0010) = 0x082a0000
|
||||
# INITRD_SIZE
|
||||
# set *(unsigned long *)($param + 0x0014) = 0x00000000
|
||||
# M32R_CPUCLK
|
||||
set *(unsigned long *)($param + 0x0018) = 0d160000000
|
||||
# set *(unsigned long *)($param + 0x0018) = 0d80000000
|
||||
# set *(unsigned long *)($param + 0x0018) = 0d40000000
|
||||
# M32R_BUSCLK
|
||||
set *(unsigned long *)($param + 0x001c) = 0d40000000
|
||||
|
||||
# M32R_TIMER_DIVIDE
|
||||
set *(unsigned long *)($param + 0x0020) = 0d128
|
||||
|
||||
set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
# set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
|
||||
end
|
||||
|
||||
# Boot
|
||||
define boot
|
||||
set_kernel_parameters
|
||||
set $pc=0x08002000
|
||||
set *(unsigned char *)0x08001003=0x03
|
||||
si
|
||||
c
|
||||
end
|
||||
|
||||
# Set breakpoints
|
||||
define set_breakpoints
|
||||
b *0x08000030
|
||||
end
|
||||
|
||||
## Boot MP
|
||||
define boot_mp
|
||||
set_kernel_parameters
|
||||
set *(unsigned long *)0x00f00000 = boot - 0x80000000
|
||||
set *(unsigned long *)0x00eff2f8 = 0x2
|
||||
x 0x00eff2f8
|
||||
|
||||
set $pc=0x08002000
|
||||
si
|
||||
c
|
||||
end
|
||||
document boot_mp
|
||||
Boot BSP
|
||||
end
|
||||
|
||||
## Boot UP
|
||||
define boot_up
|
||||
set_kernel_parameters
|
||||
set $pc=0x08002000
|
||||
si
|
||||
c
|
||||
end
|
||||
document boot_up
|
||||
Boot BSP
|
||||
end
|
||||
|
||||
# Restart
|
||||
define restart
|
||||
sdireset
|
||||
sdireset
|
||||
setup
|
||||
load_modules
|
||||
boot_mp
|
||||
end
|
||||
|
||||
sdireset
|
||||
sdireset
|
||||
file vmlinux
|
||||
target m32rsdi
|
||||
setup
|
||||
325
arch/m32r/platforms/mappi/io.c
Normal file
325
arch/m32r/platforms/mappi/io.c
Normal file
|
|
@ -0,0 +1,325 @@
|
|||
/*
|
||||
* linux/arch/m32r/platforms/mappi/io.c
|
||||
*
|
||||
* Typical I/O routines for Mappi board.
|
||||
*
|
||||
* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
|
||||
* Hitoshi Yamamoto
|
||||
*/
|
||||
|
||||
#include <asm/m32r.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
#include <linux/types.h>
|
||||
|
||||
#define M32R_PCC_IOMAP_SIZE 0x1000
|
||||
|
||||
#define M32R_PCC_IOSTART0 0x1000
|
||||
#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
|
||||
#define M32R_PCC_IOSTART1 0x2000
|
||||
#define M32R_PCC_IOEND1 (M32R_PCC_IOSTART1 + M32R_PCC_IOMAP_SIZE - 1)
|
||||
|
||||
extern void pcc_ioread(int, unsigned long, void *, size_t, size_t, int);
|
||||
extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int);
|
||||
#endif /* CONFIG_PCMCIA && CONFIG_M32R_PCC */
|
||||
|
||||
#define PORT2ADDR(port) _port2addr(port)
|
||||
|
||||
static inline void *_port2addr(unsigned long port)
|
||||
{
|
||||
return (void *)(port | NONCACHE_OFFSET);
|
||||
}
|
||||
|
||||
static inline void *_port2addr_ne(unsigned long port)
|
||||
{
|
||||
return (void *)((port<<1) + NONCACHE_OFFSET + 0x0C000000);
|
||||
}
|
||||
|
||||
static inline void delay(void)
|
||||
{
|
||||
__asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
|
||||
}
|
||||
|
||||
/*
|
||||
* NIC I/O function
|
||||
*/
|
||||
|
||||
#define PORT2ADDR_NE(port) _port2addr_ne(port)
|
||||
|
||||
static inline unsigned char _ne_inb(void *portp)
|
||||
{
|
||||
return (unsigned char) *(volatile unsigned short *)portp;
|
||||
}
|
||||
|
||||
static inline unsigned short _ne_inw(void *portp)
|
||||
{
|
||||
unsigned short tmp;
|
||||
|
||||
tmp = *(volatile unsigned short *)portp;
|
||||
return le16_to_cpu(tmp);
|
||||
}
|
||||
|
||||
static inline void _ne_outb(unsigned char b, void *portp)
|
||||
{
|
||||
*(volatile unsigned short *)portp = (unsigned short)b;
|
||||
}
|
||||
|
||||
static inline void _ne_outw(unsigned short w, void *portp)
|
||||
{
|
||||
*(volatile unsigned short *)portp = cpu_to_le16(w);
|
||||
}
|
||||
|
||||
unsigned char _inb(unsigned long port)
|
||||
{
|
||||
if (port >= 0x300 && port < 0x320)
|
||||
return _ne_inb(PORT2ADDR_NE(port));
|
||||
else
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
unsigned char b;
|
||||
pcc_ioread(0, port, &b, sizeof(b), 1, 0);
|
||||
return b;
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
unsigned char b;
|
||||
pcc_ioread(1, port, &b, sizeof(b), 1, 0);
|
||||
return b;
|
||||
} else
|
||||
#endif
|
||||
|
||||
return *(volatile unsigned char *)PORT2ADDR(port);
|
||||
}
|
||||
|
||||
unsigned short _inw(unsigned long port)
|
||||
{
|
||||
if (port >= 0x300 && port < 0x320)
|
||||
return _ne_inw(PORT2ADDR_NE(port));
|
||||
else
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
unsigned short w;
|
||||
pcc_ioread(0, port, &w, sizeof(w), 1, 0);
|
||||
return w;
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
unsigned short w;
|
||||
pcc_ioread(1, port, &w, sizeof(w), 1, 0);
|
||||
return w;
|
||||
} else
|
||||
#endif
|
||||
return *(volatile unsigned short *)PORT2ADDR(port);
|
||||
}
|
||||
|
||||
unsigned long _inl(unsigned long port)
|
||||
{
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
unsigned long l;
|
||||
pcc_ioread(0, port, &l, sizeof(l), 1, 0);
|
||||
return l;
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
unsigned short l;
|
||||
pcc_ioread(1, port, &l, sizeof(l), 1, 0);
|
||||
return l;
|
||||
} else
|
||||
#endif
|
||||
return *(volatile unsigned long *)PORT2ADDR(port);
|
||||
}
|
||||
|
||||
unsigned char _inb_p(unsigned long port)
|
||||
{
|
||||
unsigned char v = _inb(port);
|
||||
delay();
|
||||
return (v);
|
||||
}
|
||||
|
||||
unsigned short _inw_p(unsigned long port)
|
||||
{
|
||||
unsigned short v = _inw(port);
|
||||
delay();
|
||||
return (v);
|
||||
}
|
||||
|
||||
unsigned long _inl_p(unsigned long port)
|
||||
{
|
||||
unsigned long v = _inl(port);
|
||||
delay();
|
||||
return (v);
|
||||
}
|
||||
|
||||
void _outb(unsigned char b, unsigned long port)
|
||||
{
|
||||
if (port >= 0x300 && port < 0x320)
|
||||
_ne_outb(b, PORT2ADDR_NE(port));
|
||||
else
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_iowrite(0, port, &b, sizeof(b), 1, 0);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_iowrite(1, port, &b, sizeof(b), 1, 0);
|
||||
} else
|
||||
#endif
|
||||
*(volatile unsigned char *)PORT2ADDR(port) = b;
|
||||
}
|
||||
|
||||
void _outw(unsigned short w, unsigned long port)
|
||||
{
|
||||
if (port >= 0x300 && port < 0x320)
|
||||
_ne_outw(w, PORT2ADDR_NE(port));
|
||||
else
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_iowrite(0, port, &w, sizeof(w), 1, 0);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_iowrite(1, port, &w, sizeof(w), 1, 0);
|
||||
} else
|
||||
#endif
|
||||
*(volatile unsigned short *)PORT2ADDR(port) = w;
|
||||
}
|
||||
|
||||
void _outl(unsigned long l, unsigned long port)
|
||||
{
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_iowrite(0, port, &l, sizeof(l), 1, 0);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_iowrite(1, port, &l, sizeof(l), 1, 0);
|
||||
} else
|
||||
#endif
|
||||
*(volatile unsigned long *)PORT2ADDR(port) = l;
|
||||
}
|
||||
|
||||
void _outb_p(unsigned char b, unsigned long port)
|
||||
{
|
||||
_outb(b, port);
|
||||
delay();
|
||||
}
|
||||
|
||||
void _outw_p(unsigned short w, unsigned long port)
|
||||
{
|
||||
_outw(w, port);
|
||||
delay();
|
||||
}
|
||||
|
||||
void _outl_p(unsigned long l, unsigned long port)
|
||||
{
|
||||
_outl(l, port);
|
||||
delay();
|
||||
}
|
||||
|
||||
void _insb(unsigned int port, void *addr, unsigned long count)
|
||||
{
|
||||
unsigned short *buf = addr;
|
||||
unsigned short *portp;
|
||||
|
||||
if (port >= 0x300 && port < 0x320){
|
||||
portp = PORT2ADDR_NE(port);
|
||||
while (count--)
|
||||
*buf++ = *(volatile unsigned char *)portp;
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_ioread(0, port, (void *)addr, sizeof(unsigned char),
|
||||
count, 1);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_ioread(1, port, (void *)addr, sizeof(unsigned char),
|
||||
count, 1);
|
||||
#endif
|
||||
} else {
|
||||
portp = PORT2ADDR(port);
|
||||
while (count--)
|
||||
*buf++ = *(volatile unsigned char *)portp;
|
||||
}
|
||||
}
|
||||
|
||||
void _insw(unsigned int port, void *addr, unsigned long count)
|
||||
{
|
||||
unsigned short *buf = addr;
|
||||
unsigned short *portp;
|
||||
|
||||
if (port >= 0x300 && port < 0x320) {
|
||||
portp = PORT2ADDR_NE(port);
|
||||
while (count--)
|
||||
*buf++ = _ne_inw(portp);
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_ioread(0, port, (void *)addr, sizeof(unsigned short),
|
||||
count, 1);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_ioread(1, port, (void *)addr, sizeof(unsigned short),
|
||||
count, 1);
|
||||
#endif
|
||||
} else {
|
||||
portp = PORT2ADDR(port);
|
||||
while (count--)
|
||||
*buf++ = *(volatile unsigned short *)portp;
|
||||
}
|
||||
}
|
||||
|
||||
void _insl(unsigned int port, void *addr, unsigned long count)
|
||||
{
|
||||
unsigned long *buf = addr;
|
||||
unsigned long *portp;
|
||||
|
||||
portp = PORT2ADDR(port);
|
||||
while (count--)
|
||||
*buf++ = *(volatile unsigned long *)portp;
|
||||
}
|
||||
|
||||
void _outsb(unsigned int port, const void *addr, unsigned long count)
|
||||
{
|
||||
const unsigned char *buf = addr;
|
||||
unsigned char *portp;
|
||||
|
||||
if (port >= 0x300 && port < 0x320) {
|
||||
portp = PORT2ADDR_NE(port);
|
||||
while (count--)
|
||||
_ne_outb(*buf++, portp);
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_iowrite(0, port, (void *)addr, sizeof(unsigned char),
|
||||
count, 1);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_iowrite(1, port, (void *)addr, sizeof(unsigned char),
|
||||
count, 1);
|
||||
#endif
|
||||
} else {
|
||||
portp = PORT2ADDR(port);
|
||||
while (count--)
|
||||
*(volatile unsigned char *)portp = *buf++;
|
||||
}
|
||||
}
|
||||
|
||||
void _outsw(unsigned int port, const void *addr, unsigned long count)
|
||||
{
|
||||
const unsigned short *buf = addr;
|
||||
unsigned short *portp;
|
||||
|
||||
if (port >= 0x300 && port < 0x320) {
|
||||
portp = PORT2ADDR_NE(port);
|
||||
while (count--)
|
||||
_ne_outw(*buf++, portp);
|
||||
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
|
||||
} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
|
||||
pcc_iowrite(0, port, (void *)addr, sizeof(unsigned short),
|
||||
count, 1);
|
||||
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
|
||||
pcc_iowrite(1, port, (void *)addr, sizeof(unsigned short),
|
||||
count, 1);
|
||||
#endif
|
||||
} else {
|
||||
portp = PORT2ADDR(port);
|
||||
while (count--)
|
||||
*(volatile unsigned short *)portp = *buf++;
|
||||
}
|
||||
}
|
||||
|
||||
void _outsl(unsigned int port, const void *addr, unsigned long count)
|
||||
{
|
||||
const unsigned long *buf = addr;
|
||||
unsigned char *portp;
|
||||
|
||||
portp = PORT2ADDR(port);
|
||||
while (count--)
|
||||
*(volatile unsigned long *)portp = *buf++;
|
||||
}
|
||||
174
arch/m32r/platforms/mappi/setup.c
Normal file
174
arch/m32r/platforms/mappi/setup.c
Normal file
|
|
@ -0,0 +1,174 @@
|
|||
/*
|
||||
* linux/arch/m32r/platforms/mappi/setup.c
|
||||
*
|
||||
* Setup routines for Renesas MAPPI Board
|
||||
*
|
||||
* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
|
||||
* Hitoshi Yamamoto
|
||||
*/
|
||||
|
||||
#include <linux/irq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/m32r.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
|
||||
|
||||
icu_data_t icu_data[NR_IRQS];
|
||||
|
||||
static void disable_mappi_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long port, data;
|
||||
|
||||
port = irq2port(irq);
|
||||
data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
|
||||
outl(data, port);
|
||||
}
|
||||
|
||||
static void enable_mappi_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long port, data;
|
||||
|
||||
port = irq2port(irq);
|
||||
data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
|
||||
outl(data, port);
|
||||
}
|
||||
|
||||
static void mask_mappi(struct irq_data *data)
|
||||
{
|
||||
disable_mappi_irq(data->irq);
|
||||
}
|
||||
|
||||
static void unmask_mappi(struct irq_data *data)
|
||||
{
|
||||
enable_mappi_irq(data->irq);
|
||||
}
|
||||
|
||||
static void shutdown_mappi(struct irq_data *data)
|
||||
{
|
||||
unsigned long port;
|
||||
|
||||
port = irq2port(data->irq);
|
||||
outl(M32R_ICUCR_ILEVEL7, port);
|
||||
}
|
||||
|
||||
static struct irq_chip mappi_irq_type =
|
||||
{
|
||||
.name = "MAPPI-IRQ",
|
||||
.irq_shutdown = shutdown_mappi,
|
||||
.irq_mask = mask_mappi,
|
||||
.irq_unmask = unmask_mappi,
|
||||
};
|
||||
|
||||
void __init init_IRQ(void)
|
||||
{
|
||||
static int once = 0;
|
||||
|
||||
if (once)
|
||||
return;
|
||||
else
|
||||
once++;
|
||||
|
||||
#ifdef CONFIG_NE2000
|
||||
/* INT0 : LAN controller (RTL8019AS) */
|
||||
irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
|
||||
disable_mappi_irq(M32R_IRQ_INT0);
|
||||
#endif /* CONFIG_M32R_NE2000 */
|
||||
|
||||
/* MFT2 : system timer */
|
||||
irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
|
||||
disable_mappi_irq(M32R_IRQ_MFT2);
|
||||
|
||||
#ifdef CONFIG_SERIAL_M32R_SIO
|
||||
/* SIO0_R : uart receive data */
|
||||
irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
|
||||
disable_mappi_irq(M32R_IRQ_SIO0_R);
|
||||
|
||||
/* SIO0_S : uart send data */
|
||||
irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
|
||||
disable_mappi_irq(M32R_IRQ_SIO0_S);
|
||||
|
||||
/* SIO1_R : uart receive data */
|
||||
irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
|
||||
disable_mappi_irq(M32R_IRQ_SIO1_R);
|
||||
|
||||
/* SIO1_S : uart send data */
|
||||
irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
|
||||
disable_mappi_irq(M32R_IRQ_SIO1_S);
|
||||
#endif /* CONFIG_SERIAL_M32R_SIO */
|
||||
|
||||
#if defined(CONFIG_M32R_PCC)
|
||||
/* INT1 : pccard0 interrupt */
|
||||
irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
|
||||
disable_mappi_irq(M32R_IRQ_INT1);
|
||||
|
||||
/* INT2 : pccard1 interrupt */
|
||||
irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
|
||||
handle_level_irq);
|
||||
icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
|
||||
disable_mappi_irq(M32R_IRQ_INT2);
|
||||
#endif /* CONFIG_M32RPCC */
|
||||
}
|
||||
|
||||
#if defined(CONFIG_FB_S1D13XXX)
|
||||
|
||||
#include <video/s1d13xxxfb.h>
|
||||
#include <asm/s1d13806.h>
|
||||
|
||||
static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
|
||||
.initregs = s1d13xxxfb_initregs,
|
||||
.initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
|
||||
.platform_init_video = NULL,
|
||||
#ifdef CONFIG_PM
|
||||
.platform_suspend_video = NULL,
|
||||
.platform_resume_video = NULL,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct resource s1d13xxxfb_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x10200000UL,
|
||||
.end = 0x1033FFFFUL,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 0x10000000UL,
|
||||
.end = 0x100001FFUL,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device s1d13xxxfb_device = {
|
||||
.name = S1D_DEVICENAME,
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &s1d13xxxfb_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
|
||||
.resource = s1d13xxxfb_resources,
|
||||
};
|
||||
|
||||
static int __init platform_init(void)
|
||||
{
|
||||
platform_device_register(&s1d13xxxfb_device);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(platform_init);
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue