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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-02 00:55:37 +01:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
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arch/m68k/include/asm/cacheflush_no.h
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arch/m68k/include/asm/cacheflush_no.h
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#ifndef _M68KNOMMU_CACHEFLUSH_H
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#define _M68KNOMMU_CACHEFLUSH_H
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/*
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* (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com>
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*/
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#include <linux/mm.h>
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#include <asm/mcfsim.h>
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#define flush_cache_all() __flush_cache_all()
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr) do { } while (0)
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#define flush_dcache_range(start, len) __flush_dcache_all()
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start, len) __flush_icache_all()
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#define flush_icache_page(vma,pg) do { } while (0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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void mcf_cache_push(void);
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static inline void __clear_cache_all(void)
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{
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#ifdef CACHE_INVALIDATE
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__asm__ __volatile__ (
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"movec %0, %%CACR\n\t"
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"nop\n\t"
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: : "r" (CACHE_INVALIDATE) );
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#endif
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}
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static inline void __flush_cache_all(void)
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{
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#ifdef CACHE_PUSH
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mcf_cache_push();
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#endif
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__clear_cache_all();
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}
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/*
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* Some ColdFire parts implement separate instruction and data caches,
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* on those we should just flush the appropriate cache. If we don't need
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* to do any specific flushing then this will be optimized away.
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*/
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static inline void __flush_icache_all(void)
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{
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#ifdef CACHE_INVALIDATEI
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__asm__ __volatile__ (
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"movec %0, %%CACR\n\t"
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"nop\n\t"
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: : "r" (CACHE_INVALIDATEI) );
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#endif
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}
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static inline void __flush_dcache_all(void)
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{
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#ifdef CACHE_PUSH
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mcf_cache_push();
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#endif
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#ifdef CACHE_INVALIDATED
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__asm__ __volatile__ (
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"movec %0, %%CACR\n\t"
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"nop\n\t"
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: : "r" (CACHE_INVALIDATED) );
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#else
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/* Flush the write buffer */
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__asm__ __volatile__ ( "nop" );
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#endif
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}
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/*
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* Push cache entries at supplied address. We want to write back any dirty
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* data and then invalidate the cache lines associated with this address.
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*/
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static inline void cache_push(unsigned long paddr, int len)
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{
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__flush_cache_all();
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}
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/*
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* Clear cache entries at supplied address (that is don't write back any
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* dirty data).
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*/
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static inline void cache_clear(unsigned long paddr, int len)
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{
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__clear_cache_all();
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}
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#endif /* _M68KNOMMU_CACHEFLUSH_H */
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