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Fixed MTP to work with TWRP
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f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
119
arch/m68k/include/asm/delay.h
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119
arch/m68k/include/asm/delay.h
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#ifndef _M68K_DELAY_H
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#define _M68K_DELAY_H
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#include <asm/param.h>
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/*
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* Copyright (C) 1994 Hamish Macdonald
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* Copyright (C) 2004 Greg Ungerer <gerg@uclinux.com>
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*
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* Delay routines, using a pre-computed "loops_per_jiffy" value.
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*/
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#if defined(CONFIG_COLDFIRE)
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/*
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* The ColdFire runs the delay loop at significantly different speeds
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* depending upon long word alignment or not. We'll pad it to
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* long word alignment which is the faster version.
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* The 0x4a8e is of course a 'tstl %fp' instruction. This is better
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* than using a NOP (0x4e71) instruction because it executes in one
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* cycle not three and doesn't allow for an arbitrary delay waiting
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* for bus cycles to finish. Also fp/a6 isn't likely to cause a
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* stall waiting for the register to become valid if such is added
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* to the coldfire at some stage.
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*/
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#define DELAY_ALIGN ".balignw 4, 0x4a8e\n\t"
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#else
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/*
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* No instruction alignment required for other m68k types.
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*/
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#define DELAY_ALIGN
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#endif
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static inline void __delay(unsigned long loops)
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{
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__asm__ __volatile__ (
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DELAY_ALIGN
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"1: subql #1,%0\n\t"
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"jcc 1b"
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: "=d" (loops)
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: "0" (loops));
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}
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extern void __bad_udelay(void);
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#ifdef CONFIG_CPU_HAS_NO_MULDIV64
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/*
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* The simpler m68k and ColdFire processors do not have a 32*32->64
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* multiply instruction. So we need to handle them a little differently.
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* We use a bit of shifting and a single 32*32->32 multiply to get close.
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* This is a macro so that the const version can factor out the first
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* multiply and shift.
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*/
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#define HZSCALE (268435456 / (1000000 / HZ))
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#define __const_udelay(u) \
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__delay(((((u) * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6)
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#else
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static inline void __xdelay(unsigned long xloops)
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{
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unsigned long tmp;
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__asm__ ("mulul %2,%0:%1"
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: "=d" (xloops), "=d" (tmp)
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: "d" (xloops), "1" (loops_per_jiffy));
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__delay(xloops * HZ);
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}
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/*
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* The definition of __const_udelay is specifically made a macro so that
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* the const factor (4295 = 2**32 / 1000000) can be optimized out when
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* the delay is a const.
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*/
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#define __const_udelay(n) (__xdelay((n) * 4295))
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#endif
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static inline void __udelay(unsigned long usecs)
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{
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__const_udelay(usecs);
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}
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/*
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* Use only for very small delays ( < 1 msec). Should probably use a
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* lookup table, really, as the multiplications take much too long with
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* short delays. This is a "reasonable" implementation, though (and the
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* first constant multiplications gets optimized away if the delay is
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* a constant)
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*/
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#define udelay(n) (__builtin_constant_p(n) ? \
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((n) > 20000 ? __bad_udelay() : __const_udelay(n)) : __udelay(n))
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/*
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* nanosecond delay:
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*
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* ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of loops
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* per microsecond
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*
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* 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of
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* nanoseconds per loop
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*
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* So n / ( 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) ) would
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* be the number of loops for n nanoseconds
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*/
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/*
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* The simpler m68k and ColdFire processors do not have a 32*32->64
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* multiply instruction. So we need to handle them a little differently.
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* We use a bit of shifting and a single 32*32->32 multiply to get close.
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* This is a macro so that the const version can factor out the first
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* multiply and shift.
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*/
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#define HZSCALE (268435456 / (1000000 / HZ))
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#define ndelay(n) __delay(DIV_ROUND_UP((n) * ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6), 1000));
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#endif /* defined(_M68K_DELAY_H) */
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