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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 01:28:05 -04:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
105
arch/m68k/include/asm/nettel.h
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105
arch/m68k/include/asm/nettel.h
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/****************************************************************************/
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/*
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* nettel.h -- Lineo (formerly Moreton Bay) NETtel support.
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*
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* (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com)
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* (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com)
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* (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com)
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*/
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/****************************************************************************/
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#ifndef nettel_h
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#define nettel_h
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/****************************************************************************/
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/****************************************************************************/
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#ifdef CONFIG_NETtel
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/****************************************************************************/
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#ifdef CONFIG_COLDFIRE
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/io.h>
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#endif
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/*---------------------------------------------------------------------------*/
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#if defined(CONFIG_M5307)
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/*
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* NETtel/5307 based hardware first. DTR/DCD lines are wired to
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* GPIO lines. Most of the LED's are driver through a latch
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* connected to CS2.
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*/
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#define MCFPP_DCD1 0x0001
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#define MCFPP_DCD0 0x0002
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#define MCFPP_DTR1 0x0004
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#define MCFPP_DTR0 0x0008
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#define NETtel_LEDADDR 0x30400000
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#ifndef __ASSEMBLY__
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extern volatile unsigned short ppdata;
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/*
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* These functions defined to give quasi generic access to the
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* PPIO bits used for DTR/DCD.
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*/
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static __inline__ unsigned int mcf_getppdata(void)
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{
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volatile unsigned short *pp;
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pp = (volatile unsigned short *) MCFSIM_PADAT;
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return((unsigned int) *pp);
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}
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static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
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{
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volatile unsigned short *pp;
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pp = (volatile unsigned short *) MCFSIM_PADAT;
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ppdata = (ppdata & ~mask) | bits;
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*pp = ppdata;
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}
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#endif
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/*---------------------------------------------------------------------------*/
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#elif defined(CONFIG_M5206e)
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/*
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* NETtel/5206e based hardware has leds on latch on CS3.
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* No support modem for lines??
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*/
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#define NETtel_LEDADDR 0x50000000
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/*---------------------------------------------------------------------------*/
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#elif defined(CONFIG_M5272)
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/*
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* NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
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*/
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#define MCFPP_DCD0 0x0080
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#define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */
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#define MCFPP_DTR0 0x0040
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#define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
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#ifndef __ASSEMBLY__
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/*
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* These functions defined to give quasi generic access to the
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* PPIO bits used for DTR/DCD.
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*/
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static __inline__ unsigned int mcf_getppdata(void)
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{
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return readw(MCFSIM_PBDAT);
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}
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static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
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{
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write((readw(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);
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}
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#endif
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#endif
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/*---------------------------------------------------------------------------*/
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/****************************************************************************/
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#endif /* CONFIG_NETtel */
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/****************************************************************************/
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#endif /* nettel_h */
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