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Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
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57
arch/mips/boot/Makefile Normal file
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#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
# Copyright (C) 1995, 1998, 2001, 2002 by Ralf Baechle
# Copyright (C) 2004 Maciej W. Rozycki
#
#
# Some DECstations need all possible sections of an ECOFF executable
#
ifdef CONFIG_MACH_DECSTATION
e2eflag := -a
endif
#
# Drop some uninteresting sections in the kernel.
# This is only relevant for ELF kernels but doesn't hurt a.out
#
drop-sections := .reginfo .mdebug .comment .note .pdr .options .MIPS.options
strip-flags := $(addprefix --remove-section=,$(drop-sections))
hostprogs-y := elf2ecoff
targets := vmlinux.ecoff
quiet_cmd_ecoff = ECOFF $@
cmd_ecoff = $(obj)/elf2ecoff $(VMLINUX) $@ $(e2eflag)
$(obj)/vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX) FORCE
$(call if_changed,ecoff)
targets += vmlinux.bin
quiet_cmd_bin = OBJCOPY $@
cmd_bin = $(OBJCOPY) -O binary $(strip-flags) $(VMLINUX) $@
$(obj)/vmlinux.bin: $(VMLINUX) FORCE
$(call if_changed,bin)
targets += vmlinux.srec
quiet_cmd_srec = OBJCOPY $@
cmd_srec = $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $@
$(obj)/vmlinux.srec: $(VMLINUX) FORCE
$(call if_changed,srec)
UIMAGE_LOADADDR = $(VMLINUX_LOAD_ADDRESS)
UIMAGE_ENTRYADDR = $(VMLINUX_ENTRY_ADDRESS)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
targets += uImage.gz
$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,uimage,gzip)
targets += uImage
$(obj)/uImage: $(obj)/uImage.gz FORCE
@ln -sf $(notdir $<) $@
@echo ' Image $@ is ready'

120
arch/mips/boot/compressed/Makefile Normal file
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#
# This file is subject to the terms and conditions of the GNU General Public
# License.
#
# Adapted for MIPS Pete Popov, Dan Malek
#
# Copyright (C) 1994 by Linus Torvalds
# Adapted for PowerPC by Gary Thomas
# modified by Cort (cort@cs.nmt.edu)
#
# Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University
# Author: Wu Zhangjin <wuzhangjin@gmail.com>
#
# set the default size of the mallocing area for decompressing
BOOT_HEAP_SIZE := 0x400000
# Disable Function Tracer
KBUILD_CFLAGS := $(shell echo $(KBUILD_CFLAGS) | sed -e "s/-pg//")
KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
KBUILD_CFLAGS := $(LINUXINCLUDE) $(KBUILD_CFLAGS) -D__KERNEL__ \
-DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull"
KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \
-DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) \
-DKERNEL_ENTRY=$(VMLINUX_ENTRY_ADDRESS)
targets := head.o decompress.o string.o dbg.o uart-16550.o uart-alchemy.o
# decompressor objects (linked with vmlinuz)
vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o $(obj)/dbg.o
ifdef CONFIG_DEBUG_ZBOOT
vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o
endif
ifdef CONFIG_KERNEL_XZ
vmlinuzobjs-y += $(obj)/../../lib/ashldi3.o
endif
targets += vmlinux.bin
OBJCOPYFLAGS_vmlinux.bin := $(OBJCOPYFLAGS) -O binary -R .comment -S
$(obj)/vmlinux.bin: $(KBUILD_IMAGE) FORCE
$(call if_changed,objcopy)
tool_$(CONFIG_KERNEL_GZIP) = gzip
tool_$(CONFIG_KERNEL_BZIP2) = bzip2
tool_$(CONFIG_KERNEL_LZ4) = lz4
tool_$(CONFIG_KERNEL_LZMA) = lzma
tool_$(CONFIG_KERNEL_LZO) = lzo
tool_$(CONFIG_KERNEL_XZ) = xzkern
targets += vmlinux.bin.z
$(obj)/vmlinux.bin.z: $(obj)/vmlinux.bin FORCE
$(call if_changed,$(tool_y))
targets += piggy.o
OBJCOPYFLAGS_piggy.o := --add-section=.image=$(obj)/vmlinux.bin.z \
--set-section-flags=.image=contents,alloc,load,readonly,data
$(obj)/piggy.o: $(obj)/dummy.o $(obj)/vmlinux.bin.z FORCE
$(call if_changed,objcopy)
# Calculate the load address of the compressed kernel image
hostprogs-y := calc_vmlinuz_load_addr
ifeq ($(CONFIG_MACH_JZ4740),y)
VMLINUZ_LOAD_ADDRESS := 0x80600000
else
VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
$(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
endif
vmlinuzobjs-y += $(obj)/piggy.o
quiet_cmd_zld = LD $@
cmd_zld = $(LD) $(LDFLAGS) -Ttext $(VMLINUZ_LOAD_ADDRESS) -T $< $(vmlinuzobjs-y) -o $@
quiet_cmd_strip = STRIP $@
cmd_strip = $(STRIP) -s $@
vmlinuz: $(src)/ld.script $(vmlinuzobjs-y) $(obj)/calc_vmlinuz_load_addr
$(call cmd,zld)
$(call cmd,strip)
#
# Some DECstations need all possible sections of an ECOFF executable
#
ifdef CONFIG_MACH_DECSTATION
e2eflag := -a
endif
# elf2ecoff can only handle 32bit image
hostprogs-y += ../elf2ecoff
ifdef CONFIG_32BIT
VMLINUZ = vmlinuz
else
VMLINUZ = vmlinuz.32
endif
quiet_cmd_32 = OBJCOPY $@
cmd_32 = $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
vmlinuz.32: vmlinuz
$(call cmd,32)
quiet_cmd_ecoff = ECOFF $@
cmd_ecoff = $< $(VMLINUZ) $@ $(e2eflag)
vmlinuz.ecoff: $(obj)/../elf2ecoff $(VMLINUZ)
$(call cmd,ecoff)
OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary
vmlinuz.bin: vmlinuz
$(call cmd,objcopy)
OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec
vmlinuz.srec: vmlinuz
$(call cmd,objcopy)
clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec}

57
arch/mips/boot/compressed/calc_vmlinuz_load_addr.c Normal file
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/*
* Copyright (C) 2010 "Wu Zhangjin" <wuzhangjin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <sys/types.h>
#include <sys/stat.h>
#include <errno.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
int main(int argc, char *argv[])
{
unsigned long long vmlinux_size, vmlinux_load_addr, vmlinuz_load_addr;
struct stat sb;
if (argc != 3) {
fprintf(stderr, "Usage: %s <pathname> <vmlinux_load_addr>\n",
argv[0]);
return EXIT_FAILURE;
}
if (stat(argv[1], &sb) == -1) {
perror("stat");
return EXIT_FAILURE;
}
/* Convert hex characters to dec number */
errno = 0;
if (sscanf(argv[2], "%llx", &vmlinux_load_addr) != 1) {
if (errno != 0)
perror("sscanf");
else
fprintf(stderr, "No matching characters\n");
return EXIT_FAILURE;
}
vmlinux_size = (uint64_t)sb.st_size;
vmlinuz_load_addr = vmlinux_load_addr + vmlinux_size;
/*
* Align with 16 bytes: "greater than that used for any standard data
* types by a MIPS compiler." -- See MIPS Run Linux (Second Edition).
*/
vmlinuz_load_addr += (16 - vmlinux_size % 16);
printf("0x%llx\n", vmlinuz_load_addr);
return EXIT_SUCCESS;
}

36
arch/mips/boot/compressed/dbg.c Normal file
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/*
* MIPS-specific debug support for pre-boot environment
*
* NOTE: putc() is board specific, if your board have a 16550 compatible uart,
* please select SYS_SUPPORTS_ZBOOT_UART16550 for your machine. othewise, you
* need to implement your own putc().
*/
#include <linux/compiler.h>
#include <linux/types.h>
void __weak putc(char c)
{
}
void puts(const char *s)
{
char c;
while ((c = *s++) != '\0') {
putc(c);
if (c == '\n')
putc('\r');
}
}
void puthex(unsigned long long val)
{
unsigned char buf[10];
int i;
for (i = 7; i >= 0; i--) {
buf[i] = "0123456789ABCDEF"[val & 0x0F];
val >>= 4;
}
buf[8] = '\0';
puts(buf);
}

114
arch/mips/boot/compressed/decompress.c Normal file
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/*
* Copyright 2001 MontaVista Software Inc.
* Author: Matt Porter <mporter@mvista.com>
*
* Copyright (C) 2009 Lemote, Inc.
* Author: Wu Zhangjin <wuzhangjin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/addrspace.h>
/*
* These two variables specify the free mem region
* that can be used for temporary malloc area
*/
unsigned long free_mem_ptr;
unsigned long free_mem_end_ptr;
/* The linker tells us where the image is. */
extern unsigned char __image_begin, __image_end;
/* debug interfaces */
extern void puts(const char *s);
extern void puthex(unsigned long long val);
void error(char *x)
{
puts("\n\n");
puts(x);
puts("\n\n -- System halted");
while (1)
; /* Halt */
}
/* activate the code for pre-boot environment */
#define STATIC static
#ifdef CONFIG_KERNEL_GZIP
#include "../../../../lib/decompress_inflate.c"
#endif
#ifdef CONFIG_KERNEL_BZIP2
#include "../../../../lib/decompress_bunzip2.c"
#endif
#ifdef CONFIG_KERNEL_LZ4
#include "../../../../lib/decompress_unlz4.c"
#endif
#ifdef CONFIG_KERNEL_LZMA
#include "../../../../lib/decompress_unlzma.c"
#endif
#ifdef CONFIG_KERNEL_LZO
#include "../../../../lib/decompress_unlzo.c"
#endif
#ifdef CONFIG_KERNEL_XZ
#include "../../../../lib/decompress_unxz.c"
#endif
unsigned long __stack_chk_guard;
void __stack_chk_guard_setup(void)
{
__stack_chk_guard = 0x000a0dff;
}
void __stack_chk_fail(void)
{
error("stack-protector: Kernel stack is corrupted\n");
}
void decompress_kernel(unsigned long boot_heap_start)
{
unsigned long zimage_start, zimage_size;
__stack_chk_guard_setup();
zimage_start = (unsigned long)(&__image_begin);
zimage_size = (unsigned long)(&__image_end) -
(unsigned long)(&__image_begin);
puts("zimage at: ");
puthex(zimage_start);
puts(" ");
puthex(zimage_size + zimage_start);
puts("\n");
/* This area are prepared for mallocing when decompressing */
free_mem_ptr = boot_heap_start;
free_mem_end_ptr = boot_heap_start + BOOT_HEAP_SIZE;
/* Display standard Linux/MIPS boot prompt */
puts("Uncompressing Linux at load address ");
puthex(VMLINUX_LOAD_ADDRESS_ULL);
puts("\n");
/* Decompress the kernel with according algorithm */
decompress((char *)zimage_start, zimage_size, 0, 0,
(void *)VMLINUX_LOAD_ADDRESS_ULL, 0, error);
/* FIXME: should we flush cache here? */
puts("Now, booting the kernel...\n");
}

4
arch/mips/boot/compressed/dummy.c Normal file
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int main(void)
{
return 0;
}

56
arch/mips/boot/compressed/head.S Normal file
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1994, 1995 Waldorf Electronics
* Written by Ralf Baechle and Andreas Busse
* Copyright (C) 1995 - 1999 Ralf Baechle
* Copyright (C) 1996 Paul M. Antoine
* Modified for DECStation and hence R3000 support by Paul M. Antoine
* Further modifications by David S. Miller and Harald Koerfgen
* Copyright (C) 1999 Silicon Graphics, Inc.
*/
#include <asm/asm.h>
#include <asm/regdef.h>
.set noreorder
.cprestore
LEAF(start)
start:
/* Save boot rom start args */
move s0, a0
move s1, a1
move s2, a2
move s3, a3
/* Clear BSS */
PTR_LA a0, _edata
PTR_LA a2, _end
1: sw zero, 0(a0)
bne a2, a0, 1b
addiu a0, a0, 4
PTR_LA a0, (.heap) /* heap address */
PTR_LA sp, (.stack + 8192) /* stack address */
PTR_LA ra, 2f
PTR_LA k0, decompress_kernel
jr k0
nop
2:
move a0, s0
move a1, s1
move a2, s2
move a3, s3
PTR_LI k0, KERNEL_ENTRY
jr k0
nop
3:
b 3b
nop
END(start)
.comm .heap,BOOT_HEAP_SIZE,4
.comm .stack,4096*2,4

53
arch/mips/boot/compressed/ld.script Normal file
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/*
* ld.script for compressed kernel support of MIPS
*
* Copyright (C) 2009 Lemote Inc.
* Author: Wu Zhangjin <wuzhanjing@gmail.com>
* Copyright (C) 2010 "Wu Zhangjin" <wuzhanjing@gmail.com>
*/
OUTPUT_ARCH(mips)
ENTRY(start)
PHDRS {
text PT_LOAD FLAGS(7); /* RWX */
}
SECTIONS
{
/* Text and read-only data */
/* . = VMLINUZ_LOAD_ADDRESS; */
.text : {
*(.text)
*(.rodata)
}: text
/* End of text section */
/* Writable data */
.data : {
*(.data)
/* Put the compressed image here */
__image_begin = .;
*(.image)
__image_end = .;
CONSTRUCTORS
}
. = ALIGN(16);
_edata = .;
/* End of data section */
/* BSS */
.bss : {
*(.bss)
}
. = ALIGN(16);
_end = .;
/* Sections to be discarded */
/DISCARD/ : {
*(.MIPS.options)
*(.options)
*(.pdr)
*(.reginfo)
*(.comment)
*(.note)
}
}

28
arch/mips/boot/compressed/string.c Normal file
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/*
* arch/mips/boot/compressed/string.c
*
* Very small subset of simple string routines
*/
#include <linux/types.h>
void *memcpy(void *dest, const void *src, size_t n)
{
int i;
const char *s = src;
char *d = dest;
for (i = 0; i < n; i++)
d[i] = s[i];
return dest;
}
void *memset(void *s, int c, size_t n)
{
int i;
char *ss = s;
for (i = 0; i < n; i++)
ss[i] = c;
return s;
}

63
arch/mips/boot/compressed/uart-16550.c Normal file
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/*
* 16550 compatible uart based serial debug support for zboot
*/
#include <linux/types.h>
#include <linux/serial_reg.h>
#include <asm/addrspace.h>
#if defined(CONFIG_MACH_LOONGSON) || defined(CONFIG_MIPS_MALTA)
#define UART_BASE 0x1fd003f8
#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
#endif
#ifdef CONFIG_AR7
#include <ar7.h>
#define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
#endif
#ifdef CONFIG_MACH_JZ4740
#include <asm/mach-jz4740/base.h>
#define PORT(offset) (CKSEG1ADDR(JZ4740_UART0_BASE_ADDR) + (4 * offset))
#endif
#ifdef CONFIG_CPU_XLR
#define UART0_BASE 0x1EF14000
#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
#define IOTYPE unsigned int
#endif
#ifdef CONFIG_CPU_XLP
#define UART0_BASE 0x18030100
#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
#define IOTYPE unsigned int
#endif
#ifndef IOTYPE
#define IOTYPE char
#endif
#ifndef PORT
#error please define the serial port address for your own machine
#endif
static inline unsigned int serial_in(int offset)
{
return *((volatile IOTYPE *)PORT(offset)) & 0xFF;
}
static inline void serial_out(int offset, int value)
{
*((volatile IOTYPE *)PORT(offset)) = value & 0xFF;
}
void putc(char c)
{
int timeout = 1000000;
while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0))
;
serial_out(UART_TX, c);
}

6
arch/mips/boot/compressed/uart-alchemy.c Normal file
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#include <asm/mach-au1x00/au1000.h>
void putc(char c)
{
alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
}

20
arch/mips/boot/dts/Makefile Normal file
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dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb
dtb-$(CONFIG_DT_EASY50712) += easy50712.dtb
dtb-$(CONFIG_DT_XLP_EVP) += xlp_evp.dtb
dtb-$(CONFIG_DT_XLP_SVP) += xlp_svp.dtb
dtb-$(CONFIG_DT_XLP_FVP) += xlp_fvp.dtb
dtb-$(CONFIG_DT_XLP_GVP) += xlp_gvp.dtb
dtb-$(CONFIG_DTB_RT2880_EVAL) += rt2880_eval.dtb
dtb-$(CONFIG_DTB_RT305X_EVAL) += rt3052_eval.dtb
dtb-$(CONFIG_DTB_RT3883_EVAL) += rt3883_eval.dtb
dtb-$(CONFIG_DTB_MT7620A_EVAL) += mt7620a_eval.dtb
dtb-$(CONFIG_MIPS_SEAD3) += sead3.dtb
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
targets += dtbs
targets += $(dtb-y)
dtbs: $(addprefix $(obj)/, $(dtb-y))
clean-files += *.dtb *.dtb.S

105
arch/mips/boot/dts/danube.dtsi Normal file
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/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,xway", "lantiq,danube";
cpus {
cpu@0 {
compatible = "mips,mips24Kc";
};
};
biu@1F800000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,biu", "simple-bus";
reg = <0x1F800000 0x800000>;
ranges = <0x0 0x1F800000 0x7FFFFF>;
icu0: icu@80200 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
reg = <0x80200 0x120>;
};
watchdog@803F0 {
compatible = "lantiq,wdt";
reg = <0x803F0 0x10>;
};
};
sram@1F000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,sram";
reg = <0x1F000000 0x800000>;
ranges = <0x0 0x1F000000 0x7FFFFF>;
eiu0: eiu@101000 {
#interrupt-cells = <1>;
interrupt-controller;
interrupt-parent;
compatible = "lantiq,eiu-xway";
reg = <0x101000 0x1000>;
};
pmu0: pmu@102000 {
compatible = "lantiq,pmu-xway";
reg = <0x102000 0x1000>;
};
cgu0: cgu@103000 {
compatible = "lantiq,cgu-xway";
reg = <0x103000 0x1000>;
#clock-cells = <1>;
};
rcu0: rcu@203000 {
compatible = "lantiq,rcu-xway";
reg = <0x203000 0x1000>;
};
};
fpi@10000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,fpi", "simple-bus";
ranges = <0x0 0x10000000 0xEEFFFFF>;
reg = <0x10000000 0xEF00000>;
gptu@E100A00 {
compatible = "lantiq,gptu-xway";
reg = <0xE100A00 0x100>;
};
serial@E100C00 {
compatible = "lantiq,asc";
reg = <0xE100C00 0x400>;
interrupt-parent = <&icu0>;
interrupts = <112 113 114>;
};
dma0: dma@E104100 {
compatible = "lantiq,dma-xway";
reg = <0xE104100 0x800>;
};
ebu0: ebu@E105300 {
compatible = "lantiq,ebu-xway";
reg = <0xE105300 0x100>;
};
pci0: pci@E105400 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
compatible = "lantiq,pci-xway";
bus-range = <0x0 0x0>;
ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
reg = <0x7000000 0x8000 /* config space */
0xE105400 0x400>; /* pci bridge */
};
};
};

114
arch/mips/boot/dts/easy50712.dts Normal file
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/dts-v1/;
/include/ "danube.dtsi"
/ {
chosen {
bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
};
fpi@10000000 {
#address-cells = <1>;
#size-cells = <1>;
localbus@0 {
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
nor-boot@0 {
compatible = "lantiq,nor";
bank-width = <2>;
reg = <0 0x0 0x2000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "uboot";
reg = <0x00000 0x10000>; /* 64 KB */
};
partition@10000 {
label = "uboot_env";
reg = <0x10000 0x10000>; /* 64 KB */
};
partition@20000 {
label = "linux";
reg = <0x20000 0x3d0000>;
};
partition@400000 {
label = "rootfs";
reg = <0x400000 0x400000>;
};
};
};
gpio: pinmux@E100B10 {
compatible = "lantiq,pinctrl-xway";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
#gpio-cells = <2>;
gpio-controller;
reg = <0xE100B10 0xA0>;
state_default: pinmux {
stp {
lantiq,groups = "stp";
lantiq,function = "stp";
};
exin {
lantiq,groups = "exin1";
lantiq,function = "exin";
};
pci {
lantiq,groups = "gnt1";
lantiq,function = "pci";
};
conf_out {
lantiq,pins = "io4", "io5", "io6"; /* stp */
lantiq,open-drain;
lantiq,pull = <0>;
};
};
};
etop@E180000 {
compatible = "lantiq,etop-xway";
reg = <0xE180000 0x40000>;
interrupt-parent = <&icu0>;
interrupts = <73 78>;
phy-mode = "rmii";
mac-address = [ 00 11 22 33 44 55 ];
};
stp0: stp@E100BB0 {
#gpio-cells = <2>;
compatible = "lantiq,gpio-stp-xway";
gpio-controller;
reg = <0xE100BB0 0x40>;
lantiq,shadow = <0xfff>;
lantiq,groups = <0x3>;
};
pci@E105400 {
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
>;
gpios-reset = <&gpio 21 0>;
req-mask = <0x1>; /* GNT1 */
};
};
};

1
arch/mips/boot/dts/include/dt-bindings Symbolic link
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../../../../../include/dt-bindings

58
arch/mips/boot/dts/mt7620a.dtsi Normal file
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/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,mtk7620a-soc";
cpus {
cpu@0 {
compatible = "mips,mips24KEc";
};
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc@0 {
compatible = "ralink,mt7620a-sysc";
reg = <0x0 0x100>;
};
intc: intc@200 {
compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
memc@300 {
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
};
uartlite@c00 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
interrupt-parent = <&intc>;
interrupts = <12>;
reg-shift = <2>;
};
};
};

17
arch/mips/boot/dts/mt7620a_eval.dts Normal file
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/dts-v1/;
/include/ "mt7620a.dtsi"
/ {
compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
model = "Ralink MT7620A evaluation board";
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
};

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arch/mips/boot/dts/octeon_3xxx.dts Normal file
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/dts-v1/;
/*
* OCTEON 3XXX, 5XXX, 63XX device tree skeleton.
*
* This device tree is pruned and patched by early boot code before
* use. Because of this, it contains a super-set of the available
* devices and properties.
*/
/ {
compatible = "cavium,octeon-3860";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&ciu>;
soc@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges; /* Direct mapping */
ciu: interrupt-controller@1070000000000 {
compatible = "cavium,octeon-3860-ciu";
interrupt-controller;
/* Interrupts are specified by two parts:
* 1) Controller register (0 or 1)
* 2) Bit within the register (0..63)
*/
#interrupt-cells = <2>;
reg = <0x10700 0x00000000 0x0 0x7000>;
};
gpio: gpio-controller@1070000000800 {
#gpio-cells = <2>;
compatible = "cavium,octeon-3860-gpio";
reg = <0x10700 0x00000800 0x0 0x100>;
gpio-controller;
/* Interrupts are specified by two parts:
* 1) GPIO pin number (0..15)
* 2) Triggering (1 - edge rising
* 2 - edge falling
* 4 - level active high
* 8 - level active low)
*/
interrupt-controller;
#interrupt-cells = <2>;
/* The GPIO pin connect to 16 consecutive CUI bits */
interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
<0 20>, <0 21>, <0 22>, <0 23>,
<0 24>, <0 25>, <0 26>, <0 27>,
<0 28>, <0 29>, <0 30>, <0 31>;
};
smi0: mdio@1180000001800 {
compatible = "cavium,octeon-3860-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0x00001800 0x0 0x40>;
phy0: ethernet-phy@0 {
compatible = "marvell,88e1118";
marvell,reg-init =
/* Fix rx and tx clock transition timing */
<2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
/* Adjust LED drive. */
<3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
/* irq, blink-activity, blink-link */
<3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
reg = <0>;
};
phy1: ethernet-phy@1 {
compatible = "marvell,88e1118";
marvell,reg-init =
/* Fix rx and tx clock transition timing */
<2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
/* Adjust LED drive. */
<3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
/* irq, blink-activity, blink-link */
<3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy8: ethernet-phy@8 {
reg = <8>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy9: ethernet-phy@9 {
reg = <9>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
};
smi1: mdio@1180000001900 {
compatible = "cavium,octeon-3860-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0x00001900 0x0 0x40>;
phy100: ethernet-phy@1 {
reg = <1>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
interrupt-parent = <&gpio>;
interrupts = <12 8>; /* Pin 12, active low */
};
phy101: ethernet-phy@2 {
reg = <2>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
interrupt-parent = <&gpio>;
interrupts = <12 8>; /* Pin 12, active low */
};
phy102: ethernet-phy@3 {
reg = <3>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
interrupt-parent = <&gpio>;
interrupts = <12 8>; /* Pin 12, active low */
};
phy103: ethernet-phy@4 {
reg = <4>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
interrupt-parent = <&gpio>;
interrupts = <12 8>; /* Pin 12, active low */
};
};
mix0: ethernet@1070000100000 {
compatible = "cavium,octeon-5750-mix";
reg = <0x10700 0x00100000 0x0 0x100>, /* MIX */
<0x11800 0xE0000000 0x0 0x300>, /* AGL */
<0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */
<0x11800 0xE0002000 0x0 0x8>; /* AGL_PRT_CTL */
cell-index = <0>;
interrupts = <0 62>, <1 46>;
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy0>;
};
mix1: ethernet@1070000100800 {
compatible = "cavium,octeon-5750-mix";
reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */
<0x11800 0xE0000800 0x0 0x300>, /* AGL */
<0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */
<0x11800 0xE0002008 0x0 0x8>; /* AGL_PRT_CTL */
cell-index = <1>;
interrupts = <1 18>, < 1 46>;
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy1>;
};
pip: pip@11800a0000000 {
compatible = "cavium,octeon-3860-pip";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0xa0000000 0x0 0x2000>;
interface@0 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy2>;
cavium,alt-phy-handle = <&phy100>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy3>;
cavium,alt-phy-handle = <&phy101>;
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy4>;
cavium,alt-phy-handle = <&phy102>;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy5>;
cavium,alt-phy-handle = <&phy103>;
};
ethernet@4 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x4>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@5 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x5>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@6 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x6>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@7 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x7>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@8 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x8>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@9 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x9>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@a {
compatible = "cavium,octeon-3860-pip-port";
reg = <0xa>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@b {
compatible = "cavium,octeon-3860-pip-port";
reg = <0xb>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@c {
compatible = "cavium,octeon-3860-pip-port";
reg = <0xc>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@d {
compatible = "cavium,octeon-3860-pip-port";
reg = <0xd>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@e {
compatible = "cavium,octeon-3860-pip-port";
reg = <0xe>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
ethernet@f {
compatible = "cavium,octeon-3860-pip-port";
reg = <0xf>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
interface@1 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <1>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy6>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy7>;
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy8>;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy9>;
};
};
};
twsi0: i2c@1180000001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-3860-twsi";
reg = <0x11800 0x00001000 0x0 0x200>;
interrupts = <0 45>;
clock-frequency = <100000>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
tmp@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
twsi1: i2c@1180000001200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-3860-twsi";
reg = <0x11800 0x00001200 0x0 0x200>;
interrupts = <0 59>;
clock-frequency = <100000>;
};
uart0: serial@1180000000800 {
compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000800 0x0 0x400>;
clock-frequency = <0>;
current-speed = <115200>;
reg-shift = <3>;
interrupts = <0 34>;
};
uart1: serial@1180000000c00 {
compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000c00 0x0 0x400>;
clock-frequency = <0>;
current-speed = <115200>;
reg-shift = <3>;
interrupts = <0 35>;
};
uart2: serial@1180000000400 {
compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000400 0x0 0x400>;
clock-frequency = <0>;
current-speed = <115200>;
reg-shift = <3>;
interrupts = <1 16>;
};
bootbus: bootbus@1180000000000 {
compatible = "cavium,octeon-3860-bootbus";
reg = <0x11800 0x00000000 0x0 0x200>;
/* The chip select number and offset */
#address-cells = <2>;
/* The size of the chip select region */
#size-cells = <1>;
ranges = <0 0 0x0 0x1f400000 0xc00000>,
<1 0 0x10000 0x30000000 0>,
<2 0 0x10000 0x40000000 0>,
<3 0 0x10000 0x50000000 0>,
<4 0 0x0 0x1d020000 0x10000>,
<5 0 0x0 0x1d040000 0x10000>,
<6 0 0x0 0x1d050000 0x10000>,
<7 0 0x10000 0x90000000 0>;
cavium,cs-config@0 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <0>;
cavium,t-adr = <20>;
cavium,t-ce = <60>;
cavium,t-oe = <60>;
cavium,t-we = <45>;
cavium,t-rd-hld = <35>;
cavium,t-wr-hld = <45>;
cavium,t-pause = <0>;
cavium,t-wait = <0>;
cavium,t-page = <35>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,bus-width = <8>;
};
cavium,cs-config@4 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <4>;
cavium,t-adr = <320>;
cavium,t-ce = <320>;
cavium,t-oe = <320>;
cavium,t-we = <320>;
cavium,t-rd-hld = <320>;
cavium,t-wr-hld = <320>;
cavium,t-pause = <320>;
cavium,t-wait = <320>;
cavium,t-page = <320>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,bus-width = <8>;
};
cavium,cs-config@5 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <5>;
cavium,t-adr = <5>;
cavium,t-ce = <300>;
cavium,t-oe = <125>;
cavium,t-we = <150>;
cavium,t-rd-hld = <100>;
cavium,t-wr-hld = <30>;
cavium,t-pause = <0>;
cavium,t-wait = <30>;
cavium,t-page = <320>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,bus-width = <16>;
};
cavium,cs-config@6 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <6>;
cavium,t-adr = <5>;
cavium,t-ce = <300>;
cavium,t-oe = <270>;
cavium,t-we = <150>;
cavium,t-rd-hld = <100>;
cavium,t-wr-hld = <70>;
cavium,t-pause = <0>;
cavium,t-wait = <0>;
cavium,t-page = <320>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,wait-mode;
cavium,bus-width = <16>;
};
flash0: nor@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x800000>;
#address-cells = <1>;
#size-cells = <1>;
};
led0: led-display@4,0 {
compatible = "avago,hdsp-253x";
reg = <4 0x20 0x20>, <4 0 0x20>;
};
cf0: compact-flash@5,0 {
compatible = "cavium,ebt3000-compact-flash";
reg = <5 0 0x10000>, <6 0 0x10000>;
cavium,bus-width = <16>;
cavium,true-ide;
cavium,dma-engine-handle = <&dma0>;
};
};
dma0: dma-engine@1180000000100 {
compatible = "cavium,octeon-5750-bootbus-dma";
reg = <0x11800 0x00000100 0x0 0x8>;
interrupts = <0 63>;
};
dma1: dma-engine@1180000000108 {
compatible = "cavium,octeon-5750-bootbus-dma";
reg = <0x11800 0x00000108 0x0 0x8>;
interrupts = <0 63>;
};
uctl: uctl@118006f000000 {
compatible = "cavium,octeon-6335-uctl";
reg = <0x11800 0x6f000000 0x0 0x100>;
ranges; /* Direct mapping */
#address-cells = <2>;
#size-cells = <2>;
/* 12MHz, 24MHz and 48MHz allowed */
refclk-frequency = <12000000>;
/* Either "crystal" or "external" */
refclk-type = "crystal";
ehci@16f0000000000 {
compatible = "cavium,octeon-6335-ehci","usb-ehci";
reg = <0x16f00 0x00000000 0x0 0x100>;
interrupts = <0 56>;
big-endian-regs;
};
ohci@16f0000000400 {
compatible = "cavium,octeon-6335-ohci","usb-ohci";
reg = <0x16f00 0x00000400 0x0 0x100>;
interrupts = <0 56>;
big-endian-regs;
};
};
usbn: usbn@1180068000000 {
compatible = "cavium,octeon-5750-usbn";
reg = <0x11800 0x68000000 0x0 0x1000>;
ranges; /* Direct mapping */
#address-cells = <2>;
#size-cells = <2>;
/* 12MHz, 24MHz and 48MHz allowed */
refclk-frequency = <12000000>;
/* Either "crystal" or "external" */
refclk-type = "crystal";
usbc@16f0010000000 {
compatible = "cavium,octeon-5750-usbc";
reg = <0x16f00 0x10000000 0x0 0x80000>;
interrupts = <0 56>;
};
};
};
aliases {
mix0 = &mix0;
mix1 = &mix1;
pip = &pip;
smi0 = &smi0;
smi1 = &smi1;
twsi0 = &twsi0;
twsi1 = &twsi1;
uart0 = &uart0;
uart1 = &uart1;
uart2 = &uart2;
flash0 = &flash0;
cf0 = &cf0;
uctl = &uctl;
usbn = &usbn;
led0 = &led0;
};
};

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arch/mips/boot/dts/octeon_68xx.dts Normal file
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/dts-v1/;
/*
* OCTEON 68XX device tree skeleton.
*
* This device tree is pruned and patched by early boot code before
* use. Because of this, it contains a super-set of the available
* devices and properties.
*/
/ {
compatible = "cavium,octeon-6880";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&ciu2>;
soc@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges; /* Direct mapping */
ciu2: interrupt-controller@1070100000000 {
compatible = "cavium,octeon-6880-ciu2";
interrupt-controller;
/* Interrupts are specified by two parts:
* 1) Controller register (0 or 7)
* 2) Bit within the register (0..63)
*/
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x10701 0x00000000 0x0 0x4000000>;
};
gpio: gpio-controller@1070000000800 {
#gpio-cells = <2>;
compatible = "cavium,octeon-3860-gpio";
reg = <0x10700 0x00000800 0x0 0x100>;
gpio-controller;
/* Interrupts are specified by two parts:
* 1) GPIO pin number (0..15)
* 2) Triggering (1 - edge rising
* 2 - edge falling
* 4 - level active high
* 8 - level active low)
*/
interrupt-controller;
#interrupt-cells = <2>;
/* The GPIO pins connect to 16 consecutive CUI bits */
interrupts = <7 0>, <7 1>, <7 2>, <7 3>,
<7 4>, <7 5>, <7 6>, <7 7>,
<7 8>, <7 9>, <7 10>, <7 11>,
<7 12>, <7 13>, <7 14>, <7 15>;
};
smi0: mdio@1180000003800 {
compatible = "cavium,octeon-3860-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0x00003800 0x0 0x40>;
phy0: ethernet-phy@6 {
compatible = "marvell,88e1118";
marvell,reg-init =
/* Fix rx and tx clock transition timing */
<2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
/* Adjust LED drive. */
<3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
/* irq, blink-activity, blink-link */
<3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
reg = <6>;
};
phy1: ethernet-phy@1 {
cavium,qlm-trim = "4,sgmii";
reg = <1>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy2: ethernet-phy@2 {
cavium,qlm-trim = "4,sgmii";
reg = <2>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy3: ethernet-phy@3 {
cavium,qlm-trim = "4,sgmii";
reg = <3>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy4: ethernet-phy@4 {
cavium,qlm-trim = "4,sgmii";
reg = <4>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
};
smi1: mdio@1180000003880 {
compatible = "cavium,octeon-3860-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0x00003880 0x0 0x40>;
phy41: ethernet-phy@1 {
cavium,qlm-trim = "0,sgmii";
reg = <1>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy42: ethernet-phy@2 {
cavium,qlm-trim = "0,sgmii";
reg = <2>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy43: ethernet-phy@3 {
cavium,qlm-trim = "0,sgmii";
reg = <3>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy44: ethernet-phy@4 {
cavium,qlm-trim = "0,sgmii";
reg = <4>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
};
smi2: mdio@1180000003900 {
compatible = "cavium,octeon-3860-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0x00003900 0x0 0x40>;
phy21: ethernet-phy@1 {
cavium,qlm-trim = "2,sgmii";
reg = <1>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy22: ethernet-phy@2 {
cavium,qlm-trim = "2,sgmii";
reg = <2>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy23: ethernet-phy@3 {
cavium,qlm-trim = "2,sgmii";
reg = <3>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy24: ethernet-phy@4 {
cavium,qlm-trim = "2,sgmii";
reg = <4>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
};
smi3: mdio@1180000003980 {
compatible = "cavium,octeon-3860-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0x00003980 0x0 0x40>;
phy11: ethernet-phy@1 {
cavium,qlm-trim = "3,sgmii";
reg = <1>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy12: ethernet-phy@2 {
cavium,qlm-trim = "3,sgmii";
reg = <2>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy13: ethernet-phy@3 {
cavium,qlm-trim = "3,sgmii";
reg = <3>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
phy14: ethernet-phy@4 {
cavium,qlm-trim = "3,sgmii";
reg = <4>;
compatible = "marvell,88e1149r";
marvell,reg-init = <3 0x10 0 0x5777>,
<3 0x11 0 0x00aa>,
<3 0x12 0 0x4105>,
<3 0x13 0 0x0a60>;
};
};
mix0: ethernet@1070000100000 {
compatible = "cavium,octeon-5750-mix";
reg = <0x10700 0x00100000 0x0 0x100>, /* MIX */
<0x11800 0xE0000000 0x0 0x300>, /* AGL */
<0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */
<0x11800 0xE0002000 0x0 0x8>; /* AGL_PRT_CTL */
cell-index = <0>;
interrupts = <6 40>, <6 32>;
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy0>;
};
pip: pip@11800a0000000 {
compatible = "cavium,octeon-3860-pip";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11800 0xa0000000 0x0 0x2000>;
interface@4 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy1>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy2>;
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy3>;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy4>;
};
};
interface@3 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy11>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy12>;
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy13>;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy14>;
};
};
interface@2 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy21>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy22>;
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy23>;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy24>;
};
};
interface@1 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
};
};
interface@0 {
compatible = "cavium,octeon-3860-pip-interface";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>; /* interface */
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy41>;
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy42>;
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy43>;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>; /* Port */
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = <&phy44>;
};
};
};
twsi0: i2c@1180000001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-3860-twsi";
reg = <0x11800 0x00001000 0x0 0x200>;
interrupts = <3 32>;
clock-frequency = <100000>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
tmp@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
twsi1: i2c@1180000001200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-3860-twsi";
reg = <0x11800 0x00001200 0x0 0x200>;
interrupts = <3 33>;
clock-frequency = <100000>;
};
uart0: serial@1180000000800 {
compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000800 0x0 0x400>;
clock-frequency = <0>;
current-speed = <115200>;
reg-shift = <3>;
interrupts = <3 36>;
};
uart1: serial@1180000000c00 {
compatible = "cavium,octeon-3860-uart","ns16550";
reg = <0x11800 0x00000c00 0x0 0x400>;
clock-frequency = <0>;
current-speed = <115200>;
reg-shift = <3>;
interrupts = <3 37>;
};
bootbus: bootbus@1180000000000 {
compatible = "cavium,octeon-3860-bootbus";
reg = <0x11800 0x00000000 0x0 0x200>;
/* The chip select number and offset */
#address-cells = <2>;
/* The size of the chip select region */
#size-cells = <1>;
ranges = <0 0 0 0x1f400000 0xc00000>,
<1 0 0x10000 0x30000000 0>,
<2 0 0x10000 0x40000000 0>,
<3 0 0x10000 0x50000000 0>,
<4 0 0 0x1d020000 0x10000>,
<5 0 0 0x1d040000 0x10000>,
<6 0 0 0x1d050000 0x10000>,
<7 0 0x10000 0x90000000 0>;
cavium,cs-config@0 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <0>;
cavium,t-adr = <10>;
cavium,t-ce = <50>;
cavium,t-oe = <50>;
cavium,t-we = <35>;
cavium,t-rd-hld = <25>;
cavium,t-wr-hld = <35>;
cavium,t-pause = <0>;
cavium,t-wait = <300>;
cavium,t-page = <25>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,bus-width = <8>;
};
cavium,cs-config@4 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <4>;
cavium,t-adr = <320>;
cavium,t-ce = <320>;
cavium,t-oe = <320>;
cavium,t-we = <320>;
cavium,t-rd-hld = <320>;
cavium,t-wr-hld = <320>;
cavium,t-pause = <320>;
cavium,t-wait = <320>;
cavium,t-page = <320>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,bus-width = <8>;
};
cavium,cs-config@5 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <5>;
cavium,t-adr = <0>;
cavium,t-ce = <300>;
cavium,t-oe = <125>;
cavium,t-we = <150>;
cavium,t-rd-hld = <100>;
cavium,t-wr-hld = <300>;
cavium,t-pause = <0>;
cavium,t-wait = <300>;
cavium,t-page = <310>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,bus-width = <16>;
};
cavium,cs-config@6 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <6>;
cavium,t-adr = <0>;
cavium,t-ce = <30>;
cavium,t-oe = <125>;
cavium,t-we = <150>;
cavium,t-rd-hld = <100>;
cavium,t-wr-hld = <30>;
cavium,t-pause = <0>;
cavium,t-wait = <30>;
cavium,t-page = <310>;
cavium,t-rd-dly = <0>;
cavium,pages = <0>;
cavium,wait-mode;
cavium,bus-width = <16>;
};
flash0: nor@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x800000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0 0x200000>;
read-only;
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x200000>;
};
partition@400000 {
label = "cramfs";
reg = <0x400000 0x3fe000>;
};
partition@7fe000 {
label = "environment";
reg = <0x7fe000 0x2000>;
read-only;
};
};
led0: led-display@4,0 {
compatible = "avago,hdsp-253x";
reg = <4 0x20 0x20>, <4 0 0x20>;
};
compact-flash@5,0 {
compatible = "cavium,ebt3000-compact-flash";
reg = <5 0 0x10000>, <6 0 0x10000>;
cavium,bus-width = <16>;
cavium,true-ide;
cavium,dma-engine-handle = <&dma0>;
};
};
dma0: dma-engine@1180000000100 {
compatible = "cavium,octeon-5750-bootbus-dma";
reg = <0x11800 0x00000100 0x0 0x8>;
interrupts = <0 63>;
};
dma1: dma-engine@1180000000108 {
compatible = "cavium,octeon-5750-bootbus-dma";
reg = <0x11800 0x00000108 0x0 0x8>;
interrupts = <0 63>;
};
uctl: uctl@118006f000000 {
compatible = "cavium,octeon-6335-uctl";
reg = <0x11800 0x6f000000 0x0 0x100>;
ranges; /* Direct mapping */
#address-cells = <2>;
#size-cells = <2>;
/* 12MHz, 24MHz and 48MHz allowed */
refclk-frequency = <12000000>;
/* Either "crystal" or "external" */
refclk-type = "crystal";
ehci@16f0000000000 {
compatible = "cavium,octeon-6335-ehci","usb-ehci";
reg = <0x16f00 0x00000000 0x0 0x100>;
interrupts = <3 44>;
big-endian-regs;
};
ohci@16f0000000400 {
compatible = "cavium,octeon-6335-ohci","usb-ohci";
reg = <0x16f00 0x00000400 0x0 0x100>;
interrupts = <3 44>;
big-endian-regs;
};
};
};
aliases {
mix0 = &mix0;
pip = &pip;
smi0 = &smi0;
smi1 = &smi1;
smi2 = &smi2;
smi3 = &smi3;
twsi0 = &twsi0;
twsi1 = &twsi1;
uart0 = &uart0;
uart1 = &uart1;
uctl = &uctl;
led0 = &led0;
flash0 = &flash0;
};
};

58
arch/mips/boot/dts/rt2880.dtsi Normal file
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/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,rt2880-soc";
cpus {
cpu@0 {
compatible = "mips,mips4KEc";
};
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus@300000 {
compatible = "palmbus";
reg = <0x300000 0x200000>;
ranges = <0x0 0x300000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc@0 {
compatible = "ralink,rt2880-sysc";
reg = <0x0 0x100>;
};
intc: intc@200 {
compatible = "ralink,rt2880-intc";
reg = <0x200 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
memc@300 {
compatible = "ralink,rt2880-memc";
reg = <0x300 0x100>;
};
uartlite@c00 {
compatible = "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
interrupt-parent = <&intc>;
interrupts = <8>;
reg-shift = <2>;
};
};
};

47
arch/mips/boot/dts/rt2880_eval.dts Normal file
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/dts-v1/;
/include/ "rt2880.dtsi"
/ {
compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
model = "Ralink RT2880 evaluation board";
memory@0 {
device_type = "memory";
reg = <0x8000000 0x2000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x400000>;
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "uboot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "uboot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "calibration";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "linux";
reg = <0x50000 0x3b0000>;
};
};
};

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arch/mips/boot/dts/rt3050.dtsi Normal file
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/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
cpus {
cpu@0 {
compatible = "mips,mips24KEc";
};
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc@0 {
compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc";
reg = <0x0 0x100>;
};
intc: intc@200 {
compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
memc@300 {
compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
};
uartlite@c00 {
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
interrupt-parent = <&intc>;
interrupts = <12>;
reg-shift = <2>;
};
};
usb@101c0000 {
compatible = "ralink,rt3050-usb", "snps,dwc2";
reg = <0x101c0000 40000>;
interrupt-parent = <&intc>;
interrupts = <18>;
status = "disabled";
};
};

51
arch/mips/boot/dts/rt3052_eval.dts Normal file
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/dts-v1/;
#include "rt3050.dtsi"
/ {
compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
model = "Ralink RT3052 evaluation board";
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "uboot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "uboot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "calibration";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "linux";
reg = <0x50000 0x7b0000>;
};
};
usb@101c0000 {
status = "ok";
};
};

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arch/mips/boot/dts/rt3883.dtsi Normal file
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/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,rt3883-soc";
cpus {
cpu@0 {
compatible = "mips,mips74Kc";
};
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc@0 {
compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
reg = <0x0 0x100>;
};
intc: intc@200 {
compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
memc@300 {
compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
};
uartlite@c00 {
compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
interrupt-parent = <&intc>;
interrupts = <12>;
reg-shift = <2>;
};
};
};

17
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/dts-v1/;
/include/ "rt3883.dtsi"
/ {
compatible = "ralink,rt3883-eval-board", "ralink,rt3883-soc";
model = "Ralink RT3883 evaluation board";
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
};

22
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/dts-v1/;
/memreserve/ 0x00000000 0x00001000; // reserved
/memreserve/ 0x00001000 0x000ef000; // ROM data
/memreserve/ 0x000f0000 0x004cc000; // reserved
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mti,sead-3";
cpus {
cpu@0 {
compatible = "mti,mips14KEc", "mti,mips14Kc";
};
};
memory {
device_type = "memory";
reg = <0x0 0x08000000>;
};
};

118
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/*
* XLP8XX Device Tree Source for EVP boards
*/
/dts-v1/;
/ {
model = "netlogic,XLP-EVP";
compatible = "netlogic,xlp";
#address-cells = <2>;
#size-cells = <2>;
soc {
#address-cells = <2>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
1 0 0 0x16000000 0x02000000>; // GBU chipselects
serial0: serial@30000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x30100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <17>;
};
serial1: serial@31000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x31100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <18>;
};
i2c0: ocores@32000 {
compatible = "opencores,i2c-ocores";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x32100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <32000000>;
interrupt-parent = <&pic>;
interrupts = <30>;
};
i2c1: ocores@33000 {
compatible = "opencores,i2c-ocores";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x33100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <32000000>;
interrupt-parent = <&pic>;
interrupts = <31>;
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
dtt@4c {
compatible = "national,lm90";
reg = <0x4c>;
};
};
pic: pic@4000 {
compatible = "netlogic,xlp-pic";
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0 0x4000 0x200>;
interrupt-controller;
};
nor_flash@1,0 {
compatible = "cfi-flash";
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
reg = <1 0 0x1000000>;
partition@0 {
label = "x-loader";
reg = <0x0 0x100000>; /* 1M */
read-only;
};
partition@100000 {
label = "u-boot";
reg = <0x100000 0x100000>; /* 1M */
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x500000>; /* 5M */
};
partition@700000 {
label = "rootfs";
reg = <0x700000 0x800000>; /* 8M */
};
partition@f00000 {
label = "env";
reg = <0xf00000 0x100000>; /* 1M */
read-only;
};
};
};
chosen {
bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
};
};

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/*
* XLP2XX Device Tree Source for FVP boards
*/
/dts-v1/;
/ {
model = "netlogic,XLP-FVP";
compatible = "netlogic,xlp";
#address-cells = <2>;
#size-cells = <2>;
soc {
#address-cells = <2>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
1 0 0 0x16000000 0x02000000>; // GBU chipselects
serial0: serial@30000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x30100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <17>;
};
serial1: serial@31000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x31100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <18>;
};
i2c0: ocores@37100 {
compatible = "opencores,i2c-ocores";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x37100 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <32000000>;
interrupt-parent = <&pic>;
interrupts = <30>;
};
i2c1: ocores@37120 {
compatible = "opencores,i2c-ocores";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x37120 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <32000000>;
interrupt-parent = <&pic>;
interrupts = <31>;
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
dtt@4c {
compatible = "national,lm90";
reg = <0x4c>;
};
};
pic: pic@4000 {
compatible = "netlogic,xlp-pic";
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0 0x4000 0x200>;
interrupt-controller;
};
nor_flash@1,0 {
compatible = "cfi-flash";
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
reg = <1 0 0x1000000>;
partition@0 {
label = "x-loader";
reg = <0x0 0x100000>; /* 1M */
read-only;
};
partition@100000 {
label = "u-boot";
reg = <0x100000 0x100000>; /* 1M */
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x500000>; /* 5M */
};
partition@700000 {
label = "rootfs";
reg = <0x700000 0x800000>; /* 8M */
};
partition@f00000 {
label = "env";
reg = <0xf00000 0x100000>; /* 1M */
read-only;
};
};
};
chosen {
bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
};
};

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/*
* XLP9XX Device Tree Source for GVP boards
*/
/dts-v1/;
/ {
model = "netlogic,XLP-GVP";
compatible = "netlogic,xlp";
#address-cells = <2>;
#size-cells = <2>;
soc {
#address-cells = <2>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
1 0 0 0x16000000 0x02000000>; // GBU chipselects
serial0: serial@30000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x112100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <125000000>;
interrupt-parent = <&pic>;
interrupts = <17>;
};
pic: pic@110000 {
compatible = "netlogic,xlp-pic";
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0 0x110000 0x200>;
interrupt-controller;
};
nor_flash@1,0 {
compatible = "cfi-flash";
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
reg = <1 0 0x1000000>;
partition@0 {
label = "x-loader";
reg = <0x0 0x100000>; /* 1M */
read-only;
};
partition@100000 {
label = "u-boot";
reg = <0x100000 0x100000>; /* 1M */
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x500000>; /* 5M */
};
partition@700000 {
label = "rootfs";
reg = <0x700000 0x800000>; /* 8M */
};
partition@f00000 {
label = "env";
reg = <0xf00000 0x100000>; /* 1M */
read-only;
};
};
};
chosen {
bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
};
};

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/*
* XLP3XX Device Tree Source for SVP boards
*/
/dts-v1/;
/ {
model = "netlogic,XLP-SVP";
compatible = "netlogic,xlp";
#address-cells = <2>;
#size-cells = <2>;
soc {
#address-cells = <2>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
1 0 0 0x16000000 0x02000000>; // GBU chipselects
serial0: serial@30000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x30100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <17>;
};
serial1: serial@31000 {
device_type = "serial";
compatible = "ns16550";
reg = <0 0x31100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <133333333>;
interrupt-parent = <&pic>;
interrupts = <18>;
};
i2c0: ocores@32000 {
compatible = "opencores,i2c-ocores";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x32100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <32000000>;
interrupt-parent = <&pic>;
interrupts = <30>;
};
i2c1: ocores@33000 {
compatible = "opencores,i2c-ocores";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x33100 0xa00>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <32000000>;
interrupt-parent = <&pic>;
interrupts = <31>;
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
dtt@4c {
compatible = "national,lm90";
reg = <0x4c>;
};
};
pic: pic@4000 {
compatible = "netlogic,xlp-pic";
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0 0x4000 0x200>;
interrupt-controller;
};
nor_flash@1,0 {
compatible = "cfi-flash";
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
reg = <1 0 0x1000000>;
partition@0 {
label = "x-loader";
reg = <0x0 0x100000>; /* 1M */
read-only;
};
partition@100000 {
label = "u-boot";
reg = <0x100000 0x100000>; /* 1M */
};
partition@200000 {
label = "kernel";
reg = <0x200000 0x500000>; /* 5M */
};
partition@700000 {
label = "rootfs";
reg = <0x700000 0x800000>; /* 8M */
};
partition@f00000 {
label = "env";
reg = <0xf00000 0x100000>; /* 1M */
read-only;
};
};
};
chosen {
bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
};
};

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/*
* Some ECOFF definitions.
*/
typedef struct filehdr {
unsigned short f_magic; /* magic number */
unsigned short f_nscns; /* number of sections */
long f_timdat; /* time & date stamp */
long f_symptr; /* file pointer to symbolic header */
long f_nsyms; /* sizeof(symbolic hdr) */
unsigned short f_opthdr; /* sizeof(optional hdr) */
unsigned short f_flags; /* flags */
} FILHDR;
#define FILHSZ sizeof(FILHDR)
#define MIPSEBMAGIC 0x160
#define MIPSELMAGIC 0x162
typedef struct scnhdr {
char s_name[8]; /* section name */
long s_paddr; /* physical address, aliased s_nlib */
long s_vaddr; /* virtual address */
long s_size; /* section size */
long s_scnptr; /* file ptr to raw data for section */
long s_relptr; /* file ptr to relocation */
long s_lnnoptr; /* file ptr to gp histogram */
unsigned short s_nreloc; /* number of relocation entries */
unsigned short s_nlnno; /* number of gp histogram entries */
long s_flags; /* flags */
} SCNHDR;
#define SCNHSZ sizeof(SCNHDR)
#define SCNROUND ((long)16)
typedef struct aouthdr {
short magic; /* see above */
short vstamp; /* version stamp */
long tsize; /* text size in bytes, padded to DW bdry*/
long dsize; /* initialized data " " */
long bsize; /* uninitialized data " " */
long entry; /* entry pt. */
long text_start; /* base of text used for this file */
long data_start; /* base of data used for this file */
long bss_start; /* base of bss used for this file */
long gprmask; /* general purpose register mask */
long cprmask[4]; /* co-processor register masks */
long gp_value; /* the gp value used for this object */
} AOUTHDR;
#define AOUTHSZ sizeof(AOUTHDR)
#define OMAGIC 0407
#define NMAGIC 0410
#define ZMAGIC 0413
#define SMAGIC 0411
#define LIBMAGIC 0443
#define N_TXTOFF(f, a) \
((a).magic == ZMAGIC || (a).magic == LIBMAGIC ? 0 : \
((a).vstamp < 23 ? \
((FILHSZ + AOUTHSZ + (f).f_nscns * SCNHSZ + 7) & 0xfffffff8) : \
((FILHSZ + AOUTHSZ + (f).f_nscns * SCNHSZ + SCNROUND-1) & ~(SCNROUND-1)) ) )
#define N_DATOFF(f, a) \
N_TXTOFF(f, a) + (a).tsize;

616
arch/mips/boot/elf2ecoff.c Normal file
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/*
* Copyright (c) 1995
* Ted Lemon (hereinafter referred to as the author)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/* elf2ecoff.c
This program converts an elf executable to an ECOFF executable.
No symbol table is retained. This is useful primarily in building
net-bootable kernels for machines (e.g., DECstation and Alpha) which
only support the ECOFF object file format. */
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <sys/types.h>
#include <fcntl.h>
#include <unistd.h>
#include <elf.h>
#include <limits.h>
#include <netinet/in.h>
#include <stdlib.h>
#include "ecoff.h"
/*
* Some extra ELF definitions
*/
#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
/* -------------------------------------------------------------------- */
struct sect {
unsigned long vaddr;
unsigned long len;
};
int *symTypeTable;
int must_convert_endian;
int format_bigendian;
static void copy(int out, int in, off_t offset, off_t size)
{
char ibuf[4096];
int remaining, cur, count;
/* Go to the start of the ELF symbol table... */
if (lseek(in, offset, SEEK_SET) < 0) {
perror("copy: lseek");
exit(1);
}
remaining = size;
while (remaining) {
cur = remaining;
if (cur > sizeof ibuf)
cur = sizeof ibuf;
remaining -= cur;
if ((count = read(in, ibuf, cur)) != cur) {
fprintf(stderr, "copy: read: %s\n",
count ? strerror(errno) :
"premature end of file");
exit(1);
}
if ((count = write(out, ibuf, cur)) != cur) {
perror("copy: write");
exit(1);
}
}
}
/*
* Combine two segments, which must be contiguous. If pad is true, it's
* okay for there to be padding between.
*/
static void combine(struct sect *base, struct sect *new, int pad)
{
if (!base->len)
*base = *new;
else if (new->len) {
if (base->vaddr + base->len != new->vaddr) {
if (pad)
base->len = new->vaddr - base->vaddr;
else {
fprintf(stderr,
"Non-contiguous data can't be converted.\n");
exit(1);
}
}
base->len += new->len;
}
}
static int phcmp(const void *v1, const void *v2)
{
const Elf32_Phdr *h1 = v1;
const Elf32_Phdr *h2 = v2;
if (h1->p_vaddr > h2->p_vaddr)
return 1;
else if (h1->p_vaddr < h2->p_vaddr)
return -1;
else
return 0;
}
static char *saveRead(int file, off_t offset, off_t len, char *name)
{
char *tmp;
int count;
off_t off;
if ((off = lseek(file, offset, SEEK_SET)) < 0) {
fprintf(stderr, "%s: fseek: %s\n", name, strerror(errno));
exit(1);
}
if (!(tmp = (char *) malloc(len))) {
fprintf(stderr, "%s: Can't allocate %ld bytes.\n", name,
len);
exit(1);
}
count = read(file, tmp, len);
if (count != len) {
fprintf(stderr, "%s: read: %s.\n",
name,
count ? strerror(errno) : "End of file reached");
exit(1);
}
return tmp;
}
#define swab16(x) \
((unsigned short)( \
(((unsigned short)(x) & (unsigned short)0x00ffU) << 8) | \
(((unsigned short)(x) & (unsigned short)0xff00U) >> 8) ))
#define swab32(x) \
((unsigned int)( \
(((unsigned int)(x) & (unsigned int)0x000000ffUL) << 24) | \
(((unsigned int)(x) & (unsigned int)0x0000ff00UL) << 8) | \
(((unsigned int)(x) & (unsigned int)0x00ff0000UL) >> 8) | \
(((unsigned int)(x) & (unsigned int)0xff000000UL) >> 24) ))
static void convert_elf_hdr(Elf32_Ehdr * e)
{
e->e_type = swab16(e->e_type);
e->e_machine = swab16(e->e_machine);
e->e_version = swab32(e->e_version);
e->e_entry = swab32(e->e_entry);
e->e_phoff = swab32(e->e_phoff);
e->e_shoff = swab32(e->e_shoff);
e->e_flags = swab32(e->e_flags);
e->e_ehsize = swab16(e->e_ehsize);
e->e_phentsize = swab16(e->e_phentsize);
e->e_phnum = swab16(e->e_phnum);
e->e_shentsize = swab16(e->e_shentsize);
e->e_shnum = swab16(e->e_shnum);
e->e_shstrndx = swab16(e->e_shstrndx);
}
static void convert_elf_phdrs(Elf32_Phdr * p, int num)
{
int i;
for (i = 0; i < num; i++, p++) {
p->p_type = swab32(p->p_type);
p->p_offset = swab32(p->p_offset);
p->p_vaddr = swab32(p->p_vaddr);
p->p_paddr = swab32(p->p_paddr);
p->p_filesz = swab32(p->p_filesz);
p->p_memsz = swab32(p->p_memsz);
p->p_flags = swab32(p->p_flags);
p->p_align = swab32(p->p_align);
}
}
static void convert_elf_shdrs(Elf32_Shdr * s, int num)
{
int i;
for (i = 0; i < num; i++, s++) {
s->sh_name = swab32(s->sh_name);
s->sh_type = swab32(s->sh_type);
s->sh_flags = swab32(s->sh_flags);
s->sh_addr = swab32(s->sh_addr);
s->sh_offset = swab32(s->sh_offset);
s->sh_size = swab32(s->sh_size);
s->sh_link = swab32(s->sh_link);
s->sh_info = swab32(s->sh_info);
s->sh_addralign = swab32(s->sh_addralign);
s->sh_entsize = swab32(s->sh_entsize);
}
}
static void convert_ecoff_filehdr(struct filehdr *f)
{
f->f_magic = swab16(f->f_magic);
f->f_nscns = swab16(f->f_nscns);
f->f_timdat = swab32(f->f_timdat);
f->f_symptr = swab32(f->f_symptr);
f->f_nsyms = swab32(f->f_nsyms);
f->f_opthdr = swab16(f->f_opthdr);
f->f_flags = swab16(f->f_flags);
}
static void convert_ecoff_aouthdr(struct aouthdr *a)
{
a->magic = swab16(a->magic);
a->vstamp = swab16(a->vstamp);
a->tsize = swab32(a->tsize);
a->dsize = swab32(a->dsize);
a->bsize = swab32(a->bsize);
a->entry = swab32(a->entry);
a->text_start = swab32(a->text_start);
a->data_start = swab32(a->data_start);
a->bss_start = swab32(a->bss_start);
a->gprmask = swab32(a->gprmask);
a->cprmask[0] = swab32(a->cprmask[0]);
a->cprmask[1] = swab32(a->cprmask[1]);
a->cprmask[2] = swab32(a->cprmask[2]);
a->cprmask[3] = swab32(a->cprmask[3]);
a->gp_value = swab32(a->gp_value);
}
static void convert_ecoff_esecs(struct scnhdr *s, int num)
{
int i;
for (i = 0; i < num; i++, s++) {
s->s_paddr = swab32(s->s_paddr);
s->s_vaddr = swab32(s->s_vaddr);
s->s_size = swab32(s->s_size);
s->s_scnptr = swab32(s->s_scnptr);
s->s_relptr = swab32(s->s_relptr);
s->s_lnnoptr = swab32(s->s_lnnoptr);
s->s_nreloc = swab16(s->s_nreloc);
s->s_nlnno = swab16(s->s_nlnno);
s->s_flags = swab32(s->s_flags);
}
}
int main(int argc, char *argv[])
{
Elf32_Ehdr ex;
Elf32_Phdr *ph;
Elf32_Shdr *sh;
char *shstrtab;
int i, pad;
struct sect text, data, bss;
struct filehdr efh;
struct aouthdr eah;
struct scnhdr esecs[6];
int infile, outfile;
unsigned long cur_vma = ULONG_MAX;
int addflag = 0;
int nosecs;
text.len = data.len = bss.len = 0;
text.vaddr = data.vaddr = bss.vaddr = 0;
/* Check args... */
if (argc < 3 || argc > 4) {
usage:
fprintf(stderr,
"usage: elf2ecoff <elf executable> <ecoff executable> [-a]\n");
exit(1);
}
if (argc == 4) {
if (strcmp(argv[3], "-a"))
goto usage;
addflag = 1;
}
/* Try the input file... */
if ((infile = open(argv[1], O_RDONLY)) < 0) {
fprintf(stderr, "Can't open %s for read: %s\n",
argv[1], strerror(errno));
exit(1);
}
/* Read the header, which is at the beginning of the file... */
i = read(infile, &ex, sizeof ex);
if (i != sizeof ex) {
fprintf(stderr, "ex: %s: %s.\n",
argv[1],
i ? strerror(errno) : "End of file reached");
exit(1);
}
if (ex.e_ident[EI_DATA] == ELFDATA2MSB)
format_bigendian = 1;
if (ntohs(0xaa55) == 0xaa55) {
if (!format_bigendian)
must_convert_endian = 1;
} else {
if (format_bigendian)
must_convert_endian = 1;
}
if (must_convert_endian)
convert_elf_hdr(&ex);
/* Read the program headers... */
ph = (Elf32_Phdr *) saveRead(infile, ex.e_phoff,
ex.e_phnum * sizeof(Elf32_Phdr),
"ph");
if (must_convert_endian)
convert_elf_phdrs(ph, ex.e_phnum);
/* Read the section headers... */
sh = (Elf32_Shdr *) saveRead(infile, ex.e_shoff,
ex.e_shnum * sizeof(Elf32_Shdr),
"sh");
if (must_convert_endian)
convert_elf_shdrs(sh, ex.e_shnum);
/* Read in the section string table. */
shstrtab = saveRead(infile, sh[ex.e_shstrndx].sh_offset,
sh[ex.e_shstrndx].sh_size, "shstrtab");
/* Figure out if we can cram the program header into an ECOFF
header... Basically, we can't handle anything but loadable
segments, but we can ignore some kinds of segments. We can't
handle holes in the address space. Segments may be out of order,
so we sort them first. */
qsort(ph, ex.e_phnum, sizeof(Elf32_Phdr), phcmp);
for (i = 0; i < ex.e_phnum; i++) {
/* Section types we can ignore... */
if (ph[i].p_type == PT_NULL || ph[i].p_type == PT_NOTE ||
ph[i].p_type == PT_PHDR
|| ph[i].p_type == PT_MIPS_REGINFO)
continue;
/* Section types we can't handle... */
else if (ph[i].p_type != PT_LOAD) {
fprintf(stderr,
"Program header %d type %d can't be converted.\n",
ex.e_phnum, ph[i].p_type);
exit(1);
}
/* Writable (data) segment? */
if (ph[i].p_flags & PF_W) {
struct sect ndata, nbss;
ndata.vaddr = ph[i].p_vaddr;
ndata.len = ph[i].p_filesz;
nbss.vaddr = ph[i].p_vaddr + ph[i].p_filesz;
nbss.len = ph[i].p_memsz - ph[i].p_filesz;
combine(&data, &ndata, 0);
combine(&bss, &nbss, 1);
} else {
struct sect ntxt;
ntxt.vaddr = ph[i].p_vaddr;
ntxt.len = ph[i].p_filesz;
combine(&text, &ntxt, 0);
}
/* Remember the lowest segment start address. */
if (ph[i].p_vaddr < cur_vma)
cur_vma = ph[i].p_vaddr;
}
/* Sections must be in order to be converted... */
if (text.vaddr > data.vaddr || data.vaddr > bss.vaddr ||
text.vaddr + text.len > data.vaddr
|| data.vaddr + data.len > bss.vaddr) {
fprintf(stderr,
"Sections ordering prevents a.out conversion.\n");
exit(1);
}
/* If there's a data section but no text section, then the loader
combined everything into one section. That needs to be the
text section, so just make the data section zero length following
text. */
if (data.len && !text.len) {
text = data;
data.vaddr = text.vaddr + text.len;
data.len = 0;
}
/* If there is a gap between text and data, we'll fill it when we copy
the data, so update the length of the text segment as represented in
a.out to reflect that, since a.out doesn't allow gaps in the program
address space. */
if (text.vaddr + text.len < data.vaddr)
text.len = data.vaddr - text.vaddr;
/* We now have enough information to cons up an a.out header... */
eah.magic = OMAGIC;
eah.vstamp = 200;
eah.tsize = text.len;
eah.dsize = data.len;
eah.bsize = bss.len;
eah.entry = ex.e_entry;
eah.text_start = text.vaddr;
eah.data_start = data.vaddr;
eah.bss_start = bss.vaddr;
eah.gprmask = 0xf3fffffe;
memset(&eah.cprmask, '\0', sizeof eah.cprmask);
eah.gp_value = 0; /* unused. */
if (format_bigendian)
efh.f_magic = MIPSEBMAGIC;
else
efh.f_magic = MIPSELMAGIC;
if (addflag)
nosecs = 6;
else
nosecs = 3;
efh.f_nscns = nosecs;
efh.f_timdat = 0; /* bogus */
efh.f_symptr = 0;
efh.f_nsyms = 0;
efh.f_opthdr = sizeof eah;
efh.f_flags = 0x100f; /* Stripped, not sharable. */
memset(esecs, 0, sizeof esecs);
strcpy(esecs[0].s_name, ".text");
strcpy(esecs[1].s_name, ".data");
strcpy(esecs[2].s_name, ".bss");
if (addflag) {
strcpy(esecs[3].s_name, ".rdata");
strcpy(esecs[4].s_name, ".sdata");
strcpy(esecs[5].s_name, ".sbss");
}
esecs[0].s_paddr = esecs[0].s_vaddr = eah.text_start;
esecs[1].s_paddr = esecs[1].s_vaddr = eah.data_start;
esecs[2].s_paddr = esecs[2].s_vaddr = eah.bss_start;
if (addflag) {
esecs[3].s_paddr = esecs[3].s_vaddr = 0;
esecs[4].s_paddr = esecs[4].s_vaddr = 0;
esecs[5].s_paddr = esecs[5].s_vaddr = 0;
}
esecs[0].s_size = eah.tsize;
esecs[1].s_size = eah.dsize;
esecs[2].s_size = eah.bsize;
if (addflag) {
esecs[3].s_size = 0;
esecs[4].s_size = 0;
esecs[5].s_size = 0;
}
esecs[0].s_scnptr = N_TXTOFF(efh, eah);
esecs[1].s_scnptr = N_DATOFF(efh, eah);
#define ECOFF_SEGMENT_ALIGNMENT(a) 0x10
#define ECOFF_ROUND(s, a) (((s)+(a)-1)&~((a)-1))
esecs[2].s_scnptr = esecs[1].s_scnptr +
ECOFF_ROUND(esecs[1].s_size, ECOFF_SEGMENT_ALIGNMENT(&eah));
if (addflag) {
esecs[3].s_scnptr = 0;
esecs[4].s_scnptr = 0;
esecs[5].s_scnptr = 0;
}
esecs[0].s_relptr = esecs[1].s_relptr = esecs[2].s_relptr = 0;
esecs[0].s_lnnoptr = esecs[1].s_lnnoptr = esecs[2].s_lnnoptr = 0;
esecs[0].s_nreloc = esecs[1].s_nreloc = esecs[2].s_nreloc = 0;
esecs[0].s_nlnno = esecs[1].s_nlnno = esecs[2].s_nlnno = 0;
if (addflag) {
esecs[3].s_relptr = esecs[4].s_relptr
= esecs[5].s_relptr = 0;
esecs[3].s_lnnoptr = esecs[4].s_lnnoptr
= esecs[5].s_lnnoptr = 0;
esecs[3].s_nreloc = esecs[4].s_nreloc = esecs[5].s_nreloc =
0;
esecs[3].s_nlnno = esecs[4].s_nlnno = esecs[5].s_nlnno = 0;
}
esecs[0].s_flags = 0x20;
esecs[1].s_flags = 0x40;
esecs[2].s_flags = 0x82;
if (addflag) {
esecs[3].s_flags = 0x100;
esecs[4].s_flags = 0x200;
esecs[5].s_flags = 0x400;
}
/* Make the output file... */
if ((outfile = open(argv[2], O_WRONLY | O_CREAT, 0777)) < 0) {
fprintf(stderr, "Unable to create %s: %s\n", argv[2],
strerror(errno));
exit(1);
}
if (must_convert_endian)
convert_ecoff_filehdr(&efh);
/* Write the headers... */
i = write(outfile, &efh, sizeof efh);
if (i != sizeof efh) {
perror("efh: write");
exit(1);
for (i = 0; i < nosecs; i++) {
printf
("Section %d: %s phys %lx size %lx file offset %lx\n",
i, esecs[i].s_name, esecs[i].s_paddr,
esecs[i].s_size, esecs[i].s_scnptr);
}
}
fprintf(stderr, "wrote %d byte file header.\n", i);
if (must_convert_endian)
convert_ecoff_aouthdr(&eah);
i = write(outfile, &eah, sizeof eah);
if (i != sizeof eah) {
perror("eah: write");
exit(1);
}
fprintf(stderr, "wrote %d byte a.out header.\n", i);
if (must_convert_endian)
convert_ecoff_esecs(&esecs[0], nosecs);
i = write(outfile, &esecs, nosecs * sizeof(struct scnhdr));
if (i != nosecs * sizeof(struct scnhdr)) {
perror("esecs: write");
exit(1);
}
fprintf(stderr, "wrote %d bytes of section headers.\n", i);
pad = (sizeof(efh) + sizeof(eah) + nosecs * sizeof(struct scnhdr)) & 15;
if (pad) {
pad = 16 - pad;
i = write(outfile, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0", pad);
if (i < 0) {
perror("ipad: write");
exit(1);
}
fprintf(stderr, "wrote %d byte pad.\n", i);
}
/*
* Copy the loadable sections. Zero-fill any gaps less than 64k;
* complain about any zero-filling, and die if we're asked to zero-fill
* more than 64k.
*/
for (i = 0; i < ex.e_phnum; i++) {
/* Unprocessable sections were handled above, so just verify that
the section can be loaded before copying. */
if (ph[i].p_type == PT_LOAD && ph[i].p_filesz) {
if (cur_vma != ph[i].p_vaddr) {
unsigned long gap =
ph[i].p_vaddr - cur_vma;
char obuf[1024];
if (gap > 65536) {
fprintf(stderr,
"Intersegment gap (%ld bytes) too large.\n",
gap);
exit(1);
}
fprintf(stderr,
"Warning: %ld byte intersegment gap.\n",
gap);
memset(obuf, 0, sizeof obuf);
while (gap) {
int count =
write(outfile, obuf,
(gap >
sizeof obuf ? sizeof
obuf : gap));
if (count < 0) {
fprintf(stderr,
"Error writing gap: %s\n",
strerror(errno));
exit(1);
}
gap -= count;
}
}
fprintf(stderr, "writing %d bytes...\n",
ph[i].p_filesz);
copy(outfile, infile, ph[i].p_offset,
ph[i].p_filesz);
cur_vma = ph[i].p_vaddr + ph[i].p_filesz;
}
}
/*
* Write a page of padding for boot PROMS that read entire pages.
* Without this, they may attempt to read past the end of the
* data section, incur an error, and refuse to boot.
*/
{
char obuf[4096];
memset(obuf, 0, sizeof obuf);
if (write(outfile, obuf, sizeof(obuf)) != sizeof(obuf)) {
fprintf(stderr, "Error writing PROM padding: %s\n",
strerror(errno));
exit(1);
}
}
/* Looks like we won... */
exit(0);
}