mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-10 01:12:45 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
10
arch/mips/emma/markeins/Makefile
Normal file
10
arch/mips/emma/markeins/Makefile
Normal file
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@ -0,0 +1,10 @@
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|||
#
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# Copyright (C) NEC Electronics Corporation 2005-2006
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||||
#
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||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
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||||
#
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||||
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obj-$(CONFIG_NEC_MARKEINS) += irq.o setup.o led.o platform.o
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307
arch/mips/emma/markeins/irq.c
Normal file
307
arch/mips/emma/markeins/irq.c
Normal file
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@ -0,0 +1,307 @@
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|||
/*
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* Copyright (C) NEC Electronics Corporation 2004-2006
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*
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||||
* This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
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*
|
||||
* Copyright 2001 MontaVista Software Inc.
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||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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||||
*/
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||||
#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/delay.h>
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#include <asm/irq_cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/bootinfo.h>
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#include <asm/emma/emma2rh.h>
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static void emma2rh_irq_enable(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_IRQ_BASE;
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u32 reg_value, reg_bitmask, reg_index;
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reg_index = EMMA2RH_BHIF_INT_EN_0 +
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(EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
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reg_value = emma2rh_in32(reg_index);
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reg_bitmask = 0x1 << (irq % 32);
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emma2rh_out32(reg_index, reg_value | reg_bitmask);
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}
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static void emma2rh_irq_disable(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_IRQ_BASE;
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u32 reg_value, reg_bitmask, reg_index;
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reg_index = EMMA2RH_BHIF_INT_EN_0 +
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(EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
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reg_value = emma2rh_in32(reg_index);
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reg_bitmask = 0x1 << (irq % 32);
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emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
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}
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struct irq_chip emma2rh_irq_controller = {
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.name = "emma2rh_irq",
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.irq_mask = emma2rh_irq_disable,
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.irq_unmask = emma2rh_irq_enable,
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};
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void emma2rh_irq_init(void)
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{
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u32 i;
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for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
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irq_set_chip_and_handler_name(EMMA2RH_IRQ_BASE + i,
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&emma2rh_irq_controller,
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handle_level_irq, "level");
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}
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static void emma2rh_sw_irq_enable(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_SW_IRQ_BASE;
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u32 reg;
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reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
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reg |= 1 << irq;
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emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
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}
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static void emma2rh_sw_irq_disable(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_SW_IRQ_BASE;
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u32 reg;
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reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
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reg &= ~(1 << irq);
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emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
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}
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struct irq_chip emma2rh_sw_irq_controller = {
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.name = "emma2rh_sw_irq",
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.irq_mask = emma2rh_sw_irq_disable,
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.irq_unmask = emma2rh_sw_irq_enable,
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};
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void emma2rh_sw_irq_init(void)
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{
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u32 i;
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for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
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irq_set_chip_and_handler_name(EMMA2RH_SW_IRQ_BASE + i,
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&emma2rh_sw_irq_controller,
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handle_level_irq, "level");
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}
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static void emma2rh_gpio_irq_enable(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
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u32 reg;
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reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
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reg |= 1 << irq;
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emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
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}
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static void emma2rh_gpio_irq_disable(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
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u32 reg;
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reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
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reg &= ~(1 << irq);
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emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
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}
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static void emma2rh_gpio_irq_ack(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
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emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
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}
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static void emma2rh_gpio_irq_mask_ack(struct irq_data *d)
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{
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unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE;
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u32 reg;
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emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
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reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
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reg &= ~(1 << irq);
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emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
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}
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struct irq_chip emma2rh_gpio_irq_controller = {
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.name = "emma2rh_gpio_irq",
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.irq_ack = emma2rh_gpio_irq_ack,
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.irq_mask = emma2rh_gpio_irq_disable,
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.irq_mask_ack = emma2rh_gpio_irq_mask_ack,
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.irq_unmask = emma2rh_gpio_irq_enable,
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};
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void emma2rh_gpio_irq_init(void)
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{
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u32 i;
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for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
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irq_set_chip_and_handler_name(EMMA2RH_GPIO_IRQ_BASE + i,
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&emma2rh_gpio_irq_controller,
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handle_edge_irq, "edge");
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}
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static struct irqaction irq_cascade = {
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.handler = no_action,
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.flags = IRQF_NO_THREAD,
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.name = "cascade",
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.dev_id = NULL,
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.next = NULL,
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};
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/*
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* the first level int-handler will jump here if it is a emma2rh irq
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*/
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void emma2rh_irq_dispatch(void)
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{
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u32 intStatus;
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u32 bitmask;
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u32 i;
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intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) &
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emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
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#ifdef EMMA2RH_SW_CASCADE
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if (intStatus & (1UL << EMMA2RH_SW_CASCADE)) {
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u32 swIntStatus;
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swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
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& emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
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for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
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if (swIntStatus & bitmask) {
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do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
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return;
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}
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}
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}
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/* Skip S/W interrupt */
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intStatus &= ~(1UL << EMMA2RH_SW_CASCADE);
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#endif
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for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
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if (intStatus & bitmask) {
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do_IRQ(EMMA2RH_IRQ_BASE + i);
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return;
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}
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}
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intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) &
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emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
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#ifdef EMMA2RH_GPIO_CASCADE
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if (intStatus & (1UL << (EMMA2RH_GPIO_CASCADE % 32))) {
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u32 gpioIntStatus;
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gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
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& emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
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for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
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if (gpioIntStatus & bitmask) {
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do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
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return;
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}
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}
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}
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/* Skip GPIO interrupt */
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intStatus &= ~(1UL << (EMMA2RH_GPIO_CASCADE % 32));
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#endif
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for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
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if (intStatus & bitmask) {
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do_IRQ(EMMA2RH_IRQ_BASE + i);
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return;
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}
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}
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intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) &
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emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
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for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
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if (intStatus & bitmask) {
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do_IRQ(EMMA2RH_IRQ_BASE + i);
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return;
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}
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}
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}
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void __init arch_init_irq(void)
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{
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u32 reg;
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/* by default, interrupts are disabled. */
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emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
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emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
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emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
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emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
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emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
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emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
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emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
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clear_c0_status(0xff00);
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set_c0_status(0x0400);
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|
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#define GPIO_PCI (0xf<<15)
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/* setup GPIO interrupt for PCI interface */
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/* direction input */
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reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
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emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
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/* disable interrupt */
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reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
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emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
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/* level triggerd */
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reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
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emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
|
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reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
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emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
|
||||
/* interrupt clear */
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||||
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
|
||||
|
||||
/* init all controllers */
|
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emma2rh_irq_init();
|
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emma2rh_sw_irq_init();
|
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emma2rh_gpio_irq_init();
|
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mips_cpu_irq_init();
|
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|
||||
/* setup cascade interrupts */
|
||||
setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
|
||||
setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + 2, &irq_cascade);
|
||||
}
|
||||
|
||||
asmlinkage void plat_irq_dispatch(void)
|
||||
{
|
||||
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
|
||||
|
||||
if (pending & STATUSF_IP7)
|
||||
do_IRQ(MIPS_CPU_IRQ_BASE + 7);
|
||||
else if (pending & STATUSF_IP2)
|
||||
emma2rh_irq_dispatch();
|
||||
else if (pending & STATUSF_IP1)
|
||||
do_IRQ(MIPS_CPU_IRQ_BASE + 1);
|
||||
else if (pending & STATUSF_IP0)
|
||||
do_IRQ(MIPS_CPU_IRQ_BASE + 0);
|
||||
else
|
||||
spurious_interrupt();
|
||||
}
|
||||
57
arch/mips/emma/markeins/led.c
Normal file
57
arch/mips/emma/markeins/led.c
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Copyright (C) NEC Electronics Corporation 2004-2006
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/string.h>
|
||||
#include <asm/emma/emma2rh.h>
|
||||
|
||||
const unsigned long clear = 0x20202020;
|
||||
|
||||
#define LED_BASE 0xb1400038
|
||||
|
||||
void markeins_led_clear(void)
|
||||
{
|
||||
emma2rh_out32(LED_BASE, clear);
|
||||
emma2rh_out32(LED_BASE + 4, clear);
|
||||
}
|
||||
|
||||
void markeins_led(const char *str)
|
||||
{
|
||||
int i;
|
||||
int len = strlen(str);
|
||||
|
||||
markeins_led_clear();
|
||||
if (len > 8)
|
||||
len = 8;
|
||||
|
||||
if (emma2rh_in32(0xb0000800) & (0x1 << 18))
|
||||
for (i = 0; i < len; i++)
|
||||
emma2rh_out8(LED_BASE + i, str[i]);
|
||||
else
|
||||
for (i = 0; i < len; i++)
|
||||
emma2rh_out8(LED_BASE + (i & 4) + (3 - (i & 3)),
|
||||
str[i]);
|
||||
}
|
||||
|
||||
void markeins_led_hex(u32 val)
|
||||
{
|
||||
char str[10];
|
||||
|
||||
sprintf(str, "%08x", val);
|
||||
markeins_led(str);
|
||||
}
|
||||
212
arch/mips/emma/markeins/platform.c
Normal file
212
arch/mips/emma/markeins/platform.c
Normal file
|
|
@ -0,0 +1,212 @@
|
|||
/*
|
||||
* Copyright(C) MontaVista Software Inc, 2006
|
||||
*
|
||||
* Author: dmitry pervushin <dpervushin@ru.mvista.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <asm/cpu.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/bcache.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/traps.h>
|
||||
|
||||
#include <asm/emma/emma2rh.h>
|
||||
|
||||
|
||||
#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
|
||||
|
||||
static struct resource i2c_emma_resources_0[] = {
|
||||
{
|
||||
.name = NULL,
|
||||
.start = EMMA2RH_IRQ_PIIC0,
|
||||
.end = EMMA2RH_IRQ_PIIC0,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}, {
|
||||
.name = NULL,
|
||||
.start = EMMA2RH_PIIC0_BASE,
|
||||
.end = EMMA2RH_PIIC0_BASE + 0x1000,
|
||||
.flags = 0
|
||||
},
|
||||
};
|
||||
|
||||
struct resource i2c_emma_resources_1[] = {
|
||||
{
|
||||
.name = NULL,
|
||||
.start = EMMA2RH_IRQ_PIIC1,
|
||||
.end = EMMA2RH_IRQ_PIIC1,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}, {
|
||||
.name = NULL,
|
||||
.start = EMMA2RH_PIIC1_BASE,
|
||||
.end = EMMA2RH_PIIC1_BASE + 0x1000,
|
||||
.flags = 0
|
||||
},
|
||||
};
|
||||
|
||||
struct resource i2c_emma_resources_2[] = {
|
||||
{
|
||||
.name = NULL,
|
||||
.start = EMMA2RH_IRQ_PIIC2,
|
||||
.end = EMMA2RH_IRQ_PIIC2,
|
||||
.flags = IORESOURCE_IRQ
|
||||
}, {
|
||||
.name = NULL,
|
||||
.start = EMMA2RH_PIIC2_BASE,
|
||||
.end = EMMA2RH_PIIC2_BASE + 0x1000,
|
||||
.flags = 0
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device i2c_emma_devices[] = {
|
||||
[0] = {
|
||||
.name = I2C_EMMA2RH,
|
||||
.id = 0,
|
||||
.resource = i2c_emma_resources_0,
|
||||
.num_resources = ARRAY_SIZE(i2c_emma_resources_0),
|
||||
},
|
||||
[1] = {
|
||||
.name = I2C_EMMA2RH,
|
||||
.id = 1,
|
||||
.resource = i2c_emma_resources_1,
|
||||
.num_resources = ARRAY_SIZE(i2c_emma_resources_1),
|
||||
},
|
||||
[2] = {
|
||||
.name = I2C_EMMA2RH,
|
||||
.id = 2,
|
||||
.resource = i2c_emma_resources_2,
|
||||
.num_resources = ARRAY_SIZE(i2c_emma_resources_2),
|
||||
},
|
||||
};
|
||||
|
||||
#define EMMA2RH_SERIAL_CLOCK 18544000
|
||||
#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
|
||||
|
||||
static struct plat_serial8250_port platform_serial_ports[] = {
|
||||
[0] = {
|
||||
.membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
|
||||
.mapbase = EMMA2RH_PFUR0_BASE + 3,
|
||||
.irq = EMMA2RH_IRQ_PFUR0,
|
||||
.uartclk = EMMA2RH_SERIAL_CLOCK,
|
||||
.regshift = 4,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = EMMA2RH_SERIAL_FLAGS,
|
||||
}, [1] = {
|
||||
.membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
|
||||
.mapbase = EMMA2RH_PFUR1_BASE + 3,
|
||||
.irq = EMMA2RH_IRQ_PFUR1,
|
||||
.uartclk = EMMA2RH_SERIAL_CLOCK,
|
||||
.regshift = 4,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = EMMA2RH_SERIAL_FLAGS,
|
||||
}, [2] = {
|
||||
.membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
|
||||
.mapbase = EMMA2RH_PFUR2_BASE + 3,
|
||||
.irq = EMMA2RH_IRQ_PFUR2,
|
||||
.uartclk = EMMA2RH_SERIAL_CLOCK,
|
||||
.regshift = 4,
|
||||
.iotype = UPIO_MEM,
|
||||
.flags = EMMA2RH_SERIAL_FLAGS,
|
||||
}, [3] = {
|
||||
.flags = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device serial_emma = {
|
||||
.name = "serial8250",
|
||||
.dev = {
|
||||
.platform_data = &platform_serial_ports,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition markeins_parts[] = {
|
||||
[0] = {
|
||||
.name = "RootFS",
|
||||
.offset = 0x00000000,
|
||||
.size = 0x00c00000,
|
||||
},
|
||||
[1] = {
|
||||
.name = "boot code area",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 0x00100000,
|
||||
},
|
||||
[2] = {
|
||||
.name = "kernel image",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 0x00300000,
|
||||
},
|
||||
[3] = {
|
||||
.name = "RootFS2",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 0x00c00000,
|
||||
},
|
||||
[4] = {
|
||||
.name = "boot code area2",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 0x00100000,
|
||||
},
|
||||
[5] = {
|
||||
.name = "kernel image2",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data markeins_flash_data = {
|
||||
.width = 2,
|
||||
.nr_parts = ARRAY_SIZE(markeins_parts),
|
||||
.parts = markeins_parts
|
||||
};
|
||||
|
||||
static struct resource markeins_flash_resource = {
|
||||
.start = 0x1e000000,
|
||||
.end = 0x02000000,
|
||||
.flags = IORESOURCE_MEM
|
||||
};
|
||||
|
||||
static struct platform_device markeins_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &markeins_flash_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &markeins_flash_resource,
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] = {
|
||||
i2c_emma_devices,
|
||||
i2c_emma_devices + 1,
|
||||
i2c_emma_devices + 2,
|
||||
&serial_emma,
|
||||
&markeins_flash_device,
|
||||
};
|
||||
|
||||
static int __init platform_devices_setup(void)
|
||||
{
|
||||
return platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
}
|
||||
|
||||
arch_initcall(platform_devices_setup);
|
||||
128
arch/mips/emma/markeins/setup.c
Normal file
128
arch/mips/emma/markeins/setup.c
Normal file
|
|
@ -0,0 +1,128 @@
|
|||
/*
|
||||
* Copyright (C) NEC Electronics Corporation 2004-2006
|
||||
*
|
||||
* This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c.
|
||||
*
|
||||
* Copyright 2001 MontaVista Software Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/time.h>
|
||||
#include <asm/reboot.h>
|
||||
|
||||
#include <asm/emma/emma2rh.h>
|
||||
|
||||
#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
|
||||
|
||||
extern void markeins_led(const char *);
|
||||
|
||||
static int bus_frequency;
|
||||
|
||||
static void markeins_machine_restart(char *command)
|
||||
{
|
||||
static void (*back_to_prom) (void) = (void (*)(void))0xbfc00000;
|
||||
|
||||
printk("cannot EMMA2RH Mark-eins restart.\n");
|
||||
markeins_led("restart.");
|
||||
back_to_prom();
|
||||
}
|
||||
|
||||
static void markeins_machine_halt(void)
|
||||
{
|
||||
printk("EMMA2RH Mark-eins halted.\n");
|
||||
markeins_led("halted.");
|
||||
while (1) ;
|
||||
}
|
||||
|
||||
static void markeins_machine_power_off(void)
|
||||
{
|
||||
markeins_led("poweroff.");
|
||||
while (1) ;
|
||||
}
|
||||
|
||||
static unsigned long __initdata emma2rh_clock[4] = {
|
||||
166500000, 187312500, 199800000, 210600000
|
||||
};
|
||||
|
||||
static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
/* detect from boot strap */
|
||||
reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
|
||||
reg = (reg >> 4) & 0x3;
|
||||
|
||||
return emma2rh_clock[reg];
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
u32 reg;
|
||||
if (bus_frequency == 0)
|
||||
bus_frequency = detect_bus_frequency(0);
|
||||
|
||||
reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
|
||||
if ((reg & 0x3) == 0)
|
||||
reg = (reg >> 6) & 0x3;
|
||||
else {
|
||||
reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL);
|
||||
reg = (reg >> 4) & 0x3;
|
||||
}
|
||||
mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
|
||||
}
|
||||
|
||||
static void markeins_board_init(void);
|
||||
extern void markeins_irq_setup(void);
|
||||
|
||||
static void inline __init markeins_sio_setup(void)
|
||||
{
|
||||
}
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
/* initialize board - we don't trust the loader */
|
||||
markeins_board_init();
|
||||
|
||||
set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));
|
||||
|
||||
_machine_restart = markeins_machine_restart;
|
||||
_machine_halt = markeins_machine_halt;
|
||||
pm_power_off = markeins_machine_power_off;
|
||||
|
||||
/* setup resource limits */
|
||||
ioport_resource.start = EMMA2RH_PCI_IO_BASE;
|
||||
ioport_resource.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1;
|
||||
iomem_resource.start = EMMA2RH_IO_BASE;
|
||||
iomem_resource.end = EMMA2RH_ROM_BASE - 1;
|
||||
|
||||
markeins_sio_setup();
|
||||
}
|
||||
|
||||
static void __init markeins_board_init(void)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
val = emma2rh_in32(EMMA2RH_PBRD_INT_EN); /* open serial interrupts. */
|
||||
emma2rh_out32(EMMA2RH_PBRD_INT_EN, val | 0xaa);
|
||||
val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL); /* set serial clocks. */
|
||||
emma2rh_out32(EMMA2RH_PBRD_CLKSEL, val | 0x5); /* 18MHz */
|
||||
emma2rh_out32(EMMA2RH_PCI_CONTROL, 0);
|
||||
|
||||
markeins_led("MVL E2RH");
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue