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	Fixed MTP to work with TWRP
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								arch/mips/include/asm/tlb.h
									
										
									
									
									
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								arch/mips/include/asm/tlb.h
									
										
									
									
									
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							|  | @ -0,0 +1,27 @@ | |||
| #ifndef __ASM_TLB_H | ||||
| #define __ASM_TLB_H | ||||
| 
 | ||||
| /*
 | ||||
|  * MIPS doesn't need any special per-pte or per-vma handling, except | ||||
|  * we need to flush cache for area to be unmapped. | ||||
|  */ | ||||
| #define tlb_start_vma(tlb, vma)					\ | ||||
| 	do {							\ | ||||
| 		if (!tlb->fullmm)				\ | ||||
| 			flush_cache_range(vma, vma->vm_start, vma->vm_end); \ | ||||
| 	}  while (0) | ||||
| #define tlb_end_vma(tlb, vma) do { } while (0) | ||||
| #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) | ||||
| 
 | ||||
| /*
 | ||||
|  * .. because we flush the whole mm when it fills up. | ||||
|  */ | ||||
| #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||||
| 
 | ||||
| #define UNIQUE_ENTRYHI(idx)						\ | ||||
| 		((CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) |		\ | ||||
| 		 (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0)) | ||||
| 
 | ||||
| #include <asm-generic/tlb.h> | ||||
| 
 | ||||
| #endif /* __ASM_TLB_H */ | ||||
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