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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 23:58:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
145
arch/mips/include/asm/txx9/rbtx4938.h
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145
arch/mips/include/asm/txx9/rbtx4938.h
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/*
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* Definitions for TX4937/TX4938
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*
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* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
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*/
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#ifndef __ASM_TXX9_RBTX4938_H
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#define __ASM_TXX9_RBTX4938_H
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#include <asm/addrspace.h>
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#include <asm/txx9irq.h>
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#include <asm/txx9/tx4938.h>
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/* Address map */
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#define RBTX4938_FPGA_REG_ADDR (IO_BASE + TXX9_CE(2) + 0x00000000)
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#define RBTX4938_FPGA_REV_ADDR (IO_BASE + TXX9_CE(2) + 0x00000002)
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#define RBTX4938_CONFIG1_ADDR (IO_BASE + TXX9_CE(2) + 0x00000004)
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#define RBTX4938_CONFIG2_ADDR (IO_BASE + TXX9_CE(2) + 0x00000006)
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#define RBTX4938_CONFIG3_ADDR (IO_BASE + TXX9_CE(2) + 0x00000008)
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#define RBTX4938_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000)
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#define RBTX4938_DIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001002)
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#define RBTX4938_BDIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001004)
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#define RBTX4938_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000)
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#define RBTX4938_IMASK2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002002)
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#define RBTX4938_INTPOL_ADDR (IO_BASE + TXX9_CE(2) + 0x00002004)
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#define RBTX4938_ISTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006)
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#define RBTX4938_ISTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002008)
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#define RBTX4938_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200a)
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#define RBTX4938_IMSTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200c)
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#define RBTX4938_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000)
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#define RBTX4938_PIOSEL_ADDR (IO_BASE + TXX9_CE(2) + 0x00005000)
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#define RBTX4938_SPICS_ADDR (IO_BASE + TXX9_CE(2) + 0x00005002)
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#define RBTX4938_SFPWR_ADDR (IO_BASE + TXX9_CE(2) + 0x00005008)
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#define RBTX4938_SFVOL_ADDR (IO_BASE + TXX9_CE(2) + 0x0000500a)
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#define RBTX4938_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007000)
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#define RBTX4938_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x00007002)
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#define RBTX4938_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007004)
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#define RBTX4938_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000)
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/* Ethernet port address (Jumperless Mode (W12:Open)) */
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#define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280)
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/* bits for ISTAT/IMASK/IMSTAT */
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#define RBTX4938_INTB_PCID 0
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#define RBTX4938_INTB_PCIC 1
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#define RBTX4938_INTB_PCIB 2
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#define RBTX4938_INTB_PCIA 3
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#define RBTX4938_INTB_RTC 4
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#define RBTX4938_INTB_ATA 5
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#define RBTX4938_INTB_MODEM 6
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#define RBTX4938_INTB_SWINT 7
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#define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID)
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#define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC)
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#define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB)
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#define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA)
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#define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC)
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#define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA)
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#define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM)
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#define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT)
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#define rbtx4938_fpga_rev_addr ((__u8 __iomem *)RBTX4938_FPGA_REV_ADDR)
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#define rbtx4938_led_addr ((__u8 __iomem *)RBTX4938_LED_ADDR)
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#define rbtx4938_dipsw_addr ((__u8 __iomem *)RBTX4938_DIPSW_ADDR)
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#define rbtx4938_bdipsw_addr ((__u8 __iomem *)RBTX4938_BDIPSW_ADDR)
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#define rbtx4938_imask_addr ((__u8 __iomem *)RBTX4938_IMASK_ADDR)
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#define rbtx4938_imask2_addr ((__u8 __iomem *)RBTX4938_IMASK2_ADDR)
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#define rbtx4938_intpol_addr ((__u8 __iomem *)RBTX4938_INTPOL_ADDR)
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#define rbtx4938_istat_addr ((__u8 __iomem *)RBTX4938_ISTAT_ADDR)
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#define rbtx4938_istat2_addr ((__u8 __iomem *)RBTX4938_ISTAT2_ADDR)
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#define rbtx4938_imstat_addr ((__u8 __iomem *)RBTX4938_IMSTAT_ADDR)
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#define rbtx4938_imstat2_addr ((__u8 __iomem *)RBTX4938_IMSTAT2_ADDR)
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#define rbtx4938_softint_addr ((__u8 __iomem *)RBTX4938_SOFTINT_ADDR)
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#define rbtx4938_piosel_addr ((__u8 __iomem *)RBTX4938_PIOSEL_ADDR)
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#define rbtx4938_spics_addr ((__u8 __iomem *)RBTX4938_SPICS_ADDR)
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#define rbtx4938_sfpwr_addr ((__u8 __iomem *)RBTX4938_SFPWR_ADDR)
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#define rbtx4938_sfvol_addr ((__u8 __iomem *)RBTX4938_SFVOL_ADDR)
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#define rbtx4938_softreset_addr ((__u8 __iomem *)RBTX4938_SOFTRESET_ADDR)
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#define rbtx4938_softresetlock_addr \
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((__u8 __iomem *)RBTX4938_SOFTRESETLOCK_ADDR)
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#define rbtx4938_pcireset_addr ((__u8 __iomem *)RBTX4938_PCIRESET_ADDR)
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/*
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* IRQ mappings
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*/
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#define RBTX4938_SOFT_INT0 0 /* not used */
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#define RBTX4938_SOFT_INT1 1 /* not used */
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#define RBTX4938_IRC_INT 2
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#define RBTX4938_TIMER_INT 7
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/* These are the virtual IRQ numbers, we divide all IRQ's into
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* 'spaces', the 'space' determines where and how to enable/disable
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* that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
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* IRQ hardware is supported.
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*/
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#define RBTX4938_NR_IRQ_IOC 8
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#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
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#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
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#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
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#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
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#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
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#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
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#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
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#define RBTX4938_IRQ_IRC_DMA(ch, n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch, n))
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#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
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#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
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#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
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#define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
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#define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
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#define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
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#define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
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#define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
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#define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
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#define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
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#define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI)
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#define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
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#define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
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#define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
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#define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
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#define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
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#define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
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#define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
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#define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
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/* IOC (PCI, etc) */
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#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
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/* Onboard 10M Ether */
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#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
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#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
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#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
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void rbtx4938_prom_init(void);
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void rbtx4938_irq_setup(void);
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struct pci_dev;
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int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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#endif /* __ASM_TXX9_RBTX4938_H */
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