mirror of
				https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
				synced 2025-10-31 08:08:51 +01:00 
			
		
		
		
	Fixed MTP to work with TWRP
This commit is contained in:
		
						commit
						f6dfaef42e
					
				
					 50820 changed files with 20846062 additions and 0 deletions
				
			
		
							
								
								
									
										61
									
								
								arch/mips/jz4740/setup.c
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										61
									
								
								arch/mips/jz4740/setup.c
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,61 @@ | |||
| /*
 | ||||
|  *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> | ||||
|  *  Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org> | ||||
|  *  JZ4740 setup code | ||||
|  * | ||||
|  *  This program is free software; you can redistribute it and/or modify it | ||||
|  *  under  the terms of the GNU General	 Public License as published by the | ||||
|  *  Free Software Foundation;  either version 2 of the License, or (at your | ||||
|  *  option) any later version. | ||||
|  * | ||||
|  *  You should have received a copy of the GNU General Public License along | ||||
|  *  with this program; if not, write to the Free Software Foundation, Inc., | ||||
|  *  675 Mass Ave, Cambridge, MA 02139, USA. | ||||
|  * | ||||
|  */ | ||||
| 
 | ||||
| #include <linux/init.h> | ||||
| #include <linux/io.h> | ||||
| #include <linux/kernel.h> | ||||
| 
 | ||||
| #include <asm/bootinfo.h> | ||||
| 
 | ||||
| #include <asm/mach-jz4740/base.h> | ||||
| 
 | ||||
| #include "reset.h" | ||||
| 
 | ||||
| 
 | ||||
| #define JZ4740_EMC_SDRAM_CTRL 0x80 | ||||
| 
 | ||||
| 
 | ||||
| static void __init jz4740_detect_mem(void) | ||||
| { | ||||
| 	void __iomem *jz_emc_base; | ||||
| 	u32 ctrl, bus, bank, rows, cols; | ||||
| 	phys_t size; | ||||
| 
 | ||||
| 	jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100); | ||||
| 	ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL); | ||||
| 	bus = 2 - ((ctrl >> 31) & 1); | ||||
| 	bank = 1 + ((ctrl >> 19) & 1); | ||||
| 	cols = 8 + ((ctrl >> 26) & 7); | ||||
| 	rows = 11 + ((ctrl >> 20) & 3); | ||||
| 	printk(KERN_DEBUG | ||||
| 		"SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n", | ||||
| 		bus, bank, rows, cols); | ||||
| 	iounmap(jz_emc_base); | ||||
| 
 | ||||
| 	size = 1 << (bus + bank + cols + rows); | ||||
| 	add_memory_region(0, size, BOOT_MEM_RAM); | ||||
| } | ||||
| 
 | ||||
| void __init plat_mem_setup(void) | ||||
| { | ||||
| 	jz4740_reset_init(); | ||||
| 	jz4740_detect_mem(); | ||||
| } | ||||
| 
 | ||||
| const char *get_system_type(void) | ||||
| { | ||||
| 	return "JZ4740"; | ||||
| } | ||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue
	
	 awab228
						awab228