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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 17:02:46 -04:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
97
arch/mips/pci/fixup-emma2rh.c
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97
arch/mips/pci/fixup-emma2rh.c
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/*
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* Copyright (C) NEC Electronics Corporation 2004-2006
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*
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* This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
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*
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* Copyright 2001 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/bootinfo.h>
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#include <asm/emma/emma2rh.h>
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#define EMMA2RH_PCI_HOST_SLOT 0x09
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#define EMMA2RH_USB_SLOT 0x03
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#define PCI_DEVICE_ID_NEC_EMMA2RH 0x014b /* EMMA2RH PCI Host */
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/*
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* we fix up irqs based on the slot number.
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* The first entry is at AD:11.
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* Fortunately this works because, although we have two pci buses,
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* they all have different slot numbers (except for rockhopper slot 20
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* which is handled below).
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*
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*/
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#define MAX_SLOT_NUM 10
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static unsigned char irq_map[][5] __initdata = {
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[3] = {0, MARKEINS_PCI_IRQ_INTB, MARKEINS_PCI_IRQ_INTC,
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MARKEINS_PCI_IRQ_INTD, 0,},
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[4] = {0, MARKEINS_PCI_IRQ_INTA, 0, 0, 0,},
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[5] = {0, 0, 0, 0, 0,},
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[6] = {0, MARKEINS_PCI_IRQ_INTC, MARKEINS_PCI_IRQ_INTD,
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MARKEINS_PCI_IRQ_INTA, MARKEINS_PCI_IRQ_INTB,},
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};
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static void nec_usb_controller_fixup(struct pci_dev *dev)
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{
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if (PCI_SLOT(dev->devfn) == EMMA2RH_USB_SLOT)
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/* on board USB controller configuration */
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pci_write_config_dword(dev, 0xe4, 1 << 5);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
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nec_usb_controller_fixup);
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/*
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* Prevent the PCI layer from seeing the resources allocated to this device
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* if it is the host bridge by marking it as such. These resources are of
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* no consequence to the PCI layer (they are handled elsewhere).
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*/
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static void emma2rh_pci_host_fixup(struct pci_dev *dev)
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{
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int i;
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if (PCI_SLOT(dev->devfn) == EMMA2RH_PCI_HOST_SLOT) {
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dev->class &= 0xff;
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dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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dev->resource[i].start = 0;
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dev->resource[i].end = 0;
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dev->resource[i].flags = 0;
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}
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_EMMA2RH,
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emma2rh_pci_host_fixup);
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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return irq_map[slot][pin];
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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