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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-10 01:12:45 -04:00
Fixed MTP to work with TWRP
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awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
248
arch/mips/sibyte/sb1250/setup.c
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248
arch/mips/sibyte/sb1250/setup.c
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/*
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* Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/reboot.h>
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#include <linux/string.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_scd.h>
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unsigned int sb1_pass;
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unsigned int soc_pass;
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unsigned int soc_type;
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EXPORT_SYMBOL(soc_type);
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unsigned int periph_rev;
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unsigned int zbbus_mhz;
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EXPORT_SYMBOL(zbbus_mhz);
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static char *soc_str;
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static char *pass_str;
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static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
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static int __init setup_bcm1250(void)
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{
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int ret = 0;
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switch (soc_pass) {
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case K_SYS_REVISION_BCM1250_PASS1:
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periph_rev = 1;
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pass_str = "Pass 1";
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break;
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case K_SYS_REVISION_BCM1250_A10:
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periph_rev = 2;
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pass_str = "A8/A10";
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/* XXXKW different war_pass? */
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war_pass = K_SYS_REVISION_BCM1250_PASS2;
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break;
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case K_SYS_REVISION_BCM1250_PASS2_2:
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periph_rev = 2;
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pass_str = "B1";
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break;
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case K_SYS_REVISION_BCM1250_B2:
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periph_rev = 2;
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pass_str = "B2";
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war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
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break;
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case K_SYS_REVISION_BCM1250_PASS3:
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periph_rev = 3;
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pass_str = "C0";
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break;
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case K_SYS_REVISION_BCM1250_C1:
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periph_rev = 3;
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pass_str = "C1";
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break;
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default:
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if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
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periph_rev = 2;
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pass_str = "A0-A6";
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war_pass = K_SYS_REVISION_BCM1250_PASS2;
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} else {
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printk("Unknown BCM1250 rev %x\n", soc_pass);
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ret = 1;
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}
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break;
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}
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return ret;
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}
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int sb1250_m3_workaround_needed(void)
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{
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switch (soc_type) {
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case K_SYS_SOC_TYPE_BCM1250:
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case K_SYS_SOC_TYPE_BCM1250_ALT:
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case K_SYS_SOC_TYPE_BCM1250_ALT2:
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case K_SYS_SOC_TYPE_BCM1125:
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case K_SYS_SOC_TYPE_BCM1125H:
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return soc_pass < K_SYS_REVISION_BCM1250_C0;
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default:
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return 0;
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}
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}
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static int __init setup_bcm112x(void)
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{
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int ret = 0;
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switch (soc_pass) {
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case 0:
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/* Early build didn't have revid set */
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periph_rev = 3;
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pass_str = "A1";
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war_pass = K_SYS_REVISION_BCM112x_A1;
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break;
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case K_SYS_REVISION_BCM112x_A1:
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periph_rev = 3;
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pass_str = "A1";
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break;
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case K_SYS_REVISION_BCM112x_A2:
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periph_rev = 3;
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pass_str = "A2";
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break;
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case K_SYS_REVISION_BCM112x_A3:
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periph_rev = 3;
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pass_str = "A3";
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break;
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case K_SYS_REVISION_BCM112x_A4:
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periph_rev = 3;
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pass_str = "A4";
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break;
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case K_SYS_REVISION_BCM112x_B0:
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periph_rev = 3;
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pass_str = "B0";
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break;
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default:
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printk("Unknown %s rev %x\n", soc_str, soc_pass);
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ret = 1;
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}
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return ret;
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}
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/* Setup code likely to be common to all SiByte platforms */
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static int __init sys_rev_decode(void)
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{
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int ret = 0;
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war_pass = soc_pass;
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switch (soc_type) {
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case K_SYS_SOC_TYPE_BCM1250:
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case K_SYS_SOC_TYPE_BCM1250_ALT:
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case K_SYS_SOC_TYPE_BCM1250_ALT2:
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soc_str = "BCM1250";
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ret = setup_bcm1250();
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break;
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case K_SYS_SOC_TYPE_BCM1120:
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soc_str = "BCM1120";
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ret = setup_bcm112x();
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break;
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case K_SYS_SOC_TYPE_BCM1125:
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soc_str = "BCM1125";
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ret = setup_bcm112x();
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break;
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case K_SYS_SOC_TYPE_BCM1125H:
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soc_str = "BCM1125H";
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ret = setup_bcm112x();
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break;
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default:
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printk("Unknown SOC type %x\n", soc_type);
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ret = 1;
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break;
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}
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return ret;
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}
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void __init sb1250_setup(void)
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{
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uint64_t sys_rev;
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int plldiv;
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int bad_config = 0;
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sb1_pass = read_c0_prid() & PRID_REV_MASK;
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sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
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soc_type = SYS_SOC_TYPE(sys_rev);
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soc_pass = G_SYS_REVISION(sys_rev);
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if (sys_rev_decode()) {
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printk("Restart after failure to identify SiByte chip\n");
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machine_restart(NULL);
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}
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plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
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zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
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printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
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soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
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printk("Board type: %s\n", get_system_type());
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switch (war_pass) {
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case K_SYS_REVISION_BCM1250_PASS1:
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#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
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printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
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"and the kernel doesn't have the proper "
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"workarounds compiled in. @@@@\n");
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bad_config = 1;
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#endif
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break;
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case K_SYS_REVISION_BCM1250_PASS2:
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/* Pass 2 - easiest as default for now - so many numbers */
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#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
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!defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
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printk("@@@@ This is a BCM1250 A3-A10 board, and the "
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"kernel doesn't have the proper workarounds "
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"compiled in. @@@@\n");
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bad_config = 1;
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#endif
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#ifdef CONFIG_CPU_HAS_PREFETCH
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printk("@@@@ Prefetches may be enabled in this kernel, "
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"but are buggy on this board. @@@@\n");
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bad_config = 1;
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#endif
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break;
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case K_SYS_REVISION_BCM1250_PASS2_2:
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#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
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printk("@@@@ This is a BCM1250 B1/B2. board, and the "
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"kernel doesn't have the proper workarounds "
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"compiled in. @@@@\n");
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bad_config = 1;
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#endif
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#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
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!defined(CONFIG_CPU_HAS_PREFETCH)
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printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
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"conservatively configured for an 'A' stepping. "
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"@@@@\n");
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#endif
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break;
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default:
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break;
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}
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if (bad_config) {
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printk("Invalid configuration for this chip.\n");
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machine_restart(NULL);
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}
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}
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