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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-10 01:12:45 -04:00
Fixed MTP to work with TWRP
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awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
232
arch/mn10300/include/asm/bitops.h
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232
arch/mn10300/include/asm/bitops.h
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/* MN10300 bit operations
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*
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* These have to be done with inline assembly: that way the bit-setting
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* is guaranteed to be atomic. All bit operations return 0 if the bit
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* was cleared before the operation and != 0 if it was not.
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*
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*/
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#ifndef __ASM_BITOPS_H
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#define __ASM_BITOPS_H
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#include <asm/cpu-regs.h>
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#include <asm/barrier.h>
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/*
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* set bit
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*/
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#define __set_bit(nr, addr) \
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({ \
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volatile unsigned char *_a = (unsigned char *)(addr); \
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const unsigned shift = (nr) & 7; \
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_a += (nr) >> 3; \
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\
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asm volatile("bset %2,(%1) # set_bit reg" \
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: "=m"(*_a) \
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: "a"(_a), "d"(1 << shift), "m"(*_a) \
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: "memory", "cc"); \
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})
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#define set_bit(nr, addr) __set_bit((nr), (addr))
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/*
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* clear bit
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*/
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#define ___clear_bit(nr, addr) \
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({ \
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volatile unsigned char *_a = (unsigned char *)(addr); \
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const unsigned shift = (nr) & 7; \
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_a += (nr) >> 3; \
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\
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asm volatile("bclr %2,(%1) # clear_bit reg" \
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: "=m"(*_a) \
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: "a"(_a), "d"(1 << shift), "m"(*_a) \
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: "memory", "cc"); \
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})
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#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
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static inline void __clear_bit(unsigned long nr, volatile void *addr)
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{
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unsigned int *a = (unsigned int *) addr;
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int mask;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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*a &= ~mask;
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}
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/*
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* test bit
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*/
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static inline int test_bit(unsigned long nr, const volatile void *addr)
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{
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return 1UL & (((const volatile unsigned int *) addr)[nr >> 5] >> (nr & 31));
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}
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/*
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* change bit
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*/
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static inline void __change_bit(unsigned long nr, volatile void *addr)
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{
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int mask;
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unsigned int *a = (unsigned int *) addr;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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*a ^= mask;
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}
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extern void change_bit(unsigned long nr, volatile void *addr);
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/*
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* test and set bit
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*/
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#define __test_and_set_bit(nr,addr) \
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({ \
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volatile unsigned char *_a = (unsigned char *)(addr); \
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const unsigned shift = (nr) & 7; \
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unsigned epsw; \
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_a += (nr) >> 3; \
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\
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asm volatile("bset %3,(%2) # test_set_bit reg\n" \
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"mov epsw,%1" \
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: "=m"(*_a), "=d"(epsw) \
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: "a"(_a), "d"(1 << shift), "m"(*_a) \
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: "memory", "cc"); \
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\
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!(epsw & EPSW_FLAG_Z); \
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})
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#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
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/*
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* test and clear bit
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*/
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#define __test_and_clear_bit(nr, addr) \
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({ \
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volatile unsigned char *_a = (unsigned char *)(addr); \
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const unsigned shift = (nr) & 7; \
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unsigned epsw; \
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_a += (nr) >> 3; \
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\
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asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
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"mov epsw,%1" \
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: "=m"(*_a), "=d"(epsw) \
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: "a"(_a), "d"(1 << shift), "m"(*_a) \
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: "memory", "cc"); \
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\
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!(epsw & EPSW_FLAG_Z); \
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})
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#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
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/*
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* test and change bit
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*/
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static inline int __test_and_change_bit(unsigned long nr, volatile void *addr)
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{
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int mask, retval;
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unsigned int *a = (unsigned int *)addr;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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retval = (mask & *a) != 0;
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*a ^= mask;
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return retval;
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}
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extern int test_and_change_bit(unsigned long nr, volatile void *addr);
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#include <asm-generic/bitops/lock.h>
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#ifdef __KERNEL__
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/**
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* __ffs - find first bit set
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* @x: the word to search
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*
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* - return 31..0 to indicate bit 31..0 most least significant bit set
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* - if no bits are set in x, the result is undefined
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*/
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static inline __attribute__((const))
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unsigned long __ffs(unsigned long x)
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{
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int bit;
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asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc");
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return bit;
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}
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/*
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* special slimline version of fls() for calculating ilog2_u32()
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* - note: no protection against n == 0
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*/
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static inline __attribute__((const))
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int __ilog2_u32(u32 n)
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{
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int bit;
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asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc");
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return bit;
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}
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/**
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* fls - find last bit set
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* @x: the word to search
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*
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* This is defined the same way as ffs:
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* - return 32..1 to indicate bit 31..0 most significant bit set
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* - return 0 to indicate no bits set
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*/
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static inline __attribute__((const))
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int fls(int x)
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{
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return (x != 0) ? __ilog2_u32(x) + 1 : 0;
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}
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/**
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* __fls - find last (most-significant) set bit in a long word
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* @word: the word to search
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*
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* Undefined if no set bit exists, so code should check against 0 first.
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*/
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static inline unsigned long __fls(unsigned long word)
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{
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return __ilog2_u32(word);
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}
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/**
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* ffs - find first bit set
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* @x: the word to search
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*
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* - return 32..1 to indicate bit 31..0 most least significant bit set
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* - return 0 to indicate no bits set
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*/
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static inline __attribute__((const))
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int ffs(int x)
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{
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/* Note: (x & -x) gives us a mask that is the least significant
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* (rightmost) 1-bit of the value in x.
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*/
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return fls(x & -x);
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}
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#include <asm-generic/bitops/ffz.h>
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#include <asm-generic/bitops/fls64.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/ext2-atomic-setbit.h>
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#include <asm-generic/bitops/le.h>
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#endif /* __KERNEL__ */
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#endif /* __ASM_BITOPS_H */
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