mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 01:28:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
24
arch/mn10300/unit-asb2305/include/unit/clock.h
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24
arch/mn10300/unit-asb2305/include/unit/clock.h
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/* ASB2305-specific clocks
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_UNIT_CLOCK_H
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#define _ASM_UNIT_CLOCK_H
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#ifndef __ASSEMBLY__
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#define MN10300_IOCLK 33333333UL
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/* #define MN10300_IOBCLK 66666666UL */
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#endif /* !__ASSEMBLY__ */
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#define MN10300_WDCLK MN10300_IOCLK
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#endif /* _ASM_UNIT_CLOCK_H */
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51
arch/mn10300/unit-asb2305/include/unit/leds.h
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51
arch/mn10300/unit-asb2305/include/unit/leds.h
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/* ASB2305-specific LEDs
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_UNIT_LEDS_H
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#define _ASM_UNIT_LEDS_H
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#include <asm/pio-regs.h>
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#include <asm/cpu-regs.h>
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#include <asm/exceptions.h>
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#define ASB2305_7SEGLEDS __SYSREG(0xA6F90000, u32)
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/* perform a hard reset by driving PIO06 low */
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#define mn10300_unit_hard_reset() \
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do { \
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P0OUT &= 0xbf; \
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P0MD = (P0MD & P0MD_6) | P0MD_6_OUT; \
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} while (0)
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/*
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* use the 7-segment LEDs to indicate states
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*/
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/* indicate double-fault by displaying "db-f" on the LEDs */
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#define mn10300_set_dbfleds \
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mov 0x43077f1d,d0 ; \
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mov d0,(ASB2305_7SEGLEDS)
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/* flip the 7-segment LEDs between "Gdb-" and "----" */
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#define mn10300_set_gdbleds(ONOFF) \
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do { \
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ASB2305_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
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} while (0)
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#ifndef __ASSEMBLY__
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extern void peripheral_leds_display_exception(enum exception_code);
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extern void peripheral_leds_led_chase(void);
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extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
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extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
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extern void peripheral_leds7x4_display_minssecs(unsigned int, unsigned int);
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extern void peripheral_leds7x4_display_rtc(void);
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_UNIT_LEDS_H */
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125
arch/mn10300/unit-asb2305/include/unit/serial.h
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125
arch/mn10300/unit-asb2305/include/unit/serial.h
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/* ASB2305-specific 8250 serial ports
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_UNIT_SERIAL_H
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#define _ASM_UNIT_SERIAL_H
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#include <asm/cpu-regs.h>
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#include <proc/irq.h>
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#include <linux/serial_reg.h>
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#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
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#define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
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#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
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/*
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* The ASB2305 has an 18.432 MHz clock the UART
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*/
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#define BASE_BAUD (18432000 / 16)
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/*
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* dispose of the /dev/ttyS0 serial port
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*/
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#ifndef CONFIG_GDBSTUB_ON_TTYSx
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#define SERIAL_PORT_DFNS \
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{ \
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.baud_base = BASE_BAUD, \
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.irq = SERIAL_IRQ, \
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.flags = STD_COM_FLAGS, \
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.iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
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.iomem_reg_shift = 2, \
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.io_type = SERIAL_IO_MEM, \
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},
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#ifndef __ASSEMBLY__
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static inline void __debug_to_serial(const char *p, int n)
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{
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}
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#endif /* !__ASSEMBLY__ */
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#else /* CONFIG_GDBSTUB_ON_TTYSx */
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#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
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#if defined(CONFIG_GDBSTUB_ON_TTYS0)
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#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
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#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
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#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
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#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
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#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
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#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
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#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
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#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
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#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
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#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
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#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
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#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
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#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
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#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
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#error The ASB2305 doesnt have a /dev/ttyS1
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#endif
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#ifndef __ASSEMBLY__
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#define TTYS0_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
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#define TTYS0_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
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#define TTYS0_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
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#define TTYS0_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
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#define LSR_WAIT_FOR(STATE) \
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do { \
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while (!(TTYS0_LSR & UART_LSR_##STATE)) {} \
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} while (0)
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#define FLOWCTL_WAIT_FOR(LINE) \
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do { \
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while (!(TTYS0_MSR & UART_MSR_##LINE)) {} \
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} while (0)
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#define FLOWCTL_CLEAR(LINE) \
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do { \
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TTYS0_MCR &= ~UART_MCR_##LINE; \
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} while (0)
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#define FLOWCTL_SET(LINE) \
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do { \
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TTYS0_MCR |= UART_MCR_##LINE; \
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} while (0)
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#define FLOWCTL_QUERY(LINE) ({ TTYS0_MSR & UART_MSR_##LINE; })
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static inline void __debug_to_serial(const char *p, int n)
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{
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char ch;
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FLOWCTL_SET(DTR);
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for (; n > 0; n--) {
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LSR_WAIT_FOR(THRE);
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FLOWCTL_WAIT_FOR(CTS);
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ch = *p++;
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if (ch == 0x0a) {
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TTYS0_TX = 0x0d;
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LSR_WAIT_FOR(THRE);
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FLOWCTL_WAIT_FOR(CTS);
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}
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TTYS0_TX = ch;
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}
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FLOWCTL_CLEAR(DTR);
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* CONFIG_GDBSTUB_ON_TTYSx */
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#endif /* _ASM_UNIT_SERIAL_H */
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146
arch/mn10300/unit-asb2305/include/unit/timex.h
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146
arch/mn10300/unit-asb2305/include/unit/timex.h
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@ -0,0 +1,146 @@
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/* ASB2305-specific timer specifications
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*
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* Copyright (C) 2007, 2010 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_UNIT_TIMEX_H
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#define _ASM_UNIT_TIMEX_H
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#include <asm/timer-regs.h>
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#include <unit/clock.h>
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#include <asm/param.h>
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/*
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* jiffies counter specifications
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*/
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#define TMJCBR_MAX 0xffff
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#define TMJCIRQ TM1IRQ
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#define TMJCICR TM1ICR
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#ifndef __ASSEMBLY__
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#define MN10300_SRC_IOCLK MN10300_IOCLK
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#ifndef HZ
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# error HZ undeclared.
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#endif /* !HZ */
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/* use as little prescaling as possible to avoid losing accuracy */
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#if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX
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# define IOCLK_PRESCALE 1
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# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK
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# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK
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#elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
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# define IOCLK_PRESCALE 8
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# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_8
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# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_8
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#elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
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# define IOCLK_PRESCALE 32
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# define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_32
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# define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_32
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#else
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# error You lose.
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#endif
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#define MN10300_JCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
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#define MN10300_TSCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
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#define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ)
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#define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ)
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static inline void stop_jiffies_counter(void)
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{
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u16 tmp;
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TM01MD = JC_TIMER_CLKSRC | TM1MD_SRC_TM0CASCADE << 8;
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tmp = TM01MD;
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}
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static inline void reload_jiffies_counter(u32 cnt)
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{
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u32 tmp;
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TM01BR = cnt;
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tmp = TM01BR;
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TM01MD = JC_TIMER_CLKSRC | \
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TM1MD_SRC_TM0CASCADE << 8 | \
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TM0MD_INIT_COUNTER | \
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TM1MD_INIT_COUNTER << 8;
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TM01MD = JC_TIMER_CLKSRC | \
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TM1MD_SRC_TM0CASCADE << 8 | \
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TM0MD_COUNT_ENABLE | \
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TM1MD_COUNT_ENABLE << 8;
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tmp = TM01MD;
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}
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#endif /* !__ASSEMBLY__ */
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/*
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* timestamp counter specifications
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*/
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#define TMTSCBR_MAX 0xffffffff
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#define TMTSCBC TM45BC
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#ifndef __ASSEMBLY__
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static inline void startup_timestamp_counter(void)
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{
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u32 t32;
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/* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
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* - count down from 4Gig-1 to 0 and wrap at IOCLK rate
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*/
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TM45BR = TMTSCBR_MAX;
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t32 = TM45BR;
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TM4MD = TSC_TIMER_CLKSRC;
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TM4MD |= TM4MD_INIT_COUNTER;
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TM4MD &= ~TM4MD_INIT_COUNTER;
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TM4ICR = 0;
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t32 = TM4ICR;
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TM5MD = TM5MD_SRC_TM4CASCADE;
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TM5MD |= TM5MD_INIT_COUNTER;
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TM5MD &= ~TM5MD_INIT_COUNTER;
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TM5ICR = 0;
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t32 = TM5ICR;
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TM5MD |= TM5MD_COUNT_ENABLE;
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TM4MD |= TM4MD_COUNT_ENABLE;
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t32 = TM5MD;
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t32 = TM4MD;
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}
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static inline void shutdown_timestamp_counter(void)
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{
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u8 t8;
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TM4MD = 0;
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TM5MD = 0;
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t8 = TM4MD;
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t8 = TM5MD;
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}
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/*
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* we use a cascaded pair of 16-bit down-counting timers to count I/O
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* clock cycles for the purposes of time keeping
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*/
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typedef unsigned long cycles_t;
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static inline cycles_t read_timestamp_counter(void)
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{
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return (cycles_t)~TMTSCBC;
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_UNIT_TIMEX_H */
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