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Fixed MTP to work with TWRP

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This commit is contained in:
awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
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115
arch/powerpc/boot/dts/sbc8548-altflash.dts Normal file
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@ -0,0 +1,115 @@
/*
* SBC8548 Device Tree Source
*
* Configured for booting off the alternate (64MB SODIMM) flash.
* Requires switching JP12 jumpers and changing SW2.8 setting.
*
* Copyright 2013 Wind River Systems Inc.
*
* Paul Gortmaker (see MAINTAINERS for contact information)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/include/ "sbc8548-pre.dtsi"
/{
localbus@e0000000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "simple-bus";
reg = <0xe0000000 0x5000>;
interrupt-parent = <&mpic>;
ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x0 0x04000000>;
compatible = "intel,JS28F128", "cfi-flash";
bank-width = <4>;
device-width = <1>;
partition@0x0 {
label = "space";
/* FC000000 -> FFEFFFFF */
reg = <0x00000000 0x03f00000>;
};
partition@0x03f00000 {
label = "bootloader";
/* FFF00000 -> FFFFFFFF */
reg = <0x03f00000 0x00100000>;
read-only;
};
};
epld@5,0 {
compatible = "wrs,epld-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x5 0x0 0x00b10000>;
ranges = <
0x0 0x0 0x5 0x000000 0x1fff /* LED */
0x1 0x0 0x5 0x100000 0x1fff /* Switches */
0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
>;
led@0,0 {
compatible = "led";
reg = <0x0 0x0 0x1fff>;
};
switches@1,0 {
compatible = "switches";
reg = <0x1 0x0 0x1fff>;
};
hw-rev@3,0 {
compatible = "hw-rev";
reg = <0x3 0x0 0x1fff>;
};
eeprom@b,0 {
compatible = "eeprom";
reg = <0xb 0 0x1fff>;
};
};
alt-flash@6,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,JS28F640", "cfi-flash";
reg = <0x6 0x0 0x800000>;
bank-width = <1>;
device-width = <1>;
partition@0x0 {
label = "space";
/* EF800000 -> EFF9FFFF */
reg = <0x00000000 0x007a0000>;
};
partition@0x7a0000 {
label = "bootloader";
/* EFFA0000 -> EFFFFFFF */
reg = <0x007a0000 0x00060000>;
read-only;
};
};
};
};
/include/ "sbc8548-post.dtsi"