mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 17:18:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
5
arch/sh/boards/mach-se/7206/Makefile
Normal file
5
arch/sh/boards/mach-se/7206/Makefile
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
#
|
||||
# Makefile for the 7206 SolutionEngine specific parts of the kernel
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o
|
||||
150
arch/sh/boards/mach-se/7206/irq.c
Normal file
150
arch/sh/boards/mach-se/7206/irq.c
Normal file
|
|
@ -0,0 +1,150 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7206/irq.c
|
||||
*
|
||||
* Copyright (C) 2005,2006 Yoshinori Sato
|
||||
*
|
||||
* Hitachi SolutionEngine Support.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <mach-se/mach/se7206.h>
|
||||
|
||||
#define INTSTS0 0x31800000
|
||||
#define INTSTS1 0x31800002
|
||||
#define INTMSK0 0x31800004
|
||||
#define INTMSK1 0x31800006
|
||||
#define INTSEL 0x31800008
|
||||
|
||||
#define IRQ0_IRQ 64
|
||||
#define IRQ1_IRQ 65
|
||||
#define IRQ3_IRQ 67
|
||||
|
||||
#define INTC_IPR01 0xfffe0818
|
||||
#define INTC_ICR1 0xfffe0802
|
||||
|
||||
static void disable_se7206_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned short val;
|
||||
unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
|
||||
unsigned short msk0,msk1;
|
||||
|
||||
/* Set the priority in IPR to 0 */
|
||||
val = __raw_readw(INTC_IPR01);
|
||||
val &= mask;
|
||||
__raw_writew(val, INTC_IPR01);
|
||||
/* FPGA mask set */
|
||||
msk0 = __raw_readw(INTMSK0);
|
||||
msk1 = __raw_readw(INTMSK1);
|
||||
|
||||
switch (irq) {
|
||||
case IRQ0_IRQ:
|
||||
msk0 |= 0x0010;
|
||||
break;
|
||||
case IRQ1_IRQ:
|
||||
msk0 |= 0x000f;
|
||||
break;
|
||||
case IRQ3_IRQ:
|
||||
msk0 |= 0x0f00;
|
||||
msk1 |= 0x00ff;
|
||||
break;
|
||||
}
|
||||
__raw_writew(msk0, INTMSK0);
|
||||
__raw_writew(msk1, INTMSK1);
|
||||
}
|
||||
|
||||
static void enable_se7206_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned short val;
|
||||
unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
|
||||
unsigned short msk0,msk1;
|
||||
|
||||
/* Set priority in IPR back to original value */
|
||||
val = __raw_readw(INTC_IPR01);
|
||||
val |= value;
|
||||
__raw_writew(val, INTC_IPR01);
|
||||
|
||||
/* FPGA mask reset */
|
||||
msk0 = __raw_readw(INTMSK0);
|
||||
msk1 = __raw_readw(INTMSK1);
|
||||
|
||||
switch (irq) {
|
||||
case IRQ0_IRQ:
|
||||
msk0 &= ~0x0010;
|
||||
break;
|
||||
case IRQ1_IRQ:
|
||||
msk0 &= ~0x000f;
|
||||
break;
|
||||
case IRQ3_IRQ:
|
||||
msk0 &= ~0x0f00;
|
||||
msk1 &= ~0x00ff;
|
||||
break;
|
||||
}
|
||||
__raw_writew(msk0, INTMSK0);
|
||||
__raw_writew(msk1, INTMSK1);
|
||||
}
|
||||
|
||||
static void eoi_se7206_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned short sts0,sts1;
|
||||
unsigned int irq = data->irq;
|
||||
|
||||
if (!irqd_irq_disabled(data) && !irqd_irq_inprogress(data))
|
||||
enable_se7206_irq(data);
|
||||
/* FPGA isr clear */
|
||||
sts0 = __raw_readw(INTSTS0);
|
||||
sts1 = __raw_readw(INTSTS1);
|
||||
|
||||
switch (irq) {
|
||||
case IRQ0_IRQ:
|
||||
sts0 &= ~0x0010;
|
||||
break;
|
||||
case IRQ1_IRQ:
|
||||
sts0 &= ~0x000f;
|
||||
break;
|
||||
case IRQ3_IRQ:
|
||||
sts0 &= ~0x0f00;
|
||||
sts1 &= ~0x00ff;
|
||||
break;
|
||||
}
|
||||
__raw_writew(sts0, INTSTS0);
|
||||
__raw_writew(sts1, INTSTS1);
|
||||
}
|
||||
|
||||
static struct irq_chip se7206_irq_chip __read_mostly = {
|
||||
.name = "SE7206-FPGA",
|
||||
.irq_mask = disable_se7206_irq,
|
||||
.irq_unmask = enable_se7206_irq,
|
||||
.irq_eoi = eoi_se7206_irq,
|
||||
};
|
||||
|
||||
static void make_se7206_irq(unsigned int irq)
|
||||
{
|
||||
disable_irq_nosync(irq);
|
||||
irq_set_chip_and_handler_name(irq, &se7206_irq_chip,
|
||||
handle_level_irq, "level");
|
||||
disable_se7206_irq(irq_get_irq_data(irq));
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_se7206_IRQ(void)
|
||||
{
|
||||
make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
|
||||
make_se7206_irq(IRQ1_IRQ); /* ATA */
|
||||
make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
|
||||
|
||||
__raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */
|
||||
|
||||
/* FPGA System register setup*/
|
||||
__raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
|
||||
__raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
|
||||
|
||||
/* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
|
||||
__raw_writew(0x0001,INTSEL);
|
||||
}
|
||||
95
arch/sh/boards/mach-se/7206/setup.c
Normal file
95
arch/sh/boards/mach-se/7206/setup.c
Normal file
|
|
@ -0,0 +1,95 @@
|
|||
/*
|
||||
*
|
||||
* linux/arch/sh/boards/se/7206/setup.c
|
||||
*
|
||||
* Copyright (C) 2006 Yoshinori Sato
|
||||
* Copyright (C) 2007 - 2008 Paul Mundt
|
||||
*
|
||||
* Hitachi 7206 SolutionEngine Support.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <mach-se/mach/se7206.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
||||
static struct resource smc91x_resources[] = {
|
||||
[0] = {
|
||||
.name = "smc91x-regs",
|
||||
.start = PA_SMSC + 0x300,
|
||||
.end = PA_SMSC + 0x300 + 0x020 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 64,
|
||||
.end = 64,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct smc91x_platdata smc91x_info = {
|
||||
.flags = SMC91X_USE_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_device = {
|
||||
.name = "smc91x",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = NULL,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &smc91x_info,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(smc91x_resources),
|
||||
.resource = smc91x_resources,
|
||||
};
|
||||
|
||||
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
|
||||
|
||||
static struct heartbeat_data heartbeat_data = {
|
||||
.bit_pos = heartbeat_bit_pos,
|
||||
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
|
||||
};
|
||||
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &heartbeat_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
static struct platform_device *se7206_devices[] __initdata = {
|
||||
&smc91x_device,
|
||||
&heartbeat_device,
|
||||
};
|
||||
|
||||
static int __init se7206_devices_setup(void)
|
||||
{
|
||||
return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
|
||||
}
|
||||
device_initcall(se7206_devices_setup);
|
||||
|
||||
static int se7206_mode_pins(void)
|
||||
{
|
||||
return MODE_PIN1 | MODE_PIN2;
|
||||
}
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
|
||||
static struct sh_machine_vector mv_se __initmv = {
|
||||
.mv_name = "SolutionEngine",
|
||||
.mv_init_irq = init_se7206_IRQ,
|
||||
.mv_mode_pins = se7206_mode_pins,
|
||||
};
|
||||
5
arch/sh/boards/mach-se/7343/Makefile
Normal file
5
arch/sh/boards/mach-se/7343/Makefile
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
#
|
||||
# Makefile for the 7343 SolutionEngine specific parts of the kernel
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o
|
||||
129
arch/sh/boards/mach-se/7343/irq.c
Normal file
129
arch/sh/boards/mach-se/7343/irq.c
Normal file
|
|
@ -0,0 +1,129 @@
|
|||
/*
|
||||
* Hitachi UL SolutionEngine 7343 FPGA IRQ Support.
|
||||
*
|
||||
* Copyright (C) 2008 Yoshihiro Shimoda
|
||||
* Copyright (C) 2012 Paul Mundt
|
||||
*
|
||||
* Based on linux/arch/sh/boards/se/7343/irq.c
|
||||
* Copyright (C) 2007 Nobuhiro Iwamatsu
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#define DRV_NAME "SE7343-FPGA"
|
||||
#define pr_fmt(fmt) DRV_NAME ": " fmt
|
||||
|
||||
#define irq_reg_readl ioread16
|
||||
#define irq_reg_writel iowrite16
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <mach-se/mach/se7343.h>
|
||||
|
||||
#define PA_CPLD_BASE_ADDR 0x11400000
|
||||
#define PA_CPLD_ST_REG 0x08 /* CPLD Interrupt status register */
|
||||
#define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */
|
||||
|
||||
static void __iomem *se7343_irq_regs;
|
||||
struct irq_domain *se7343_irq_domain;
|
||||
|
||||
static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_data *data = irq_get_irq_data(irq);
|
||||
struct irq_chip *chip = irq_data_get_irq_chip(data);
|
||||
unsigned long mask;
|
||||
int bit;
|
||||
|
||||
chip->irq_mask_ack(data);
|
||||
|
||||
mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG);
|
||||
|
||||
for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR)
|
||||
generic_handle_irq(irq_linear_revmap(se7343_irq_domain, bit));
|
||||
|
||||
chip->irq_unmask(data);
|
||||
}
|
||||
|
||||
static void __init se7343_domain_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,
|
||||
&irq_domain_simple_ops, NULL);
|
||||
if (unlikely(!se7343_irq_domain)) {
|
||||
printk("Failed to get IRQ domain\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
|
||||
int irq = irq_create_mapping(se7343_irq_domain, i);
|
||||
|
||||
if (unlikely(irq == 0)) {
|
||||
printk("Failed to allocate IRQ %d\n", i);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void __init se7343_gc_init(void)
|
||||
{
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
unsigned int irq_base;
|
||||
|
||||
irq_base = irq_linear_revmap(se7343_irq_domain, 0);
|
||||
|
||||
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
|
||||
handle_level_irq);
|
||||
if (unlikely(!gc))
|
||||
return;
|
||||
|
||||
ct = gc->chip_types;
|
||||
ct->chip.irq_mask = irq_gc_mask_set_bit;
|
||||
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
|
||||
|
||||
ct->regs.mask = PA_CPLD_IMSK_REG;
|
||||
|
||||
irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR),
|
||||
IRQ_GC_INIT_MASK_CACHE,
|
||||
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
|
||||
|
||||
irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
|
||||
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
|
||||
irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
|
||||
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
|
||||
irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
|
||||
irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
|
||||
irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
|
||||
irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_7343se_IRQ(void)
|
||||
{
|
||||
se7343_irq_regs = ioremap(PA_CPLD_BASE_ADDR, SZ_16);
|
||||
if (unlikely(!se7343_irq_regs)) {
|
||||
pr_err("Failed to remap CPLD\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* All FPGA IRQs disabled by default
|
||||
*/
|
||||
iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG);
|
||||
|
||||
__raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
|
||||
|
||||
se7343_domain_init();
|
||||
se7343_gc_init();
|
||||
}
|
||||
181
arch/sh/boards/mach-se/7343/setup.c
Normal file
181
arch/sh/boards/mach-se/7343/setup.c
Normal file
|
|
@ -0,0 +1,181 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/serial_reg.h>
|
||||
#include <linux/usb/isp116x.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <mach-se/mach/se7343.h>
|
||||
#include <asm/heartbeat.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
static struct mtd_partition nor_flash_partitions[] = {
|
||||
{
|
||||
.name = "loader",
|
||||
.offset = 0x00000000,
|
||||
.size = 128 * 1024,
|
||||
},
|
||||
{
|
||||
.name = "rootfs",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 31 * 1024 * 1024,
|
||||
},
|
||||
{
|
||||
.name = "data",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data nor_flash_data = {
|
||||
.width = 2,
|
||||
.parts = nor_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(nor_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource nor_flash_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x00000000,
|
||||
.end = 0x01ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device nor_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.dev = {
|
||||
.platform_data = &nor_flash_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(nor_flash_resources),
|
||||
.resource = nor_flash_resources,
|
||||
};
|
||||
|
||||
#define ST16C2550C_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP)
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data[] = {
|
||||
[0] = {
|
||||
.iotype = UPIO_MEM,
|
||||
.mapbase = 0x16000000,
|
||||
.regshift = 1,
|
||||
.flags = ST16C2550C_FLAGS,
|
||||
.uartclk = 7372800,
|
||||
},
|
||||
[1] = {
|
||||
.iotype = UPIO_MEM,
|
||||
.mapbase = 0x17000000,
|
||||
.regshift = 1,
|
||||
.flags = ST16C2550C_FLAGS,
|
||||
.uartclk = 7372800,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct platform_device uart_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = serial_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static void isp116x_delay(struct device *dev, int delay)
|
||||
{
|
||||
ndelay(delay);
|
||||
}
|
||||
|
||||
static struct resource usb_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x11800000,
|
||||
.end = 0x11800001,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 0x11800002,
|
||||
.end = 0x11800003,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
/* Filled in later */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct isp116x_platform_data usb_platform_data = {
|
||||
.sel15Kres = 1,
|
||||
.oc_enable = 1,
|
||||
.int_act_high = 0,
|
||||
.int_edge_triggered = 0,
|
||||
.remote_wakeup_enable = 0,
|
||||
.delay = isp116x_delay,
|
||||
};
|
||||
|
||||
static struct platform_device usb_device = {
|
||||
.name = "isp116x-hcd",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(usb_resources),
|
||||
.resource = usb_resources,
|
||||
.dev = {
|
||||
.platform_data = &usb_platform_data,
|
||||
},
|
||||
|
||||
};
|
||||
|
||||
static struct platform_device *sh7343se_platform_devices[] __initdata = {
|
||||
&heartbeat_device,
|
||||
&nor_flash_device,
|
||||
&uart_device,
|
||||
&usb_device,
|
||||
};
|
||||
|
||||
static int __init sh7343se_devices_setup(void)
|
||||
{
|
||||
/* Wire-up dynamic vectors */
|
||||
serial_platform_data[0].irq = irq_find_mapping(se7343_irq_domain,
|
||||
SE7343_FPGA_IRQ_UARTA);
|
||||
serial_platform_data[1].irq = irq_find_mapping(se7343_irq_domain,
|
||||
SE7343_FPGA_IRQ_UARTB);
|
||||
usb_resources[2].start = usb_resources[2].end =
|
||||
irq_find_mapping(se7343_irq_domain, SE7343_FPGA_IRQ_USB);
|
||||
|
||||
return platform_add_devices(sh7343se_platform_devices,
|
||||
ARRAY_SIZE(sh7343se_platform_devices));
|
||||
}
|
||||
device_initcall(sh7343se_devices_setup);
|
||||
|
||||
/*
|
||||
* Initialize the board
|
||||
*/
|
||||
static void __init sh7343se_setup(char **cmdline_p)
|
||||
{
|
||||
__raw_writew(0xf900, FPGA_OUT); /* FPGA */
|
||||
|
||||
__raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
|
||||
__raw_writew(0x0020, PORT_PSELD);
|
||||
|
||||
printk(KERN_INFO "MS7343CP01 Setup...done\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
static struct sh_machine_vector mv_7343se __initmv = {
|
||||
.mv_name = "SolutionEngine 7343",
|
||||
.mv_setup = sh7343se_setup,
|
||||
.mv_init_irq = init_7343se_IRQ,
|
||||
};
|
||||
5
arch/sh/boards/mach-se/770x/Makefile
Normal file
5
arch/sh/boards/mach-se/770x/Makefile
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
#
|
||||
# Makefile for the 770x SolutionEngine specific parts of the kernel
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o
|
||||
108
arch/sh/boards/mach-se/770x/irq.c
Normal file
108
arch/sh/boards/mach-se/770x/irq.c
Normal file
|
|
@ -0,0 +1,108 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/770x/irq.c
|
||||
*
|
||||
* Copyright (C) 2000 Kazumoto Kojima
|
||||
* Copyright (C) 2006 Nobuhiro Iwamatsu
|
||||
*
|
||||
* Hitachi SolutionEngine Support.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/io.h>
|
||||
#include <mach-se/mach/se.h>
|
||||
|
||||
static struct ipr_data ipr_irq_table[] = {
|
||||
/*
|
||||
* Super I/O (Just mimic PC):
|
||||
* 1: keyboard
|
||||
* 3: serial 0
|
||||
* 4: serial 1
|
||||
* 5: printer
|
||||
* 6: floppy
|
||||
* 8: rtc
|
||||
* 12: mouse
|
||||
* 14: ide0
|
||||
*/
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
|
||||
/* This is default value */
|
||||
{ 13, 0, 8, 0x0f-13, },
|
||||
{ 5 , 0, 4, 0x0f- 5, },
|
||||
{ 10, 1, 0, 0x0f-10, },
|
||||
{ 7 , 2, 4, 0x0f- 7, },
|
||||
{ 3 , 2, 0, 0x0f- 3, },
|
||||
{ 1 , 3, 12, 0x0f- 1, },
|
||||
{ 12, 3, 4, 0x0f-12, }, /* LAN */
|
||||
{ 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
|
||||
{ 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
|
||||
{ 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
|
||||
{ 0 , 5, 12, 0x0f , },
|
||||
{ 4 , 5, 4, 0x0f- 4, },
|
||||
{ 8 , 6, 12, 0x0f- 8, },
|
||||
{ 9 , 6, 8, 0x0f- 9, },
|
||||
{ 11, 6, 4, 0x0f-11, },
|
||||
#else
|
||||
{ 14, 0, 8, 0x0f-14, },
|
||||
{ 12, 0, 4, 0x0f-12, },
|
||||
{ 8, 1, 4, 0x0f- 8, },
|
||||
{ 6, 2, 12, 0x0f- 6, },
|
||||
{ 5, 2, 8, 0x0f- 5, },
|
||||
{ 4, 2, 4, 0x0f- 4, },
|
||||
{ 3, 2, 0, 0x0f- 3, },
|
||||
{ 1, 3, 12, 0x0f- 1, },
|
||||
#if defined(CONFIG_STNIC)
|
||||
/* ST NIC */
|
||||
{ 10, 3, 4, 0x0f-10, }, /* LAN */
|
||||
#endif
|
||||
/* MRSHPC IRQs setting */
|
||||
{ 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
|
||||
{ 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
|
||||
{ 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
|
||||
{ 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
|
||||
/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
|
||||
/* NOTE: #2 and #13 are not used on PC */
|
||||
{ 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
|
||||
{ 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
|
||||
#endif
|
||||
};
|
||||
|
||||
static unsigned long ipr_offsets[] = {
|
||||
BCR_ILCRA,
|
||||
BCR_ILCRB,
|
||||
BCR_ILCRC,
|
||||
BCR_ILCRD,
|
||||
BCR_ILCRE,
|
||||
BCR_ILCRF,
|
||||
BCR_ILCRG,
|
||||
};
|
||||
|
||||
static struct ipr_desc ipr_irq_desc = {
|
||||
.ipr_offsets = ipr_offsets,
|
||||
.nr_offsets = ARRAY_SIZE(ipr_offsets),
|
||||
|
||||
.ipr_data = ipr_irq_table,
|
||||
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
|
||||
.chip = {
|
||||
.name = "IPR-se770x",
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_se_IRQ(void)
|
||||
{
|
||||
/* Disable all interrupts */
|
||||
__raw_writew(0, BCR_ILCRA);
|
||||
__raw_writew(0, BCR_ILCRB);
|
||||
__raw_writew(0, BCR_ILCRC);
|
||||
__raw_writew(0, BCR_ILCRD);
|
||||
__raw_writew(0, BCR_ILCRE);
|
||||
__raw_writew(0, BCR_ILCRF);
|
||||
__raw_writew(0, BCR_ILCRG);
|
||||
|
||||
register_ipr_controller(&ipr_irq_desc);
|
||||
}
|
||||
188
arch/sh/boards/mach-se/770x/setup.c
Normal file
188
arch/sh/boards/mach-se/770x/setup.c
Normal file
|
|
@ -0,0 +1,188 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/770x/setup.c
|
||||
*
|
||||
* Copyright (C) 2000 Kazumoto Kojima
|
||||
*
|
||||
* Hitachi SolutionEngine Support.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <mach-se/mach/se.h>
|
||||
#include <mach-se/mach/mrshpc.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/smc37c93x.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
||||
/*
|
||||
* Configure the Super I/O chip
|
||||
*/
|
||||
static void __init smsc_config(int index, int data)
|
||||
{
|
||||
outb_p(index, INDEX_PORT);
|
||||
outb_p(data, DATA_PORT);
|
||||
}
|
||||
|
||||
/* XXX: Another candidate for a more generic cchip machine vector */
|
||||
static void __init smsc_setup(char **cmdline_p)
|
||||
{
|
||||
outb_p(CONFIG_ENTER, CONFIG_PORT);
|
||||
outb_p(CONFIG_ENTER, CONFIG_PORT);
|
||||
|
||||
/* FDC */
|
||||
smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
|
||||
smsc_config(ACTIVATE_INDEX, 0x01);
|
||||
smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
|
||||
|
||||
/* AUXIO (GPIO): to use IDE1 */
|
||||
smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
|
||||
smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
|
||||
smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
|
||||
|
||||
/* COM1 */
|
||||
smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
|
||||
smsc_config(ACTIVATE_INDEX, 0x01);
|
||||
smsc_config(IO_BASE_HI_INDEX, 0x03);
|
||||
smsc_config(IO_BASE_LO_INDEX, 0xf8);
|
||||
smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
|
||||
|
||||
/* COM2 */
|
||||
smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
|
||||
smsc_config(ACTIVATE_INDEX, 0x01);
|
||||
smsc_config(IO_BASE_HI_INDEX, 0x02);
|
||||
smsc_config(IO_BASE_LO_INDEX, 0xf8);
|
||||
smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
|
||||
|
||||
/* RTC */
|
||||
smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
|
||||
smsc_config(ACTIVATE_INDEX, 0x01);
|
||||
smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
|
||||
|
||||
/* XXX: PARPORT, KBD, and MOUSE will come here... */
|
||||
outb_p(CONFIG_EXIT, CONFIG_PORT);
|
||||
}
|
||||
|
||||
|
||||
static struct resource cf_ide_resources[] = {
|
||||
[0] = {
|
||||
.start = PA_MRSHPC_IO + 0x1f0,
|
||||
.end = PA_MRSHPC_IO + 0x1f0 + 8,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
|
||||
.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = IRQ_CFCARD,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device cf_ide_device = {
|
||||
.name = "pata_platform",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(cf_ide_resources),
|
||||
.resource = cf_ide_resources,
|
||||
};
|
||||
|
||||
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
|
||||
|
||||
static struct heartbeat_data heartbeat_data = {
|
||||
.bit_pos = heartbeat_bit_pos,
|
||||
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
|
||||
};
|
||||
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &heartbeat_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
/* SH771X Ethernet driver */
|
||||
static struct resource sh_eth0_resources[] = {
|
||||
[0] = {
|
||||
.start = SH_ETH0_BASE,
|
||||
.end = SH_ETH0_BASE + 0x1B8,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = SH_ETH0_IRQ,
|
||||
.end = SH_ETH0_IRQ,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh_eth0_device = {
|
||||
.name = "sh771x-ether",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = PHY_ID,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sh_eth0_resources),
|
||||
.resource = sh_eth0_resources,
|
||||
};
|
||||
|
||||
static struct resource sh_eth1_resources[] = {
|
||||
[0] = {
|
||||
.start = SH_ETH1_BASE,
|
||||
.end = SH_ETH1_BASE + 0x1B8,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = SH_ETH1_IRQ,
|
||||
.end = SH_ETH1_IRQ,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh_eth1_device = {
|
||||
.name = "sh771x-ether",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = PHY_ID,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sh_eth1_resources),
|
||||
.resource = sh_eth1_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct platform_device *se_devices[] __initdata = {
|
||||
&heartbeat_device,
|
||||
&cf_ide_device,
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
&sh_eth0_device,
|
||||
&sh_eth1_device,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init se_devices_setup(void)
|
||||
{
|
||||
mrshpc_setup_windows();
|
||||
return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
|
||||
}
|
||||
device_initcall(se_devices_setup);
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
static struct sh_machine_vector mv_se __initmv = {
|
||||
.mv_name = "SolutionEngine",
|
||||
.mv_setup = smsc_setup,
|
||||
.mv_init_irq = init_se_IRQ,
|
||||
};
|
||||
1
arch/sh/boards/mach-se/7721/Makefile
Normal file
1
arch/sh/boards/mach-se/7721/Makefile
Normal file
|
|
@ -0,0 +1 @@
|
|||
obj-y := setup.o irq.o
|
||||
45
arch/sh/boards/mach-se/7721/irq.c
Normal file
45
arch/sh/boards/mach-se/7721/irq.c
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7721/irq.c
|
||||
*
|
||||
* Copyright (C) 2008 Renesas Solutions Corp.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach-se/mach/se7721.h>
|
||||
|
||||
enum {
|
||||
UNUSED = 0,
|
||||
|
||||
/* board specific interrupt sources */
|
||||
MRSHPC,
|
||||
};
|
||||
|
||||
static struct intc_vect vectors[] __initdata = {
|
||||
INTC_IRQ(MRSHPC, MRSHPC_IRQ0),
|
||||
};
|
||||
|
||||
static struct intc_prio_reg prio_registers[] __initdata = {
|
||||
{ FPGA_ILSR6, 0, 8, 4, /* IRLMSK */
|
||||
{ 0, MRSHPC } },
|
||||
};
|
||||
|
||||
static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
|
||||
NULL, NULL, prio_registers, NULL);
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_se7721_IRQ(void)
|
||||
{
|
||||
/* PPCR */
|
||||
__raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
|
||||
|
||||
register_intc_controller(&intc_desc);
|
||||
intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
|
||||
}
|
||||
96
arch/sh/boards/mach-se/7721/setup.c
Normal file
96
arch/sh/boards/mach-se/7721/setup.c
Normal file
|
|
@ -0,0 +1,96 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7721/setup.c
|
||||
*
|
||||
* Copyright (C) 2008 Renesas Solutions Corp.
|
||||
*
|
||||
* Hitachi UL SolutionEngine 7721 Support.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <mach-se/mach/se7721.h>
|
||||
#include <mach-se/mach/mrshpc.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
||||
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
|
||||
|
||||
static struct heartbeat_data heartbeat_data = {
|
||||
.bit_pos = heartbeat_bit_pos,
|
||||
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
|
||||
};
|
||||
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &heartbeat_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
static struct resource cf_ide_resources[] = {
|
||||
[0] = {
|
||||
.start = PA_MRSHPC_IO + 0x1f0,
|
||||
.end = PA_MRSHPC_IO + 0x1f0 + 8 ,
|
||||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[1] = {
|
||||
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
|
||||
.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
|
||||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[2] = {
|
||||
.start = MRSHPC_IRQ0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device cf_ide_device = {
|
||||
.name = "pata_platform",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(cf_ide_resources),
|
||||
.resource = cf_ide_resources,
|
||||
};
|
||||
|
||||
static struct platform_device *se7721_devices[] __initdata = {
|
||||
&cf_ide_device,
|
||||
&heartbeat_device
|
||||
};
|
||||
|
||||
static int __init se7721_devices_setup(void)
|
||||
{
|
||||
mrshpc_setup_windows();
|
||||
return platform_add_devices(se7721_devices, ARRAY_SIZE(se7721_devices));
|
||||
}
|
||||
device_initcall(se7721_devices_setup);
|
||||
|
||||
static void __init se7721_setup(char **cmdline_p)
|
||||
{
|
||||
/* for USB */
|
||||
__raw_writew(0x0000, 0xA405010C); /* PGCR */
|
||||
__raw_writew(0x0000, 0xA405010E); /* PHCR */
|
||||
__raw_writew(0x00AA, 0xA4050118); /* PPCR */
|
||||
__raw_writew(0x0000, 0xA4050124); /* PSELA */
|
||||
}
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
struct sh_machine_vector mv_se7721 __initmv = {
|
||||
.mv_name = "Solution Engine 7721",
|
||||
.mv_setup = se7721_setup,
|
||||
.mv_init_irq = init_se7721_IRQ,
|
||||
};
|
||||
10
arch/sh/boards/mach-se/7722/Makefile
Normal file
10
arch/sh/boards/mach-se/7722/Makefile
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#
|
||||
# Makefile for the HITACHI UL SolutionEngine 7722 specific parts of the kernel
|
||||
#
|
||||
# This file is subject to the terms and conditions of the GNU General Public
|
||||
# License. See the file "COPYING" in the main directory of this archive
|
||||
# for more details.
|
||||
#
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o
|
||||
122
arch/sh/boards/mach-se/7722/irq.c
Normal file
122
arch/sh/boards/mach-se/7722/irq.c
Normal file
|
|
@ -0,0 +1,122 @@
|
|||
/*
|
||||
* Hitachi UL SolutionEngine 7722 FPGA IRQ Support.
|
||||
*
|
||||
* Copyright (C) 2007 Nobuhiro Iwamatsu
|
||||
* Copyright (C) 2012 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#define DRV_NAME "SE7722-FPGA"
|
||||
#define pr_fmt(fmt) DRV_NAME ": " fmt
|
||||
|
||||
#define irq_reg_readl ioread16
|
||||
#define irq_reg_writel iowrite16
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/err.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <mach-se/mach/se7722.h>
|
||||
|
||||
#define IRQ01_BASE_ADDR 0x11800000
|
||||
#define IRQ01_MODE_REG 0
|
||||
#define IRQ01_STS_REG 4
|
||||
#define IRQ01_MASK_REG 8
|
||||
|
||||
static void __iomem *se7722_irq_regs;
|
||||
struct irq_domain *se7722_irq_domain;
|
||||
|
||||
static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_data *data = irq_get_irq_data(irq);
|
||||
struct irq_chip *chip = irq_data_get_irq_chip(data);
|
||||
unsigned long mask;
|
||||
int bit;
|
||||
|
||||
chip->irq_mask_ack(data);
|
||||
|
||||
mask = ioread16(se7722_irq_regs + IRQ01_STS_REG);
|
||||
|
||||
for_each_set_bit(bit, &mask, SE7722_FPGA_IRQ_NR)
|
||||
generic_handle_irq(irq_linear_revmap(se7722_irq_domain, bit));
|
||||
|
||||
chip->irq_unmask(data);
|
||||
}
|
||||
|
||||
static void __init se7722_domain_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
se7722_irq_domain = irq_domain_add_linear(NULL, SE7722_FPGA_IRQ_NR,
|
||||
&irq_domain_simple_ops, NULL);
|
||||
if (unlikely(!se7722_irq_domain)) {
|
||||
printk("Failed to get IRQ domain\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
|
||||
int irq = irq_create_mapping(se7722_irq_domain, i);
|
||||
|
||||
if (unlikely(irq == 0)) {
|
||||
printk("Failed to allocate IRQ %d\n", i);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void __init se7722_gc_init(void)
|
||||
{
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
unsigned int irq_base;
|
||||
|
||||
irq_base = irq_linear_revmap(se7722_irq_domain, 0);
|
||||
|
||||
gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,
|
||||
handle_level_irq);
|
||||
if (unlikely(!gc))
|
||||
return;
|
||||
|
||||
ct = gc->chip_types;
|
||||
ct->chip.irq_mask = irq_gc_mask_set_bit;
|
||||
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
|
||||
|
||||
ct->regs.mask = IRQ01_MASK_REG;
|
||||
|
||||
irq_setup_generic_chip(gc, IRQ_MSK(SE7722_FPGA_IRQ_NR),
|
||||
IRQ_GC_INIT_MASK_CACHE,
|
||||
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
|
||||
|
||||
irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux);
|
||||
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
|
||||
irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux);
|
||||
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize FPGA IRQs
|
||||
*/
|
||||
void __init init_se7722_IRQ(void)
|
||||
{
|
||||
se7722_irq_regs = ioremap(IRQ01_BASE_ADDR, SZ_16);
|
||||
if (unlikely(!se7722_irq_regs)) {
|
||||
printk("Failed to remap IRQ01 regs\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* All FPGA IRQs disabled by default
|
||||
*/
|
||||
iowrite16(0, se7722_irq_regs + IRQ01_MASK_REG);
|
||||
|
||||
__raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
|
||||
|
||||
se7722_domain_init();
|
||||
se7722_gc_init();
|
||||
}
|
||||
194
arch/sh/boards/mach-se/7722/setup.c
Normal file
194
arch/sh/boards/mach-se/7722/setup.c
Normal file
|
|
@ -0,0 +1,194 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7722/setup.c
|
||||
*
|
||||
* Copyright (C) 2007 Nobuhiro Iwamatsu
|
||||
* Copyright (C) 2012 Paul Mundt
|
||||
*
|
||||
* Hitachi UL SolutionEngine 7722 Support.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/sh_keysc.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <mach-se/mach/se7722.h>
|
||||
#include <mach-se/mach/mrshpc.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/clock.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/heartbeat.h>
|
||||
#include <cpu/sh7722.h>
|
||||
|
||||
/* Heartbeat */
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
/* SMC91x */
|
||||
static struct smc91x_platdata smc91x_info = {
|
||||
.flags = SMC91X_USE_16BIT,
|
||||
};
|
||||
|
||||
static struct resource smc91x_eth_resources[] = {
|
||||
[0] = {
|
||||
.name = "smc91x-regs" ,
|
||||
.start = PA_LAN + 0x300,
|
||||
.end = PA_LAN + 0x300 + 0x10 ,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
/* Filled in later */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_eth_device = {
|
||||
.name = "smc91x",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = NULL, /* don't use dma */
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &smc91x_info,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
|
||||
.resource = smc91x_eth_resources,
|
||||
};
|
||||
|
||||
static struct resource cf_ide_resources[] = {
|
||||
[0] = {
|
||||
.start = PA_MRSHPC_IO + 0x1f0,
|
||||
.end = PA_MRSHPC_IO + 0x1f0 + 8 ,
|
||||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[1] = {
|
||||
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
|
||||
.end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
|
||||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[2] = {
|
||||
/* Filled in later */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device cf_ide_device = {
|
||||
.name = "pata_platform",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(cf_ide_resources),
|
||||
.resource = cf_ide_resources,
|
||||
};
|
||||
|
||||
static struct sh_keysc_info sh_keysc_info = {
|
||||
.mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
|
||||
.scan_timing = 3,
|
||||
.delay = 5,
|
||||
.keycodes = { /* SW1 -> SW30 */
|
||||
KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
|
||||
KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
|
||||
KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
|
||||
KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
|
||||
KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
|
||||
KEY_Z,
|
||||
KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource sh_keysc_resources[] = {
|
||||
[0] = {
|
||||
.start = 0x044b0000,
|
||||
.end = 0x044b000f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh_keysc_device = {
|
||||
.name = "sh_keysc",
|
||||
.id = 0, /* "keysc0" clock */
|
||||
.num_resources = ARRAY_SIZE(sh_keysc_resources),
|
||||
.resource = sh_keysc_resources,
|
||||
.dev = {
|
||||
.platform_data = &sh_keysc_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *se7722_devices[] __initdata = {
|
||||
&heartbeat_device,
|
||||
&smc91x_eth_device,
|
||||
&cf_ide_device,
|
||||
&sh_keysc_device,
|
||||
};
|
||||
|
||||
static int __init se7722_devices_setup(void)
|
||||
{
|
||||
mrshpc_setup_windows();
|
||||
|
||||
/* Wire-up dynamic vectors */
|
||||
cf_ide_resources[2].start = cf_ide_resources[2].end =
|
||||
irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
|
||||
|
||||
smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
|
||||
irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
|
||||
|
||||
return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
|
||||
}
|
||||
device_initcall(se7722_devices_setup);
|
||||
|
||||
static void __init se7722_setup(char **cmdline_p)
|
||||
{
|
||||
__raw_writew(0x010D, FPGA_OUT); /* FPGA */
|
||||
|
||||
__raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
|
||||
__raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
|
||||
|
||||
/* LCDC I/O */
|
||||
__raw_writew(0x0020, PORT_PSELD);
|
||||
|
||||
/* SIOF1*/
|
||||
__raw_writew(0x0003, PORT_PSELB);
|
||||
__raw_writew(0xe000, PORT_PSELC);
|
||||
__raw_writew(0x0000, PORT_PKCR);
|
||||
|
||||
/* LCDC */
|
||||
__raw_writew(0x4020, PORT_PHCR);
|
||||
__raw_writew(0x0000, PORT_PLCR);
|
||||
__raw_writew(0x0000, PORT_PMCR);
|
||||
__raw_writew(0x0002, PORT_PRCR);
|
||||
__raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
|
||||
|
||||
/* KEYSC */
|
||||
__raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
|
||||
__raw_writew(0x0000, PORT_PYCR);
|
||||
__raw_writew(0x0000, PORT_PZCR);
|
||||
__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
|
||||
__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
|
||||
}
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
static struct sh_machine_vector mv_se7722 __initmv = {
|
||||
.mv_name = "Solution Engine 7722" ,
|
||||
.mv_setup = se7722_setup ,
|
||||
.mv_init_irq = init_se7722_IRQ,
|
||||
};
|
||||
10
arch/sh/boards/mach-se/7724/Makefile
Normal file
10
arch/sh/boards/mach-se/7724/Makefile
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#
|
||||
# Makefile for the HITACHI UL SolutionEngine 7724 specific parts of the kernel
|
||||
#
|
||||
# This file is subject to the terms and conditions of the GNU General Public
|
||||
# License. See the file "COPYING" in the main directory of this archive
|
||||
# for more details.
|
||||
#
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o sdram.o
|
||||
145
arch/sh/boards/mach-se/7724/irq.c
Normal file
145
arch/sh/boards/mach-se/7724/irq.c
Normal file
|
|
@ -0,0 +1,145 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7724/irq.c
|
||||
*
|
||||
* Copyright (C) 2009 Renesas Solutions Corp.
|
||||
*
|
||||
* Kuninori Morimoto <morimoto.kuninori@renesas.com>
|
||||
*
|
||||
* Based on linux/arch/sh/boards/se/7722/irq.c
|
||||
* Copyright (C) 2007 Nobuhiro Iwamatsu
|
||||
*
|
||||
* Hitachi UL SolutionEngine 7724 Support.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/topology.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/err.h>
|
||||
#include <mach-se/mach/se7724.h>
|
||||
|
||||
struct fpga_irq {
|
||||
unsigned long sraddr;
|
||||
unsigned long mraddr;
|
||||
unsigned short mask;
|
||||
unsigned int base;
|
||||
};
|
||||
|
||||
static unsigned int fpga2irq(unsigned int irq)
|
||||
{
|
||||
if (irq >= IRQ0_BASE &&
|
||||
irq <= IRQ0_END)
|
||||
return IRQ0_IRQ;
|
||||
else if (irq >= IRQ1_BASE &&
|
||||
irq <= IRQ1_END)
|
||||
return IRQ1_IRQ;
|
||||
else
|
||||
return IRQ2_IRQ;
|
||||
}
|
||||
|
||||
static struct fpga_irq get_fpga_irq(unsigned int irq)
|
||||
{
|
||||
struct fpga_irq set;
|
||||
|
||||
switch (irq) {
|
||||
case IRQ0_IRQ:
|
||||
set.sraddr = IRQ0_SR;
|
||||
set.mraddr = IRQ0_MR;
|
||||
set.mask = IRQ0_MASK;
|
||||
set.base = IRQ0_BASE;
|
||||
break;
|
||||
case IRQ1_IRQ:
|
||||
set.sraddr = IRQ1_SR;
|
||||
set.mraddr = IRQ1_MR;
|
||||
set.mask = IRQ1_MASK;
|
||||
set.base = IRQ1_BASE;
|
||||
break;
|
||||
default:
|
||||
set.sraddr = IRQ2_SR;
|
||||
set.mraddr = IRQ2_MR;
|
||||
set.mask = IRQ2_MASK;
|
||||
set.base = IRQ2_BASE;
|
||||
break;
|
||||
}
|
||||
|
||||
return set;
|
||||
}
|
||||
|
||||
static void disable_se7724_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
|
||||
unsigned int bit = irq - set.base;
|
||||
__raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
|
||||
}
|
||||
|
||||
static void enable_se7724_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
|
||||
unsigned int bit = irq - set.base;
|
||||
__raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
|
||||
}
|
||||
|
||||
static struct irq_chip se7724_irq_chip __read_mostly = {
|
||||
.name = "SE7724-FPGA",
|
||||
.irq_mask = disable_se7724_irq,
|
||||
.irq_unmask = enable_se7724_irq,
|
||||
};
|
||||
|
||||
static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct fpga_irq set = get_fpga_irq(irq);
|
||||
unsigned short intv = __raw_readw(set.sraddr);
|
||||
unsigned int ext_irq = set.base;
|
||||
|
||||
intv &= set.mask;
|
||||
|
||||
for (; intv; intv >>= 1, ext_irq++) {
|
||||
if (!(intv & 1))
|
||||
continue;
|
||||
|
||||
generic_handle_irq(ext_irq);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_se7724_IRQ(void)
|
||||
{
|
||||
int irq_base, i;
|
||||
|
||||
__raw_writew(0xffff, IRQ0_MR); /* mask all */
|
||||
__raw_writew(0xffff, IRQ1_MR); /* mask all */
|
||||
__raw_writew(0xffff, IRQ2_MR); /* mask all */
|
||||
__raw_writew(0x0000, IRQ0_SR); /* clear irq */
|
||||
__raw_writew(0x0000, IRQ1_SR); /* clear irq */
|
||||
__raw_writew(0x0000, IRQ2_SR); /* clear irq */
|
||||
__raw_writew(0x002a, IRQ_MODE); /* set irq type */
|
||||
|
||||
irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE,
|
||||
SE7724_FPGA_IRQ_NR, numa_node_id());
|
||||
if (IS_ERR_VALUE(irq_base)) {
|
||||
pr_err("%s: failed hooking irqs for FPGA\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < SE7724_FPGA_IRQ_NR; i++)
|
||||
irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip,
|
||||
handle_level_irq, "level");
|
||||
|
||||
irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux);
|
||||
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
|
||||
irq_set_chained_handler(IRQ1_IRQ, se7724_irq_demux);
|
||||
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
|
||||
irq_set_chained_handler(IRQ2_IRQ, se7724_irq_demux);
|
||||
irq_set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW);
|
||||
}
|
||||
131
arch/sh/boards/mach-se/7724/sdram.S
Normal file
131
arch/sh/boards/mach-se/7724/sdram.S
Normal file
|
|
@ -0,0 +1,131 @@
|
|||
/*
|
||||
* MS7724SE sdram self/auto-refresh setup code
|
||||
*
|
||||
* Copyright (C) 2009 Magnus Damm
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/sys.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/suspend.h>
|
||||
#include <asm/romimage-macros.h>
|
||||
|
||||
/* code to enter and leave self-refresh. must be self-contained.
|
||||
* this code will be copied to on-chip memory and executed from there.
|
||||
*/
|
||||
.balign 4
|
||||
ENTRY(ms7724se_sdram_enter_start)
|
||||
|
||||
/* DBSC: put memory in self-refresh mode */
|
||||
|
||||
ED 0xFD000010, 0x00000000 /* DBEN */
|
||||
ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
|
||||
ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
|
||||
ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
|
||||
ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
|
||||
|
||||
rts
|
||||
nop
|
||||
|
||||
ENTRY(ms7724se_sdram_enter_end)
|
||||
|
||||
.balign 4
|
||||
ENTRY(ms7724se_sdram_leave_start)
|
||||
|
||||
/* DBSC: put memory in auto-refresh mode */
|
||||
|
||||
mov.l @(SH_SLEEP_MODE, r5), r0
|
||||
tst #SUSP_SH_RSTANDBY, r0
|
||||
bf resume_rstandby
|
||||
|
||||
ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
|
||||
WAIT 1
|
||||
ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
|
||||
ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
|
||||
ED 0xFD000010, 0x00000001 /* DBEN */
|
||||
ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
|
||||
|
||||
rts
|
||||
nop
|
||||
|
||||
resume_rstandby:
|
||||
|
||||
/* CPG: setup clocks before restarting external memory */
|
||||
|
||||
ED 0xA4150024, 0x00004000 /* PLLCR */
|
||||
|
||||
mov.l FRQCRA,r0
|
||||
mov.l @r0,r3
|
||||
mov.l KICK,r1
|
||||
or r1, r3
|
||||
mov.l r3, @r0
|
||||
|
||||
mov.l LSTATS,r0
|
||||
mov #1,r1
|
||||
WAIT_LSTATS:
|
||||
mov.l @r0,r3
|
||||
tst r1,r3
|
||||
bf WAIT_LSTATS
|
||||
|
||||
/* DBSC: re-initialize and put in auto-refresh */
|
||||
|
||||
ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
|
||||
ED 0xFD000020, 0x015B0002 /* DBCONF */
|
||||
ED 0xFD000030, 0x03071502 /* DBTR0 */
|
||||
ED 0xFD000034, 0x02020102 /* DBTR1 */
|
||||
ED 0xFD000038, 0x01090405 /* DBTR2 */
|
||||
ED 0xFD00003C, 0x00000002 /* DBTR3 */
|
||||
ED 0xFD000008, 0x00000005 /* DBKIND */
|
||||
ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
|
||||
ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
|
||||
ED 0xFD000018, 0x00000001 /* DBCKECNT */
|
||||
|
||||
mov #100,r0
|
||||
WAIT_400NS:
|
||||
dt r0
|
||||
bf WAIT_400NS
|
||||
|
||||
ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
|
||||
ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
|
||||
ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
|
||||
ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
|
||||
ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
|
||||
ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
|
||||
ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
|
||||
ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
|
||||
ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
|
||||
ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
|
||||
ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
|
||||
|
||||
mov #100,r0
|
||||
WAIT_400NS_2:
|
||||
dt r0
|
||||
bf WAIT_400NS_2
|
||||
|
||||
ED 0xFD000010, 0x00000001 /* DBEN */
|
||||
ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
|
||||
ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
|
||||
|
||||
mov.l DUMMY,r0
|
||||
mov.l @r0, r1 /* force single dummy read */
|
||||
|
||||
ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
|
||||
ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
|
||||
ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
|
||||
ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
|
||||
|
||||
rts
|
||||
nop
|
||||
|
||||
.balign 4
|
||||
DUMMY: .long 0xac400000
|
||||
FRQCRA: .long 0xa4150000
|
||||
KICK: .long 0x80000000
|
||||
LSTATS: .long 0xa4150060
|
||||
|
||||
ENTRY(ms7724se_sdram_leave_end)
|
||||
946
arch/sh/boards/mach-se/7724/setup.c
Normal file
946
arch/sh/boards/mach-se/7724/setup.c
Normal file
|
|
@ -0,0 +1,946 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7724/setup.c
|
||||
*
|
||||
* Copyright (C) 2009 Renesas Solutions Corp.
|
||||
*
|
||||
* Kuninori Morimoto <morimoto.kuninori@renesas.com>
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/mmc/sh_mobile_sdhi.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/sh_keysc.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <video/sh_mobile_lcdc.h>
|
||||
#include <media/sh_mobile_ceu.h>
|
||||
#include <sound/sh_fsi.h>
|
||||
#include <sound/simple_card.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/heartbeat.h>
|
||||
#include <asm/clock.h>
|
||||
#include <asm/suspend.h>
|
||||
#include <cpu/sh7724.h>
|
||||
#include <mach-se/mach/se7724.h>
|
||||
|
||||
/*
|
||||
* SWx 1234 5678
|
||||
* ------------------------------------
|
||||
* SW31 : 1001 1100 : default
|
||||
* SW32 : 0111 1111 : use on board flash
|
||||
*
|
||||
* SW41 : abxx xxxx -> a = 0 : Analog monitor
|
||||
* 1 : Digital monitor
|
||||
* b = 0 : VGA
|
||||
* 1 : 720p
|
||||
*/
|
||||
|
||||
/*
|
||||
* about 720p
|
||||
*
|
||||
* When you use 1280 x 720 lcdc output,
|
||||
* you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
|
||||
* and change SW41 to use 720p
|
||||
*/
|
||||
|
||||
/*
|
||||
* about sound
|
||||
*
|
||||
* This setup.c supports FSI slave mode.
|
||||
* Please change J20, J21, J22 pin to 1-2 connection.
|
||||
*/
|
||||
|
||||
/* Heartbeat */
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
/* LAN91C111 */
|
||||
static struct smc91x_platdata smc91x_info = {
|
||||
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
|
||||
};
|
||||
|
||||
static struct resource smc91x_eth_resources[] = {
|
||||
[0] = {
|
||||
.name = "SMC91C111" ,
|
||||
.start = 0x1a300300,
|
||||
.end = 0x1a30030f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ0_SMC,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_eth_device = {
|
||||
.name = "smc91x",
|
||||
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
|
||||
.resource = smc91x_eth_resources,
|
||||
.dev = {
|
||||
.platform_data = &smc91x_info,
|
||||
},
|
||||
};
|
||||
|
||||
/* MTD */
|
||||
static struct mtd_partition nor_flash_partitions[] = {
|
||||
{
|
||||
.name = "uboot",
|
||||
.offset = 0,
|
||||
.size = (1 * 1024 * 1024),
|
||||
.mask_flags = MTD_WRITEABLE, /* Read-only */
|
||||
}, {
|
||||
.name = "kernel",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = (2 * 1024 * 1024),
|
||||
}, {
|
||||
.name = "free-area",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data nor_flash_data = {
|
||||
.width = 2,
|
||||
.parts = nor_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(nor_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource nor_flash_resources[] = {
|
||||
[0] = {
|
||||
.name = "NOR Flash",
|
||||
.start = 0x00000000,
|
||||
.end = 0x01ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device nor_flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.resource = nor_flash_resources,
|
||||
.num_resources = ARRAY_SIZE(nor_flash_resources),
|
||||
.dev = {
|
||||
.platform_data = &nor_flash_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* LCDC */
|
||||
static const struct fb_videomode lcdc_720p_modes[] = {
|
||||
{
|
||||
.name = "LB070WV1",
|
||||
.sync = 0, /* hsync and vsync are active low */
|
||||
.xres = 1280,
|
||||
.yres = 720,
|
||||
.left_margin = 220,
|
||||
.right_margin = 110,
|
||||
.hsync_len = 40,
|
||||
.upper_margin = 20,
|
||||
.lower_margin = 5,
|
||||
.vsync_len = 5,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct fb_videomode lcdc_vga_modes[] = {
|
||||
{
|
||||
.name = "LB070WV1",
|
||||
.sync = 0, /* hsync and vsync are active low */
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.left_margin = 105,
|
||||
.right_margin = 50,
|
||||
.hsync_len = 96,
|
||||
.upper_margin = 33,
|
||||
.lower_margin = 10,
|
||||
.vsync_len = 2,
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mobile_lcdc_info lcdc_info = {
|
||||
.clock_source = LCDC_CLK_EXTERNAL,
|
||||
.ch[0] = {
|
||||
.chan = LCDC_CHAN_MAINLCD,
|
||||
.fourcc = V4L2_PIX_FMT_RGB565,
|
||||
.clock_divider = 1,
|
||||
.panel_cfg = { /* 7.0 inch */
|
||||
.width = 152,
|
||||
.height = 91,
|
||||
},
|
||||
}
|
||||
};
|
||||
|
||||
static struct resource lcdc_resources[] = {
|
||||
[0] = {
|
||||
.name = "LCDC",
|
||||
.start = 0xfe940000,
|
||||
.end = 0xfe942fff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xf40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device lcdc_device = {
|
||||
.name = "sh_mobile_lcdc_fb",
|
||||
.num_resources = ARRAY_SIZE(lcdc_resources),
|
||||
.resource = lcdc_resources,
|
||||
.dev = {
|
||||
.platform_data = &lcdc_info,
|
||||
},
|
||||
};
|
||||
|
||||
/* CEU0 */
|
||||
static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
|
||||
.flags = SH_CEU_FLAG_USE_8BIT_BUS,
|
||||
};
|
||||
|
||||
static struct resource ceu0_resources[] = {
|
||||
[0] = {
|
||||
.name = "CEU0",
|
||||
.start = 0xfe910000,
|
||||
.end = 0xfe91009f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
/* place holder for contiguous memory */
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device ceu0_device = {
|
||||
.name = "sh_mobile_ceu",
|
||||
.id = 0, /* "ceu0" clock */
|
||||
.num_resources = ARRAY_SIZE(ceu0_resources),
|
||||
.resource = ceu0_resources,
|
||||
.dev = {
|
||||
.platform_data = &sh_mobile_ceu0_info,
|
||||
},
|
||||
};
|
||||
|
||||
/* CEU1 */
|
||||
static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
|
||||
.flags = SH_CEU_FLAG_USE_8BIT_BUS,
|
||||
};
|
||||
|
||||
static struct resource ceu1_resources[] = {
|
||||
[0] = {
|
||||
.name = "CEU1",
|
||||
.start = 0xfe914000,
|
||||
.end = 0xfe91409f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x9e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
/* place holder for contiguous memory */
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device ceu1_device = {
|
||||
.name = "sh_mobile_ceu",
|
||||
.id = 1, /* "ceu1" clock */
|
||||
.num_resources = ARRAY_SIZE(ceu1_resources),
|
||||
.resource = ceu1_resources,
|
||||
.dev = {
|
||||
.platform_data = &sh_mobile_ceu1_info,
|
||||
},
|
||||
};
|
||||
|
||||
/* FSI */
|
||||
/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
|
||||
static struct resource fsi_resources[] = {
|
||||
[0] = {
|
||||
.name = "FSI",
|
||||
.start = 0xFE3C0000,
|
||||
.end = 0xFE3C021d,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xf80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device fsi_device = {
|
||||
.name = "sh_fsi",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(fsi_resources),
|
||||
.resource = fsi_resources,
|
||||
};
|
||||
|
||||
static struct asoc_simple_card_info fsi_ak4642_info = {
|
||||
.name = "AK4642",
|
||||
.card = "FSIA-AK4642",
|
||||
.codec = "ak4642-codec.0-0012",
|
||||
.platform = "sh_fsi.0",
|
||||
.daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
|
||||
.cpu_dai = {
|
||||
.name = "fsia-dai",
|
||||
},
|
||||
.codec_dai = {
|
||||
.name = "ak4642-hifi",
|
||||
.sysclk = 11289600,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device fsi_ak4642_device = {
|
||||
.name = "asoc-simple-card",
|
||||
.dev = {
|
||||
.platform_data = &fsi_ak4642_info,
|
||||
},
|
||||
};
|
||||
|
||||
/* KEYSC in SoC (Needs SW33-2 set to ON) */
|
||||
static struct sh_keysc_info keysc_info = {
|
||||
.mode = SH_KEYSC_MODE_1,
|
||||
.scan_timing = 3,
|
||||
.delay = 50,
|
||||
.keycodes = {
|
||||
KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
|
||||
KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
|
||||
KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
|
||||
KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
|
||||
KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
|
||||
KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource keysc_resources[] = {
|
||||
[0] = {
|
||||
.name = "KEYSC",
|
||||
.start = 0x044b0000,
|
||||
.end = 0x044b000f,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device keysc_device = {
|
||||
.name = "sh_keysc",
|
||||
.id = 0, /* "keysc0" clock */
|
||||
.num_resources = ARRAY_SIZE(keysc_resources),
|
||||
.resource = keysc_resources,
|
||||
.dev = {
|
||||
.platform_data = &keysc_info,
|
||||
},
|
||||
};
|
||||
|
||||
/* SH Eth */
|
||||
static struct resource sh_eth_resources[] = {
|
||||
[0] = {
|
||||
.start = SH_ETH_ADDR,
|
||||
.end = SH_ETH_ADDR + 0x1FC - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xd60),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_eth_plat_data sh_eth_plat = {
|
||||
.phy = 0x1f, /* SMSC LAN8187 */
|
||||
.edmac_endian = EDMAC_LITTLE_ENDIAN,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
};
|
||||
|
||||
static struct platform_device sh_eth_device = {
|
||||
.name = "sh7724-ether",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &sh_eth_plat,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sh_eth_resources),
|
||||
.resource = sh_eth_resources,
|
||||
};
|
||||
|
||||
static struct r8a66597_platdata sh7724_usb0_host_data = {
|
||||
.on_chip = 1,
|
||||
};
|
||||
|
||||
static struct resource sh7724_usb0_host_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xa4d80000,
|
||||
.end = 0xa4d80124 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh7724_usb0_host_device = {
|
||||
.name = "r8a66597_hcd",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = NULL, /* not use dma */
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &sh7724_usb0_host_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
|
||||
.resource = sh7724_usb0_host_resources,
|
||||
};
|
||||
|
||||
static struct r8a66597_platdata sh7724_usb1_gadget_data = {
|
||||
.on_chip = 1,
|
||||
};
|
||||
|
||||
static struct resource sh7724_usb1_gadget_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xa4d90000,
|
||||
.end = 0xa4d90123,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xa40),
|
||||
.end = evt2irq(0xa40),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh7724_usb1_gadget_device = {
|
||||
.name = "r8a66597_udc",
|
||||
.id = 1, /* USB1 */
|
||||
.dev = {
|
||||
.dma_mask = NULL, /* not use dma */
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &sh7724_usb1_gadget_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
|
||||
.resource = sh7724_usb1_gadget_resources,
|
||||
};
|
||||
|
||||
/* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
|
||||
static struct regulator_consumer_supply fixed3v3_power_consumers[] =
|
||||
{
|
||||
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
|
||||
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
|
||||
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
|
||||
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
|
||||
};
|
||||
|
||||
static struct resource sdhi0_cn7_resources[] = {
|
||||
[0] = {
|
||||
.name = "SDHI0",
|
||||
.start = 0x04ce0000,
|
||||
.end = 0x04ce00ff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0xe80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
|
||||
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
|
||||
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
|
||||
.tmio_caps = MMC_CAP_SDIO_IRQ,
|
||||
};
|
||||
|
||||
static struct platform_device sdhi0_cn7_device = {
|
||||
.name = "sh_mobile_sdhi",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
|
||||
.resource = sdhi0_cn7_resources,
|
||||
.dev = {
|
||||
.platform_data = &sh7724_sdhi0_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource sdhi1_cn8_resources[] = {
|
||||
[0] = {
|
||||
.name = "SDHI1",
|
||||
.start = 0x04cf0000,
|
||||
.end = 0x04cf00ff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x4e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
|
||||
.dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
|
||||
.dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
|
||||
.tmio_caps = MMC_CAP_SDIO_IRQ,
|
||||
};
|
||||
|
||||
static struct platform_device sdhi1_cn8_device = {
|
||||
.name = "sh_mobile_sdhi",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
|
||||
.resource = sdhi1_cn8_resources,
|
||||
.dev = {
|
||||
.platform_data = &sh7724_sdhi1_data,
|
||||
},
|
||||
};
|
||||
|
||||
/* IrDA */
|
||||
static struct resource irda_resources[] = {
|
||||
[0] = {
|
||||
.name = "IrDA",
|
||||
.start = 0xA45D0000,
|
||||
.end = 0xA45D0049,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device irda_device = {
|
||||
.name = "sh_sir",
|
||||
.num_resources = ARRAY_SIZE(irda_resources),
|
||||
.resource = irda_resources,
|
||||
};
|
||||
|
||||
#include <media/ak881x.h>
|
||||
#include <media/sh_vou.h>
|
||||
|
||||
static struct ak881x_pdata ak881x_pdata = {
|
||||
.flags = AK881X_IF_MODE_SLAVE,
|
||||
};
|
||||
|
||||
static struct i2c_board_info ak8813 = {
|
||||
/* With open J18 jumper address is 0x21 */
|
||||
I2C_BOARD_INFO("ak8813", 0x20),
|
||||
.platform_data = &ak881x_pdata,
|
||||
};
|
||||
|
||||
static struct sh_vou_pdata sh_vou_pdata = {
|
||||
.bus_fmt = SH_VOU_BUS_8BIT,
|
||||
.flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
|
||||
.board_info = &ak8813,
|
||||
.i2c_adap = 0,
|
||||
};
|
||||
|
||||
static struct resource sh_vou_resources[] = {
|
||||
[0] = {
|
||||
.start = 0xfe960000,
|
||||
.end = 0xfe962043,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = evt2irq(0x8e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device vou_device = {
|
||||
.name = "sh-vou",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(sh_vou_resources),
|
||||
.resource = sh_vou_resources,
|
||||
.dev = {
|
||||
.platform_data = &sh_vou_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *ms7724se_devices[] __initdata = {
|
||||
&heartbeat_device,
|
||||
&smc91x_eth_device,
|
||||
&lcdc_device,
|
||||
&nor_flash_device,
|
||||
&ceu0_device,
|
||||
&ceu1_device,
|
||||
&keysc_device,
|
||||
&sh_eth_device,
|
||||
&sh7724_usb0_host_device,
|
||||
&sh7724_usb1_gadget_device,
|
||||
&fsi_device,
|
||||
&fsi_ak4642_device,
|
||||
&sdhi0_cn7_device,
|
||||
&sdhi1_cn8_device,
|
||||
&irda_device,
|
||||
&vou_device,
|
||||
};
|
||||
|
||||
/* I2C device */
|
||||
static struct i2c_board_info i2c0_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("ak4642", 0x12),
|
||||
},
|
||||
};
|
||||
|
||||
#define EEPROM_OP 0xBA206000
|
||||
#define EEPROM_ADR 0xBA206004
|
||||
#define EEPROM_DATA 0xBA20600C
|
||||
#define EEPROM_STAT 0xBA206010
|
||||
#define EEPROM_STRT 0xBA206014
|
||||
|
||||
static int __init sh_eth_is_eeprom_ready(void)
|
||||
{
|
||||
int t = 10000;
|
||||
|
||||
while (t--) {
|
||||
if (!__raw_readw(EEPROM_STAT))
|
||||
return 1;
|
||||
udelay(1);
|
||||
}
|
||||
|
||||
printk(KERN_ERR "ms7724se can not access to eeprom\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init sh_eth_init(void)
|
||||
{
|
||||
int i;
|
||||
u16 mac;
|
||||
|
||||
/* check EEPROM status */
|
||||
if (!sh_eth_is_eeprom_ready())
|
||||
return;
|
||||
|
||||
/* read MAC addr from EEPROM */
|
||||
for (i = 0 ; i < 3 ; i++) {
|
||||
__raw_writew(0x0, EEPROM_OP); /* read */
|
||||
__raw_writew(i*2, EEPROM_ADR);
|
||||
__raw_writew(0x1, EEPROM_STRT);
|
||||
if (!sh_eth_is_eeprom_ready())
|
||||
return;
|
||||
|
||||
mac = __raw_readw(EEPROM_DATA);
|
||||
sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
|
||||
sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
|
||||
}
|
||||
}
|
||||
|
||||
#define SW4140 0xBA201000
|
||||
#define FPGA_OUT 0xBA200400
|
||||
#define PORT_HIZA 0xA4050158
|
||||
#define PORT_MSELCRB 0xA4050182
|
||||
|
||||
#define SW41_A 0x0100
|
||||
#define SW41_B 0x0200
|
||||
#define SW41_C 0x0400
|
||||
#define SW41_D 0x0800
|
||||
#define SW41_E 0x1000
|
||||
#define SW41_F 0x2000
|
||||
#define SW41_G 0x4000
|
||||
#define SW41_H 0x8000
|
||||
|
||||
extern char ms7724se_sdram_enter_start;
|
||||
extern char ms7724se_sdram_enter_end;
|
||||
extern char ms7724se_sdram_leave_start;
|
||||
extern char ms7724se_sdram_leave_end;
|
||||
|
||||
static int __init arch_setup(void)
|
||||
{
|
||||
/* enable I2C device */
|
||||
i2c_register_board_info(0, i2c0_devices,
|
||||
ARRAY_SIZE(i2c0_devices));
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(arch_setup);
|
||||
|
||||
static int __init devices_setup(void)
|
||||
{
|
||||
u16 sw = __raw_readw(SW4140); /* select camera, monitor */
|
||||
struct clk *clk;
|
||||
u16 fpga_out;
|
||||
|
||||
/* register board specific self-refresh code */
|
||||
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
|
||||
SUSP_SH_RSTANDBY,
|
||||
&ms7724se_sdram_enter_start,
|
||||
&ms7724se_sdram_enter_end,
|
||||
&ms7724se_sdram_leave_start,
|
||||
&ms7724se_sdram_leave_end);
|
||||
|
||||
regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
|
||||
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
|
||||
|
||||
/* Reset Release */
|
||||
fpga_out = __raw_readw(FPGA_OUT);
|
||||
/* bit4: NTSC_PDN, bit5: NTSC_RESET */
|
||||
fpga_out &= ~((1 << 1) | /* LAN */
|
||||
(1 << 4) | /* AK8813 PDN */
|
||||
(1 << 5) | /* AK8813 RESET */
|
||||
(1 << 6) | /* VIDEO DAC */
|
||||
(1 << 7) | /* AK4643 */
|
||||
(1 << 8) | /* IrDA */
|
||||
(1 << 12) | /* USB0 */
|
||||
(1 << 14)); /* RMII */
|
||||
__raw_writew(fpga_out | (1 << 4), FPGA_OUT);
|
||||
|
||||
udelay(10);
|
||||
|
||||
/* AK8813 RESET */
|
||||
__raw_writew(fpga_out | (1 << 5), FPGA_OUT);
|
||||
|
||||
udelay(10);
|
||||
|
||||
__raw_writew(fpga_out, FPGA_OUT);
|
||||
|
||||
/* turn on USB clocks, use external clock */
|
||||
__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
|
||||
|
||||
/* Let LED9 show STATUS2 */
|
||||
gpio_request(GPIO_FN_STATUS2, NULL);
|
||||
|
||||
/* Lit LED10 show STATUS0 */
|
||||
gpio_request(GPIO_FN_STATUS0, NULL);
|
||||
|
||||
/* Lit LED11 show PDSTATUS */
|
||||
gpio_request(GPIO_FN_PDSTATUS, NULL);
|
||||
|
||||
/* enable USB0 port */
|
||||
__raw_writew(0x0600, 0xa40501d4);
|
||||
|
||||
/* enable USB1 port */
|
||||
__raw_writew(0x0600, 0xa4050192);
|
||||
|
||||
/* enable IRQ 0,1,2 */
|
||||
gpio_request(GPIO_FN_INTC_IRQ0, NULL);
|
||||
gpio_request(GPIO_FN_INTC_IRQ1, NULL);
|
||||
gpio_request(GPIO_FN_INTC_IRQ2, NULL);
|
||||
|
||||
/* enable SCIFA3 */
|
||||
gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
|
||||
gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
|
||||
gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
|
||||
gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
|
||||
gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
|
||||
|
||||
/* enable LCDC */
|
||||
gpio_request(GPIO_FN_LCDD23, NULL);
|
||||
gpio_request(GPIO_FN_LCDD22, NULL);
|
||||
gpio_request(GPIO_FN_LCDD21, NULL);
|
||||
gpio_request(GPIO_FN_LCDD20, NULL);
|
||||
gpio_request(GPIO_FN_LCDD19, NULL);
|
||||
gpio_request(GPIO_FN_LCDD18, NULL);
|
||||
gpio_request(GPIO_FN_LCDD17, NULL);
|
||||
gpio_request(GPIO_FN_LCDD16, NULL);
|
||||
gpio_request(GPIO_FN_LCDD15, NULL);
|
||||
gpio_request(GPIO_FN_LCDD14, NULL);
|
||||
gpio_request(GPIO_FN_LCDD13, NULL);
|
||||
gpio_request(GPIO_FN_LCDD12, NULL);
|
||||
gpio_request(GPIO_FN_LCDD11, NULL);
|
||||
gpio_request(GPIO_FN_LCDD10, NULL);
|
||||
gpio_request(GPIO_FN_LCDD9, NULL);
|
||||
gpio_request(GPIO_FN_LCDD8, NULL);
|
||||
gpio_request(GPIO_FN_LCDD7, NULL);
|
||||
gpio_request(GPIO_FN_LCDD6, NULL);
|
||||
gpio_request(GPIO_FN_LCDD5, NULL);
|
||||
gpio_request(GPIO_FN_LCDD4, NULL);
|
||||
gpio_request(GPIO_FN_LCDD3, NULL);
|
||||
gpio_request(GPIO_FN_LCDD2, NULL);
|
||||
gpio_request(GPIO_FN_LCDD1, NULL);
|
||||
gpio_request(GPIO_FN_LCDD0, NULL);
|
||||
gpio_request(GPIO_FN_LCDDISP, NULL);
|
||||
gpio_request(GPIO_FN_LCDHSYN, NULL);
|
||||
gpio_request(GPIO_FN_LCDDCK, NULL);
|
||||
gpio_request(GPIO_FN_LCDVSYN, NULL);
|
||||
gpio_request(GPIO_FN_LCDDON, NULL);
|
||||
gpio_request(GPIO_FN_LCDVEPWC, NULL);
|
||||
gpio_request(GPIO_FN_LCDVCPWC, NULL);
|
||||
gpio_request(GPIO_FN_LCDRD, NULL);
|
||||
gpio_request(GPIO_FN_LCDLCLK, NULL);
|
||||
__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
|
||||
|
||||
/* enable CEU0 */
|
||||
gpio_request(GPIO_FN_VIO0_D15, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D14, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D13, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D12, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D11, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D10, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D9, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D8, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D7, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D6, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D5, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D4, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D3, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D2, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D1, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_D0, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_VD, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_CLK, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_FLD, NULL);
|
||||
gpio_request(GPIO_FN_VIO0_HD, NULL);
|
||||
platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
|
||||
|
||||
/* enable CEU1 */
|
||||
gpio_request(GPIO_FN_VIO1_D7, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D6, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D5, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D4, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D3, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D2, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D1, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_D0, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_FLD, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_HD, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_VD, NULL);
|
||||
gpio_request(GPIO_FN_VIO1_CLK, NULL);
|
||||
platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
|
||||
|
||||
/* KEYSC */
|
||||
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
|
||||
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
|
||||
gpio_request(GPIO_FN_KEYIN4, NULL);
|
||||
gpio_request(GPIO_FN_KEYIN3, NULL);
|
||||
gpio_request(GPIO_FN_KEYIN2, NULL);
|
||||
gpio_request(GPIO_FN_KEYIN1, NULL);
|
||||
gpio_request(GPIO_FN_KEYIN0, NULL);
|
||||
gpio_request(GPIO_FN_KEYOUT3, NULL);
|
||||
gpio_request(GPIO_FN_KEYOUT2, NULL);
|
||||
gpio_request(GPIO_FN_KEYOUT1, NULL);
|
||||
gpio_request(GPIO_FN_KEYOUT0, NULL);
|
||||
|
||||
/* enable FSI */
|
||||
gpio_request(GPIO_FN_FSIMCKA, NULL);
|
||||
gpio_request(GPIO_FN_FSIIASD, NULL);
|
||||
gpio_request(GPIO_FN_FSIOASD, NULL);
|
||||
gpio_request(GPIO_FN_FSIIABCK, NULL);
|
||||
gpio_request(GPIO_FN_FSIIALRCK, NULL);
|
||||
gpio_request(GPIO_FN_FSIOABCK, NULL);
|
||||
gpio_request(GPIO_FN_FSIOALRCK, NULL);
|
||||
gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
|
||||
|
||||
/* set SPU2 clock to 83.4 MHz */
|
||||
clk = clk_get(NULL, "spu_clk");
|
||||
if (!IS_ERR(clk)) {
|
||||
clk_set_rate(clk, clk_round_rate(clk, 83333333));
|
||||
clk_put(clk);
|
||||
}
|
||||
|
||||
/* change parent of FSI A */
|
||||
clk = clk_get(NULL, "fsia_clk");
|
||||
if (!IS_ERR(clk)) {
|
||||
/* 48kHz dummy clock was used to make sure 1/1 divide */
|
||||
clk_set_rate(&sh7724_fsimcka_clk, 48000);
|
||||
clk_set_parent(clk, &sh7724_fsimcka_clk);
|
||||
clk_set_rate(clk, 48000);
|
||||
clk_put(clk);
|
||||
}
|
||||
|
||||
/* SDHI0 connected to cn7 */
|
||||
gpio_request(GPIO_FN_SDHI0CD, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0WP, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0D3, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0D2, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0D1, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0D0, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0CMD, NULL);
|
||||
gpio_request(GPIO_FN_SDHI0CLK, NULL);
|
||||
|
||||
/* SDHI1 connected to cn8 */
|
||||
gpio_request(GPIO_FN_SDHI1CD, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1WP, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1D3, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1D2, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1D1, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1D0, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1CMD, NULL);
|
||||
gpio_request(GPIO_FN_SDHI1CLK, NULL);
|
||||
|
||||
/* enable IrDA */
|
||||
gpio_request(GPIO_FN_IRDA_OUT, NULL);
|
||||
gpio_request(GPIO_FN_IRDA_IN, NULL);
|
||||
|
||||
/*
|
||||
* enable SH-Eth
|
||||
*
|
||||
* please remove J33 pin from your board !!
|
||||
*
|
||||
* ms7724 board should not use GPIO_FN_LNKSTA pin
|
||||
* So, This time PTX5 is set to input pin
|
||||
*/
|
||||
gpio_request(GPIO_FN_RMII_RXD0, NULL);
|
||||
gpio_request(GPIO_FN_RMII_RXD1, NULL);
|
||||
gpio_request(GPIO_FN_RMII_TXD0, NULL);
|
||||
gpio_request(GPIO_FN_RMII_TXD1, NULL);
|
||||
gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
|
||||
gpio_request(GPIO_FN_RMII_TX_EN, NULL);
|
||||
gpio_request(GPIO_FN_RMII_RX_ER, NULL);
|
||||
gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
|
||||
gpio_request(GPIO_FN_MDIO, NULL);
|
||||
gpio_request(GPIO_FN_MDC, NULL);
|
||||
gpio_request(GPIO_PTX5, NULL);
|
||||
gpio_direction_input(GPIO_PTX5);
|
||||
sh_eth_init();
|
||||
|
||||
if (sw & SW41_B) {
|
||||
/* 720p */
|
||||
lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
|
||||
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
|
||||
} else {
|
||||
/* VGA */
|
||||
lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
|
||||
lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
|
||||
}
|
||||
|
||||
if (sw & SW41_A) {
|
||||
/* Digital monitor */
|
||||
lcdc_info.ch[0].interface_type = RGB18;
|
||||
lcdc_info.ch[0].flags = 0;
|
||||
} else {
|
||||
/* Analog monitor */
|
||||
lcdc_info.ch[0].interface_type = RGB24;
|
||||
lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
|
||||
}
|
||||
|
||||
/* VOU */
|
||||
gpio_request(GPIO_FN_DV_D15, NULL);
|
||||
gpio_request(GPIO_FN_DV_D14, NULL);
|
||||
gpio_request(GPIO_FN_DV_D13, NULL);
|
||||
gpio_request(GPIO_FN_DV_D12, NULL);
|
||||
gpio_request(GPIO_FN_DV_D11, NULL);
|
||||
gpio_request(GPIO_FN_DV_D10, NULL);
|
||||
gpio_request(GPIO_FN_DV_D9, NULL);
|
||||
gpio_request(GPIO_FN_DV_D8, NULL);
|
||||
gpio_request(GPIO_FN_DV_CLKI, NULL);
|
||||
gpio_request(GPIO_FN_DV_CLK, NULL);
|
||||
gpio_request(GPIO_FN_DV_VSYNC, NULL);
|
||||
gpio_request(GPIO_FN_DV_HSYNC, NULL);
|
||||
|
||||
return platform_add_devices(ms7724se_devices,
|
||||
ARRAY_SIZE(ms7724se_devices));
|
||||
}
|
||||
device_initcall(devices_setup);
|
||||
|
||||
static struct sh_machine_vector mv_ms7724se __initmv = {
|
||||
.mv_name = "ms7724se",
|
||||
.mv_init_irq = init_se7724_IRQ,
|
||||
};
|
||||
5
arch/sh/boards/mach-se/7751/Makefile
Normal file
5
arch/sh/boards/mach-se/7751/Makefile
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
#
|
||||
# Makefile for the 7751 SolutionEngine specific parts of the kernel
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o
|
||||
50
arch/sh/boards/mach-se/7751/irq.c
Normal file
50
arch/sh/boards/mach-se/7751/irq.c
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7751/irq.c
|
||||
*
|
||||
* Copyright (C) 2000 Kazumoto Kojima
|
||||
*
|
||||
* Hitachi SolutionEngine Support.
|
||||
*
|
||||
* Modified for 7751 Solution Engine by
|
||||
* Ian da Silva and Jeremy Siegel, 2001.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <asm/irq.h>
|
||||
#include <mach-se/mach/se7751.h>
|
||||
|
||||
static struct ipr_data ipr_irq_table[] = {
|
||||
{ 13, 3, 3, 2 },
|
||||
/* Add additional entries here as drivers are added and tested. */
|
||||
};
|
||||
|
||||
static unsigned long ipr_offsets[] = {
|
||||
BCR_ILCRA,
|
||||
BCR_ILCRB,
|
||||
BCR_ILCRC,
|
||||
BCR_ILCRD,
|
||||
BCR_ILCRE,
|
||||
BCR_ILCRF,
|
||||
BCR_ILCRG,
|
||||
};
|
||||
|
||||
static struct ipr_desc ipr_irq_desc = {
|
||||
.ipr_offsets = ipr_offsets,
|
||||
.nr_offsets = ARRAY_SIZE(ipr_offsets),
|
||||
|
||||
.ipr_data = ipr_irq_table,
|
||||
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
|
||||
|
||||
.chip = {
|
||||
.name = "IPR-se7751",
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_7751se_IRQ(void)
|
||||
{
|
||||
register_ipr_controller(&ipr_irq_desc);
|
||||
}
|
||||
59
arch/sh/boards/mach-se/7751/setup.c
Normal file
59
arch/sh/boards/mach-se/7751/setup.c
Normal file
|
|
@ -0,0 +1,59 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7751/setup.c
|
||||
*
|
||||
* Copyright (C) 2000 Kazumoto Kojima
|
||||
*
|
||||
* Hitachi SolutionEngine Support.
|
||||
*
|
||||
* Modified for 7751 Solution Engine by
|
||||
* Ian da Silva and Jeremy Siegel, 2001.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <mach-se/mach/se7751.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
||||
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
|
||||
|
||||
static struct heartbeat_data heartbeat_data = {
|
||||
.bit_pos = heartbeat_bit_pos,
|
||||
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
|
||||
};
|
||||
|
||||
static struct resource heartbeat_resources[] = {
|
||||
[0] = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &heartbeat_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(heartbeat_resources),
|
||||
.resource = heartbeat_resources,
|
||||
};
|
||||
|
||||
static struct platform_device *se7751_devices[] __initdata = {
|
||||
&heartbeat_device,
|
||||
};
|
||||
|
||||
static int __init se7751_devices_setup(void)
|
||||
{
|
||||
return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
|
||||
}
|
||||
device_initcall(se7751_devices_setup);
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
static struct sh_machine_vector mv_7751se __initmv = {
|
||||
.mv_name = "7751 SolutionEngine",
|
||||
.mv_init_irq = init_7751se_IRQ,
|
||||
};
|
||||
10
arch/sh/boards/mach-se/7780/Makefile
Normal file
10
arch/sh/boards/mach-se/7780/Makefile
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#
|
||||
# Makefile for the HITACHI UL SolutionEngine 7780 specific parts of the kernel
|
||||
#
|
||||
# This file is subject to the terms and conditions of the GNU General Public
|
||||
# License. See the file "COPYING" in the main directory of this archive
|
||||
# for more details.
|
||||
#
|
||||
#
|
||||
|
||||
obj-y := setup.o irq.o
|
||||
68
arch/sh/boards/mach-se/7780/irq.c
Normal file
68
arch/sh/boards/mach-se/7780/irq.c
Normal file
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7780/irq.c
|
||||
*
|
||||
* Copyright (C) 2006,2007 Nobuhiro Iwamatsu
|
||||
*
|
||||
* Hitachi UL SolutionEngine 7780 Support.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach-se/mach/se7780.h>
|
||||
|
||||
#define INTC_BASE 0xffd00000
|
||||
#define INTC_ICR1 (INTC_BASE+0x1c)
|
||||
|
||||
/*
|
||||
* Initialize IRQ setting
|
||||
*/
|
||||
void __init init_se7780_IRQ(void)
|
||||
{
|
||||
/* enable all interrupt at FPGA */
|
||||
__raw_writew(0, FPGA_INTMSK1);
|
||||
/* mask SM501 interrupt */
|
||||
__raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
|
||||
/* enable all interrupt at FPGA */
|
||||
__raw_writew(0, FPGA_INTMSK2);
|
||||
|
||||
/* set FPGA INTSEL register */
|
||||
/* FPGA + 0x06 */
|
||||
__raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |
|
||||
(IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
|
||||
|
||||
/* FPGA + 0x08 */
|
||||
__raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
|
||||
(IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
|
||||
(IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
|
||||
(IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
|
||||
|
||||
/* FPGA + 0x0A */
|
||||
__raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
|
||||
|
||||
plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
|
||||
|
||||
/* ICR1: detect low level(for 2ndcut) */
|
||||
__raw_writel(0xAAAA0000, INTC_ICR1);
|
||||
|
||||
/*
|
||||
* FPGA PCISEL register initialize
|
||||
*
|
||||
* CPU || SLOT1 | SLOT2 | S-ATA | USB
|
||||
* -------------------------------------
|
||||
* INTA || INTA | INTD | -- | INTB
|
||||
* -------------------------------------
|
||||
* INTB || INTB | INTA | -- | INTC
|
||||
* -------------------------------------
|
||||
* INTC || INTC | INTB | INTA | --
|
||||
* -------------------------------------
|
||||
* INTD || INTD | INTC | -- | INTA
|
||||
* -------------------------------------
|
||||
*/
|
||||
__raw_writew(0x0013, FPGA_PCI_INTSEL1);
|
||||
__raw_writew(0xE402, FPGA_PCI_INTSEL2);
|
||||
}
|
||||
114
arch/sh/boards/mach-se/7780/setup.c
Normal file
114
arch/sh/boards/mach-se/7780/setup.c
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* linux/arch/sh/boards/se/7780/setup.c
|
||||
*
|
||||
* Copyright (C) 2006,2007 Nobuhiro Iwamatsu
|
||||
*
|
||||
* Hitachi UL SolutionEngine 7780 Support.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <mach-se/mach/se7780.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
||||
/* Heartbeat */
|
||||
static struct resource heartbeat_resource = {
|
||||
.start = PA_LED,
|
||||
.end = PA_LED,
|
||||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
|
||||
};
|
||||
|
||||
static struct platform_device heartbeat_device = {
|
||||
.name = "heartbeat",
|
||||
.id = -1,
|
||||
.num_resources = 1,
|
||||
.resource = &heartbeat_resource,
|
||||
};
|
||||
|
||||
/* SMC91x */
|
||||
static struct resource smc91x_eth_resources[] = {
|
||||
[0] = {
|
||||
.name = "smc91x-regs" ,
|
||||
.start = PA_LAN + 0x300,
|
||||
.end = PA_LAN + 0x300 + 0x10 ,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = SMC_IRQ,
|
||||
.end = SMC_IRQ,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_eth_device = {
|
||||
.name = "smc91x",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = NULL, /* don't use dma */
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
|
||||
.resource = smc91x_eth_resources,
|
||||
};
|
||||
|
||||
static struct platform_device *se7780_devices[] __initdata = {
|
||||
&heartbeat_device,
|
||||
&smc91x_eth_device,
|
||||
};
|
||||
|
||||
static int __init se7780_devices_setup(void)
|
||||
{
|
||||
return platform_add_devices(se7780_devices,
|
||||
ARRAY_SIZE(se7780_devices));
|
||||
}
|
||||
device_initcall(se7780_devices_setup);
|
||||
|
||||
#define GPIO_PHCR 0xFFEA000E
|
||||
#define GPIO_PMSELR 0xFFEA0080
|
||||
#define GPIO_PECR 0xFFEA0008
|
||||
|
||||
static void __init se7780_setup(char **cmdline_p)
|
||||
{
|
||||
/* "SH-Linux" on LED Display */
|
||||
__raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
|
||||
__raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
|
||||
__raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
|
||||
__raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
|
||||
__raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
|
||||
__raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
|
||||
__raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
|
||||
__raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
|
||||
|
||||
printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
|
||||
|
||||
/*
|
||||
* PCI REQ/GNT setting
|
||||
* REQ0/GNT0 -> USB
|
||||
* REQ1/GNT1 -> PC Card
|
||||
* REQ2/GNT2 -> Serial ATA
|
||||
* REQ3/GNT3 -> PCI slot
|
||||
*/
|
||||
__raw_writew(0x0213, FPGA_REQSEL);
|
||||
|
||||
/* GPIO setting */
|
||||
__raw_writew(0x0000, GPIO_PECR);
|
||||
__raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
|
||||
__raw_writew(0x0c00, GPIO_PMSELR);
|
||||
|
||||
/* iVDR Power ON */
|
||||
__raw_writew(0x0001, FPGA_IVDRPW);
|
||||
}
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
static struct sh_machine_vector mv_se7780 __initmv = {
|
||||
.mv_name = "Solution Engine 7780" ,
|
||||
.mv_setup = se7780_setup ,
|
||||
.mv_init_irq = init_se7780_IRQ,
|
||||
};
|
||||
10
arch/sh/boards/mach-se/Makefile
Normal file
10
arch/sh/boards/mach-se/Makefile
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
obj-$(CONFIG_SH_7619_SOLUTION_ENGINE) += board-se7619.o
|
||||
|
||||
obj-$(CONFIG_SH_SOLUTION_ENGINE) += 770x/
|
||||
obj-$(CONFIG_SH_7206_SOLUTION_ENGINE) += 7206/
|
||||
obj-$(CONFIG_SH_7722_SOLUTION_ENGINE) += 7722/
|
||||
obj-$(CONFIG_SH_7751_SOLUTION_ENGINE) += 7751/
|
||||
obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += 7780/
|
||||
obj-$(CONFIG_SH_7343_SOLUTION_ENGINE) += 7343/
|
||||
obj-$(CONFIG_SH_7721_SOLUTION_ENGINE) += 7721/
|
||||
obj-$(CONFIG_SH_7724_SOLUTION_ENGINE) += 7724/
|
||||
26
arch/sh/boards/mach-se/board-se7619.c
Normal file
26
arch/sh/boards/mach-se/board-se7619.c
Normal file
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* arch/sh/boards/se/7619/setup.c
|
||||
*
|
||||
* Copyright (C) 2006 Yoshinori Sato
|
||||
*
|
||||
* Hitachi SH7619 SolutionEngine Support.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/machvec.h>
|
||||
|
||||
static int se7619_mode_pins(void)
|
||||
{
|
||||
return MODE_PIN2 | MODE_PIN0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The Machine Vector
|
||||
*/
|
||||
|
||||
static struct sh_machine_vector mv_se __initmv = {
|
||||
.mv_name = "SolutionEngine",
|
||||
.mv_mode_pins = se7619_mode_pins,
|
||||
};
|
||||
Loading…
Add table
Add a link
Reference in a new issue