mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 17:02:46 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
5
arch/sh/boards/mach-se/7343/Makefile
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5
arch/sh/boards/mach-se/7343/Makefile
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@ -0,0 +1,5 @@
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#
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# Makefile for the 7343 SolutionEngine specific parts of the kernel
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#
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obj-y := setup.o irq.o
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129
arch/sh/boards/mach-se/7343/irq.c
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129
arch/sh/boards/mach-se/7343/irq.c
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/*
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* Hitachi UL SolutionEngine 7343 FPGA IRQ Support.
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*
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* Copyright (C) 2008 Yoshihiro Shimoda
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* Copyright (C) 2012 Paul Mundt
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*
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* Based on linux/arch/sh/boards/se/7343/irq.c
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* Copyright (C) 2007 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DRV_NAME "SE7343-FPGA"
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#define pr_fmt(fmt) DRV_NAME ": " fmt
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#define irq_reg_readl ioread16
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#define irq_reg_writel iowrite16
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/io.h>
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#include <asm/sizes.h>
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#include <mach-se/mach/se7343.h>
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#define PA_CPLD_BASE_ADDR 0x11400000
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#define PA_CPLD_ST_REG 0x08 /* CPLD Interrupt status register */
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#define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */
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static void __iomem *se7343_irq_regs;
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struct irq_domain *se7343_irq_domain;
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static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_data *data = irq_get_irq_data(irq);
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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unsigned long mask;
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int bit;
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chip->irq_mask_ack(data);
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mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG);
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for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR)
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generic_handle_irq(irq_linear_revmap(se7343_irq_domain, bit));
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chip->irq_unmask(data);
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}
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static void __init se7343_domain_init(void)
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{
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int i;
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se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,
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&irq_domain_simple_ops, NULL);
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if (unlikely(!se7343_irq_domain)) {
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printk("Failed to get IRQ domain\n");
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return;
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}
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for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
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int irq = irq_create_mapping(se7343_irq_domain, i);
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if (unlikely(irq == 0)) {
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printk("Failed to allocate IRQ %d\n", i);
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return;
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}
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}
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}
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static void __init se7343_gc_init(void)
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{
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struct irq_chip_generic *gc;
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struct irq_chip_type *ct;
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unsigned int irq_base;
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irq_base = irq_linear_revmap(se7343_irq_domain, 0);
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gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,
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handle_level_irq);
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if (unlikely(!gc))
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return;
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ct = gc->chip_types;
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ct->chip.irq_mask = irq_gc_mask_set_bit;
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ct->chip.irq_unmask = irq_gc_mask_clr_bit;
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ct->regs.mask = PA_CPLD_IMSK_REG;
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irq_setup_generic_chip(gc, IRQ_MSK(SE7343_FPGA_IRQ_NR),
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IRQ_GC_INIT_MASK_CACHE,
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IRQ_NOREQUEST | IRQ_NOPROBE, 0);
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irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
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irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
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irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
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irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
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irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
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irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
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irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
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irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
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}
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/*
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* Initialize IRQ setting
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*/
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void __init init_7343se_IRQ(void)
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{
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se7343_irq_regs = ioremap(PA_CPLD_BASE_ADDR, SZ_16);
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if (unlikely(!se7343_irq_regs)) {
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pr_err("Failed to remap CPLD\n");
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return;
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}
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/*
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* All FPGA IRQs disabled by default
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*/
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iowrite16(0, se7343_irq_regs + PA_CPLD_IMSK_REG);
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__raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
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se7343_domain_init();
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se7343_gc_init();
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}
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181
arch/sh/boards/mach-se/7343/setup.c
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181
arch/sh/boards/mach-se/7343/setup.c
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/usb/isp116x.h>
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#include <linux/delay.h>
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#include <linux/irqdomain.h>
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#include <asm/machvec.h>
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#include <mach-se/mach/se7343.h>
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#include <asm/heartbeat.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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static struct resource heartbeat_resource = {
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.start = PA_LED,
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.end = PA_LED,
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.num_resources = 1,
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.resource = &heartbeat_resource,
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};
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static struct mtd_partition nor_flash_partitions[] = {
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{
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.name = "loader",
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.offset = 0x00000000,
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.size = 128 * 1024,
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.size = 31 * 1024 * 1024,
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},
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{
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.name = "data",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data nor_flash_data = {
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.width = 2,
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.parts = nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(nor_flash_partitions),
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};
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static struct resource nor_flash_resources[] = {
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[0] = {
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.start = 0x00000000,
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.end = 0x01ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device nor_flash_device = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &nor_flash_data,
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},
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.num_resources = ARRAY_SIZE(nor_flash_resources),
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.resource = nor_flash_resources,
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};
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#define ST16C2550C_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP)
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static struct plat_serial8250_port serial_platform_data[] = {
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[0] = {
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.iotype = UPIO_MEM,
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.mapbase = 0x16000000,
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.regshift = 1,
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.flags = ST16C2550C_FLAGS,
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.uartclk = 7372800,
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},
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[1] = {
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.iotype = UPIO_MEM,
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.mapbase = 0x17000000,
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.regshift = 1,
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.flags = ST16C2550C_FLAGS,
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.uartclk = 7372800,
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},
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{ },
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};
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static struct platform_device uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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static void isp116x_delay(struct device *dev, int delay)
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{
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ndelay(delay);
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}
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static struct resource usb_resources[] = {
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[0] = {
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.start = 0x11800000,
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.end = 0x11800001,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 0x11800002,
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.end = 0x11800003,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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/* Filled in later */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct isp116x_platform_data usb_platform_data = {
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.sel15Kres = 1,
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.oc_enable = 1,
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.int_act_high = 0,
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.int_edge_triggered = 0,
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.remote_wakeup_enable = 0,
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.delay = isp116x_delay,
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};
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static struct platform_device usb_device = {
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.name = "isp116x-hcd",
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.id = -1,
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.num_resources = ARRAY_SIZE(usb_resources),
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.resource = usb_resources,
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.dev = {
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.platform_data = &usb_platform_data,
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},
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};
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static struct platform_device *sh7343se_platform_devices[] __initdata = {
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&heartbeat_device,
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&nor_flash_device,
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&uart_device,
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&usb_device,
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};
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static int __init sh7343se_devices_setup(void)
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{
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/* Wire-up dynamic vectors */
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serial_platform_data[0].irq = irq_find_mapping(se7343_irq_domain,
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SE7343_FPGA_IRQ_UARTA);
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serial_platform_data[1].irq = irq_find_mapping(se7343_irq_domain,
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SE7343_FPGA_IRQ_UARTB);
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usb_resources[2].start = usb_resources[2].end =
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irq_find_mapping(se7343_irq_domain, SE7343_FPGA_IRQ_USB);
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return platform_add_devices(sh7343se_platform_devices,
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ARRAY_SIZE(sh7343se_platform_devices));
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}
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device_initcall(sh7343se_devices_setup);
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/*
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* Initialize the board
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*/
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static void __init sh7343se_setup(char **cmdline_p)
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{
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__raw_writew(0xf900, FPGA_OUT); /* FPGA */
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__raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
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__raw_writew(0x0020, PORT_PSELD);
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printk(KERN_INFO "MS7343CP01 Setup...done\n");
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_7343se __initmv = {
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.mv_name = "SolutionEngine 7343",
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.mv_setup = sh7343se_setup,
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.mv_init_irq = init_7343se_IRQ,
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};
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