mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 17:02:46 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
5
arch/sh/boards/mach-se/770x/Makefile
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5
arch/sh/boards/mach-se/770x/Makefile
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@ -0,0 +1,5 @@
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#
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# Makefile for the 770x SolutionEngine specific parts of the kernel
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#
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obj-y := setup.o irq.o
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108
arch/sh/boards/mach-se/770x/irq.c
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108
arch/sh/boards/mach-se/770x/irq.c
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@ -0,0 +1,108 @@
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/*
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* linux/arch/sh/boards/se/770x/irq.c
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*
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* Copyright (C) 2000 Kazumoto Kojima
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* Copyright (C) 2006 Nobuhiro Iwamatsu
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*
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* Hitachi SolutionEngine Support.
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*
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <mach-se/mach/se.h>
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static struct ipr_data ipr_irq_table[] = {
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/*
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* Super I/O (Just mimic PC):
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* 1: keyboard
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* 3: serial 0
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* 4: serial 1
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* 5: printer
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* 6: floppy
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* 8: rtc
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* 12: mouse
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* 14: ide0
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*/
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#if defined(CONFIG_CPU_SUBTYPE_SH7705)
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/* This is default value */
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{ 13, 0, 8, 0x0f-13, },
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{ 5 , 0, 4, 0x0f- 5, },
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{ 10, 1, 0, 0x0f-10, },
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{ 7 , 2, 4, 0x0f- 7, },
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{ 3 , 2, 0, 0x0f- 3, },
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{ 1 , 3, 12, 0x0f- 1, },
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{ 12, 3, 4, 0x0f-12, }, /* LAN */
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{ 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
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{ 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
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{ 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
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{ 0 , 5, 12, 0x0f , },
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{ 4 , 5, 4, 0x0f- 4, },
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{ 8 , 6, 12, 0x0f- 8, },
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{ 9 , 6, 8, 0x0f- 9, },
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{ 11, 6, 4, 0x0f-11, },
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#else
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{ 14, 0, 8, 0x0f-14, },
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{ 12, 0, 4, 0x0f-12, },
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{ 8, 1, 4, 0x0f- 8, },
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{ 6, 2, 12, 0x0f- 6, },
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{ 5, 2, 8, 0x0f- 5, },
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{ 4, 2, 4, 0x0f- 4, },
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{ 3, 2, 0, 0x0f- 3, },
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{ 1, 3, 12, 0x0f- 1, },
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#if defined(CONFIG_STNIC)
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/* ST NIC */
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{ 10, 3, 4, 0x0f-10, }, /* LAN */
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#endif
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/* MRSHPC IRQs setting */
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{ 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
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{ 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
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{ 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
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{ 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
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/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
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/* NOTE: #2 and #13 are not used on PC */
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{ 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
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{ 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
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#endif
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};
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static unsigned long ipr_offsets[] = {
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BCR_ILCRA,
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BCR_ILCRB,
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BCR_ILCRC,
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BCR_ILCRD,
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BCR_ILCRE,
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BCR_ILCRF,
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BCR_ILCRG,
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};
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static struct ipr_desc ipr_irq_desc = {
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.ipr_offsets = ipr_offsets,
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.nr_offsets = ARRAY_SIZE(ipr_offsets),
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.ipr_data = ipr_irq_table,
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.nr_irqs = ARRAY_SIZE(ipr_irq_table),
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.chip = {
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.name = "IPR-se770x",
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},
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};
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/*
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* Initialize IRQ setting
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*/
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void __init init_se_IRQ(void)
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{
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/* Disable all interrupts */
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__raw_writew(0, BCR_ILCRA);
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__raw_writew(0, BCR_ILCRB);
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__raw_writew(0, BCR_ILCRC);
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__raw_writew(0, BCR_ILCRD);
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__raw_writew(0, BCR_ILCRE);
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__raw_writew(0, BCR_ILCRF);
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__raw_writew(0, BCR_ILCRG);
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register_ipr_controller(&ipr_irq_desc);
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}
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188
arch/sh/boards/mach-se/770x/setup.c
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188
arch/sh/boards/mach-se/770x/setup.c
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/*
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* linux/arch/sh/boards/se/770x/setup.c
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*
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* Copyright (C) 2000 Kazumoto Kojima
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*
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* Hitachi SolutionEngine Support.
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*
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <mach-se/mach/se.h>
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#include <mach-se/mach/mrshpc.h>
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <asm/smc37c93x.h>
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#include <asm/heartbeat.h>
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/*
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* Configure the Super I/O chip
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*/
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static void __init smsc_config(int index, int data)
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{
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outb_p(index, INDEX_PORT);
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outb_p(data, DATA_PORT);
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}
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/* XXX: Another candidate for a more generic cchip machine vector */
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static void __init smsc_setup(char **cmdline_p)
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{
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outb_p(CONFIG_ENTER, CONFIG_PORT);
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outb_p(CONFIG_ENTER, CONFIG_PORT);
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/* FDC */
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smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
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smsc_config(ACTIVATE_INDEX, 0x01);
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smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
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/* AUXIO (GPIO): to use IDE1 */
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smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
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smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
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smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
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/* COM1 */
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smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
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smsc_config(ACTIVATE_INDEX, 0x01);
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smsc_config(IO_BASE_HI_INDEX, 0x03);
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smsc_config(IO_BASE_LO_INDEX, 0xf8);
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smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
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/* COM2 */
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smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
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smsc_config(ACTIVATE_INDEX, 0x01);
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smsc_config(IO_BASE_HI_INDEX, 0x02);
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smsc_config(IO_BASE_LO_INDEX, 0xf8);
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smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
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/* RTC */
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smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
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smsc_config(ACTIVATE_INDEX, 0x01);
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smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
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/* XXX: PARPORT, KBD, and MOUSE will come here... */
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outb_p(CONFIG_EXIT, CONFIG_PORT);
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}
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static struct resource cf_ide_resources[] = {
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[0] = {
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.start = PA_MRSHPC_IO + 0x1f0,
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.end = PA_MRSHPC_IO + 0x1f0 + 8,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
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.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = IRQ_CFCARD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device cf_ide_device = {
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.name = "pata_platform",
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.id = -1,
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.num_resources = ARRAY_SIZE(cf_ide_resources),
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.resource = cf_ide_resources,
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};
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static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
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static struct heartbeat_data heartbeat_data = {
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.bit_pos = heartbeat_bit_pos,
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.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
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};
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static struct resource heartbeat_resource = {
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.start = PA_LED,
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.end = PA_LED,
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.dev = {
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.platform_data = &heartbeat_data,
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},
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.num_resources = 1,
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.resource = &heartbeat_resource,
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};
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#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
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defined(CONFIG_CPU_SUBTYPE_SH7712)
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/* SH771X Ethernet driver */
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static struct resource sh_eth0_resources[] = {
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[0] = {
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.start = SH_ETH0_BASE,
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.end = SH_ETH0_BASE + 0x1B8,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = SH_ETH0_IRQ,
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.end = SH_ETH0_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sh_eth0_device = {
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.name = "sh771x-ether",
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.id = 0,
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.dev = {
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.platform_data = PHY_ID,
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},
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.num_resources = ARRAY_SIZE(sh_eth0_resources),
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.resource = sh_eth0_resources,
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};
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static struct resource sh_eth1_resources[] = {
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[0] = {
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.start = SH_ETH1_BASE,
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.end = SH_ETH1_BASE + 0x1B8,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = SH_ETH1_IRQ,
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.end = SH_ETH1_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sh_eth1_device = {
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.name = "sh771x-ether",
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.id = 1,
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.dev = {
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.platform_data = PHY_ID,
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},
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.num_resources = ARRAY_SIZE(sh_eth1_resources),
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.resource = sh_eth1_resources,
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};
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#endif
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static struct platform_device *se_devices[] __initdata = {
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&heartbeat_device,
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&cf_ide_device,
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#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
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defined(CONFIG_CPU_SUBTYPE_SH7712)
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&sh_eth0_device,
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&sh_eth1_device,
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#endif
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};
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static int __init se_devices_setup(void)
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{
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mrshpc_setup_windows();
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return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
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}
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device_initcall(se_devices_setup);
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_se __initmv = {
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.mv_name = "SolutionEngine",
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.mv_setup = smsc_setup,
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.mv_init_irq = init_se_IRQ,
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};
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