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Fixed MTP to work with TWRP
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89
arch/sh/lib64/copy_page.S
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89
arch/sh/lib64/copy_page.S
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/*
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Copyright 2003 Richard Curnow, SuperH (UK) Ltd.
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This file is subject to the terms and conditions of the GNU General Public
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License. See the file "COPYING" in the main directory of this archive
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for more details.
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Tight version of mempy for the case of just copying a page.
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Prefetch strategy empirically optimised against RTL simulations
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of SH5-101 cut2 eval chip with Cayman board DDR memory.
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Parameters:
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r2 : destination effective address (start of page)
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r3 : source effective address (start of page)
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Always copies 4096 bytes.
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Points to review.
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* Currently the prefetch is 4 lines ahead and the alloco is 2 lines ahead.
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It seems like the prefetch needs to be at at least 4 lines ahead to get
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the data into the cache in time, and the allocos contend with outstanding
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prefetches for the same cache set, so it's better to have the numbers
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different.
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*/
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.section .text..SHmedia32,"ax"
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.little
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.balign 8
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.global copy_page
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copy_page:
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/* Copy 4096 bytes worth of data from r3 to r2.
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Do prefetches 4 lines ahead.
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Do alloco 2 lines ahead */
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pta 1f, tr1
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pta 2f, tr2
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pta 3f, tr3
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ptabs r18, tr0
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#if 0
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/* TAKum03020 */
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ld.q r3, 0x00, r63
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ld.q r3, 0x20, r63
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ld.q r3, 0x40, r63
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ld.q r3, 0x60, r63
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#endif
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alloco r2, 0x00
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synco ! TAKum03020
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alloco r2, 0x20
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synco ! TAKum03020
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movi 3968, r6
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add r2, r6, r6
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addi r6, 64, r7
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addi r7, 64, r8
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sub r3, r2, r60
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addi r60, 8, r61
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addi r61, 8, r62
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addi r62, 8, r23
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addi r60, 0x80, r22
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/* Minimal code size. The extra branches inside the loop don't cost much
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because they overlap with the time spent waiting for prefetches to
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complete. */
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1:
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#if 0
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/* TAKum03020 */
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bge/u r2, r6, tr2 ! skip prefetch for last 4 lines
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ldx.q r2, r22, r63 ! prefetch 4 lines hence
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#endif
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2:
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bge/u r2, r7, tr3 ! skip alloco for last 2 lines
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alloco r2, 0x40 ! alloc destination line 2 lines ahead
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synco ! TAKum03020
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3:
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ldx.q r2, r60, r36
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ldx.q r2, r61, r37
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ldx.q r2, r62, r38
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ldx.q r2, r23, r39
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st.q r2, 0, r36
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st.q r2, 8, r37
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st.q r2, 16, r38
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st.q r2, 24, r39
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addi r2, 32, r2
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bgt/l r8, r2, tr1
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blink tr0, r63 ! return
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