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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-02 09:05:37 +01:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
84
arch/sparc/include/asm/cacheflush_64.h
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84
arch/sparc/include/asm/cacheflush_64.h
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#ifndef _SPARC64_CACHEFLUSH_H
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#define _SPARC64_CACHEFLUSH_H
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#include <asm/page.h>
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#ifndef __ASSEMBLY__
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#include <linux/mm.h>
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/* Cache flush operations. */
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#define flushw_all() __asm__ __volatile__("flushw")
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void __flushw_user(void);
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#define flushw_user() __flushw_user()
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#define flush_user_windows flushw_user
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#define flush_register_windows flushw_all
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/* These are the same regardless of whether this is an SMP kernel or not. */
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#define flush_cache_mm(__mm) \
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do { if ((__mm) == current->mm) flushw_user(); } while(0)
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#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
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#define flush_cache_range(vma, start, end) \
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flush_cache_mm((vma)->vm_mm)
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#define flush_cache_page(vma, page, pfn) \
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flush_cache_mm((vma)->vm_mm)
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/*
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* On spitfire, the icache doesn't snoop local stores and we don't
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* use block commit stores (which invalidate icache lines) during
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* module load, so we need this.
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*/
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void flush_icache_range(unsigned long start, unsigned long end);
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void __flush_icache_page(unsigned long);
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void __flush_dcache_page(void *addr, int flush_icache);
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void flush_dcache_page_impl(struct page *page);
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#ifdef CONFIG_SMP
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void smp_flush_dcache_page_impl(struct page *page, int cpu);
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void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
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#else
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#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
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#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
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#endif
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void __flush_dcache_range(unsigned long start, unsigned long end);
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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void flush_dcache_page(struct page *page);
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#define flush_icache_page(vma, pg) do { } while(0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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void flush_ptrace_access(struct vm_area_struct *, struct page *,
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unsigned long uaddr, void *kaddr,
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unsigned long len, int write);
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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flush_cache_page(vma, vaddr, page_to_pfn(page)); \
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memcpy(dst, src, len); \
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flush_ptrace_access(vma, page, vaddr, src, len, 0); \
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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flush_cache_page(vma, vaddr, page_to_pfn(page)); \
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memcpy(dst, src, len); \
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flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
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} while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#ifdef CONFIG_DEBUG_PAGEALLOC
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/* internal debugging function */
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void kernel_map_pages(struct page *page, int numpages, int enable);
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#endif
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#endif /* !__ASSEMBLY__ */
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#endif /* _SPARC64_CACHEFLUSH_H */
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