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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 23:58:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
398
arch/sparc/kernel/smp_32.c
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398
arch/sparc/kernel/smp_32.c
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/* smp.c: Sparc SMP support.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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* Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
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*/
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#include <asm/head.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/fs.h>
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#include <linux/seq_file.h>
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#include <linux/cache.h>
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#include <linux/delay.h>
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#include <linux/profile.h>
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#include <linux/cpu.h>
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#include <asm/ptrace.h>
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#include <linux/atomic.h>
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#include <asm/irq.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/oplib.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/cpudata.h>
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#include <asm/timer.h>
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#include <asm/leon.h>
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#include "kernel.h"
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#include "irq.h"
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volatile unsigned long cpu_callin_map[NR_CPUS] = {0,};
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cpumask_t smp_commenced_mask = CPU_MASK_NONE;
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const struct sparc32_ipi_ops *sparc32_ipi_ops;
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/* The only guaranteed locking primitive available on all Sparc
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* processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
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* places the current byte at the effective address into dest_reg and
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* places 0xff there afterwards. Pretty lame locking primitive
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* compared to the Alpha and the Intel no? Most Sparcs have 'swap'
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* instruction which is much better...
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*/
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void smp_store_cpu_info(int id)
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{
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int cpu_node;
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int mid;
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cpu_data(id).udelay_val = loops_per_jiffy;
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cpu_find_by_mid(id, &cpu_node);
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cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
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"clock-frequency", 0);
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cpu_data(id).prom_node = cpu_node;
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mid = cpu_get_hwmid(cpu_node);
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if (mid < 0) {
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printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08x", id, cpu_node);
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mid = 0;
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}
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cpu_data(id).mid = mid;
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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unsigned long bogosum = 0;
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int cpu, num = 0;
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for_each_online_cpu(cpu) {
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num++;
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bogosum += cpu_data(cpu).udelay_val;
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}
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printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
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num, bogosum/(500000/HZ),
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(bogosum/(5000/HZ))%100);
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switch(sparc_cpu_model) {
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case sun4m:
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smp4m_smp_done();
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break;
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case sun4d:
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smp4d_smp_done();
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break;
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case sparc_leon:
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leon_smp_done();
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break;
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case sun4e:
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printk("SUN4E\n");
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BUG();
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break;
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case sun4u:
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printk("SUN4U\n");
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BUG();
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break;
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default:
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printk("UNKNOWN!\n");
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BUG();
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break;
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}
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}
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void cpu_panic(void)
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{
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printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
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panic("SMP bolixed\n");
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}
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struct linux_prom_registers smp_penguin_ctable = { 0 };
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void smp_send_reschedule(int cpu)
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{
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/*
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* CPU model dependent way of implementing IPI generation targeting
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* a single CPU. The trap handler needs only to do trap entry/return
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* to call schedule.
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*/
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sparc32_ipi_ops->resched(cpu);
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}
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void smp_send_stop(void)
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{
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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/* trigger one IPI single call on one CPU */
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sparc32_ipi_ops->single(cpu);
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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int cpu;
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/* trigger IPI mask call on each CPU */
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for_each_cpu(cpu, mask)
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sparc32_ipi_ops->mask_one(cpu);
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}
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void smp_resched_interrupt(void)
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{
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irq_enter();
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scheduler_ipi();
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local_cpu_data().irq_resched_count++;
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irq_exit();
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/* re-schedule routine called by interrupt return code. */
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}
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void smp_call_function_single_interrupt(void)
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{
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irq_enter();
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generic_smp_call_function_single_interrupt();
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local_cpu_data().irq_call_count++;
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irq_exit();
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}
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void smp_call_function_interrupt(void)
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{
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irq_enter();
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generic_smp_call_function_interrupt();
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local_cpu_data().irq_call_count++;
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irq_exit();
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}
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int i, cpuid, extra;
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printk("Entering SMP Mode...\n");
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extra = 0;
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for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
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if (cpuid >= NR_CPUS)
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extra++;
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}
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/* i = number of cpus */
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if (extra && max_cpus > i - extra)
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printk("Warning: NR_CPUS is too low to start all cpus\n");
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smp_store_cpu_info(boot_cpu_id);
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switch(sparc_cpu_model) {
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case sun4m:
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smp4m_boot_cpus();
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break;
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case sun4d:
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smp4d_boot_cpus();
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break;
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case sparc_leon:
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leon_boot_cpus();
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break;
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case sun4e:
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printk("SUN4E\n");
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BUG();
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break;
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case sun4u:
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printk("SUN4U\n");
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BUG();
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break;
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default:
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printk("UNKNOWN!\n");
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BUG();
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break;
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}
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}
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/* Set this up early so that things like the scheduler can init
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* properly. We use the same cpu mask for both the present and
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* possible cpu map.
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*/
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void __init smp_setup_cpu_possible_map(void)
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{
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int instance, mid;
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instance = 0;
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while (!cpu_find_by_instance(instance, NULL, &mid)) {
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if (mid < NR_CPUS) {
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set_cpu_possible(mid, true);
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set_cpu_present(mid, true);
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}
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instance++;
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}
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}
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void __init smp_prepare_boot_cpu(void)
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{
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int cpuid = hard_smp_processor_id();
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if (cpuid >= NR_CPUS) {
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prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
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prom_halt();
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}
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if (cpuid != 0)
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printk("boot cpu id != 0, this could work but is untested\n");
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current_thread_info()->cpu = cpuid;
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set_cpu_online(cpuid, true);
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set_cpu_possible(cpuid, true);
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}
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int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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int ret=0;
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switch(sparc_cpu_model) {
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case sun4m:
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ret = smp4m_boot_one_cpu(cpu, tidle);
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break;
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case sun4d:
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ret = smp4d_boot_one_cpu(cpu, tidle);
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break;
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case sparc_leon:
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ret = leon_boot_one_cpu(cpu, tidle);
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break;
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case sun4e:
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printk("SUN4E\n");
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BUG();
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break;
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case sun4u:
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printk("SUN4U\n");
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BUG();
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break;
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default:
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printk("UNKNOWN!\n");
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BUG();
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break;
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}
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if (!ret) {
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cpumask_set_cpu(cpu, &smp_commenced_mask);
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while (!cpu_online(cpu))
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mb();
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}
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return ret;
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}
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static void arch_cpu_pre_starting(void *arg)
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{
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local_ops->cache_all();
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local_ops->tlb_all();
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switch(sparc_cpu_model) {
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case sun4m:
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sun4m_cpu_pre_starting(arg);
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break;
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case sun4d:
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sun4d_cpu_pre_starting(arg);
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break;
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case sparc_leon:
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leon_cpu_pre_starting(arg);
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break;
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default:
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BUG();
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}
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}
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static void arch_cpu_pre_online(void *arg)
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{
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unsigned int cpuid = hard_smp_processor_id();
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register_percpu_ce(cpuid);
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_ops->cache_all();
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local_ops->tlb_all();
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switch(sparc_cpu_model) {
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case sun4m:
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sun4m_cpu_pre_online(arg);
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break;
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case sun4d:
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sun4d_cpu_pre_online(arg);
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break;
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case sparc_leon:
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leon_cpu_pre_online(arg);
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break;
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default:
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BUG();
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}
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}
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static void sparc_start_secondary(void *arg)
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{
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unsigned int cpu;
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/*
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* SMP booting is extremely fragile in some architectures. So run
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* the cpu initialization code first before anything else.
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*/
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arch_cpu_pre_starting(arg);
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preempt_disable();
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cpu = smp_processor_id();
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/* Invoke the CPU_STARTING notifier callbacks */
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notify_cpu_starting(cpu);
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arch_cpu_pre_online(arg);
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/* Set the CPU in the cpu_online_mask */
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set_cpu_online(cpu, true);
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/* Enable local interrupts now */
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local_irq_enable();
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wmb();
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cpu_startup_entry(CPUHP_ONLINE);
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/* We should never reach here! */
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BUG();
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}
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void smp_callin(void)
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{
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sparc_start_secondary(NULL);
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}
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void smp_bogo(struct seq_file *m)
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{
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int i;
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for_each_online_cpu(i) {
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seq_printf(m,
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"Cpu%dBogo\t: %lu.%02lu\n",
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i,
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cpu_data(i).udelay_val/(500000/HZ),
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(cpu_data(i).udelay_val/(5000/HZ))%100);
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}
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}
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void smp_info(struct seq_file *m)
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{
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int i;
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seq_printf(m, "State:\n");
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for_each_online_cpu(i)
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seq_printf(m, "CPU%d\t\t: online\n", i);
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}
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