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Fixed MTP to work with TWRP
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f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
52
arch/tile/include/asm/timex.h
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52
arch/tile/include/asm/timex.h
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/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_TIMEX_H
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#define _ASM_TILE_TIMEX_H
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/*
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* This rate should be a multiple of the possible HZ values (100, 250, 1000)
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* and a fraction of the possible hardware timer frequencies. Our timer
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* frequency is highly tunable but also quite precise, so for the primary use
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* of this value (setting ACT_HZ from HZ) we just pick a value that causes
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* ACT_HZ to be set to HZ. We make the value somewhat large just to be
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* more robust in case someone tries out a new value of HZ.
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*/
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#define CLOCK_TICK_RATE 1000000
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typedef unsigned long long cycles_t;
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#if CHIP_HAS_SPLIT_CYCLE()
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cycles_t get_cycles(void);
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#define get_cycles_low() __insn_mfspr(SPR_CYCLE_LOW)
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#else
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static inline cycles_t get_cycles(void)
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{
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return __insn_mfspr(SPR_CYCLE);
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}
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#define get_cycles_low() __insn_mfspr(SPR_CYCLE) /* just get all 64 bits */
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#endif
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cycles_t get_clock_rate(void);
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/* Convert nanoseconds to core clock cycles. */
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cycles_t ns2cycles(unsigned long nsecs);
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/* Called at cpu initialization to set some low-level constants. */
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void setup_clock(void);
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/* Called at cpu initialization to start the tile-timer clock device. */
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void setup_tile_timer(void);
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#endif /* _ASM_TILE_TIMEX_H */
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