mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-31 08:08:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
399
arch/x86/math-emu/get_address.c
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399
arch/x86/math-emu/get_address.c
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@ -0,0 +1,399 @@
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/*---------------------------------------------------------------------------+
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| get_address.c |
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| |
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| Get the effective address from an FPU instruction. |
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| |
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| Copyright (C) 1992,1993,1994,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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| Australia. E-mail billm@suburbia.net |
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| |
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| |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Note: |
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| The file contains code which accesses user memory. |
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| Emulator static data may change when user memory is accessed, due to |
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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#include <linux/stddef.h>
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#include <asm/uaccess.h>
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#include <asm/desc.h>
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#include "fpu_system.h"
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#include "exception.h"
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#include "fpu_emu.h"
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#define FPU_WRITE_BIT 0x10
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static int reg_offset[] = {
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offsetof(struct pt_regs, ax),
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offsetof(struct pt_regs, cx),
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offsetof(struct pt_regs, dx),
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offsetof(struct pt_regs, bx),
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offsetof(struct pt_regs, sp),
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offsetof(struct pt_regs, bp),
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offsetof(struct pt_regs, si),
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offsetof(struct pt_regs, di)
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};
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#define REG_(x) (*(long *)(reg_offset[(x)] + (u_char *)FPU_info->regs))
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static int reg_offset_vm86[] = {
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offsetof(struct pt_regs, cs),
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offsetof(struct kernel_vm86_regs, ds),
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offsetof(struct kernel_vm86_regs, es),
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offsetof(struct kernel_vm86_regs, fs),
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offsetof(struct kernel_vm86_regs, gs),
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offsetof(struct pt_regs, ss),
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offsetof(struct kernel_vm86_regs, ds)
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};
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#define VM86_REG_(x) (*(unsigned short *) \
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(reg_offset_vm86[((unsigned)x)] + (u_char *)FPU_info->regs))
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static int reg_offset_pm[] = {
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offsetof(struct pt_regs, cs),
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offsetof(struct pt_regs, ds),
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offsetof(struct pt_regs, es),
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offsetof(struct pt_regs, fs),
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offsetof(struct pt_regs, ds), /* dummy, not saved on stack */
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offsetof(struct pt_regs, ss),
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offsetof(struct pt_regs, ds)
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};
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#define PM_REG_(x) (*(unsigned short *) \
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(reg_offset_pm[((unsigned)x)] + (u_char *)FPU_info->regs))
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/* Decode the SIB byte. This function assumes mod != 0 */
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static int sib(int mod, unsigned long *fpu_eip)
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{
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u_char ss, index, base;
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long offset;
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(1);
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FPU_get_user(base, (u_char __user *) (*fpu_eip)); /* The SIB byte */
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RE_ENTRANT_CHECK_ON;
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(*fpu_eip)++;
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ss = base >> 6;
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index = (base >> 3) & 7;
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base &= 7;
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if ((mod == 0) && (base == 5))
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offset = 0; /* No base register */
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else
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offset = REG_(base);
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if (index == 4) {
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/* No index register */
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/* A non-zero ss is illegal */
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if (ss)
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EXCEPTION(EX_Invalid);
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} else {
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offset += (REG_(index)) << ss;
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}
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if (mod == 1) {
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/* 8 bit signed displacement */
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long displacement;
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(1);
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FPU_get_user(displacement, (signed char __user *)(*fpu_eip));
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offset += displacement;
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RE_ENTRANT_CHECK_ON;
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(*fpu_eip)++;
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} else if (mod == 2 || base == 5) { /* The second condition also has mod==0 */
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/* 32 bit displacement */
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long displacement;
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(4);
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FPU_get_user(displacement, (long __user *)(*fpu_eip));
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offset += displacement;
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RE_ENTRANT_CHECK_ON;
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(*fpu_eip) += 4;
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}
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return offset;
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}
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static unsigned long vm86_segment(u_char segment, struct address *addr)
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{
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segment--;
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#ifdef PARANOID
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if (segment > PREFIX_SS_) {
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EXCEPTION(EX_INTERNAL | 0x130);
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math_abort(FPU_info, SIGSEGV);
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}
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#endif /* PARANOID */
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addr->selector = VM86_REG_(segment);
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return (unsigned long)VM86_REG_(segment) << 4;
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}
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/* This should work for 16 and 32 bit protected mode. */
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static long pm_address(u_char FPU_modrm, u_char segment,
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struct address *addr, long offset)
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{
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struct desc_struct descriptor;
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unsigned long base_address, limit, address, seg_top;
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segment--;
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#ifdef PARANOID
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/* segment is unsigned, so this also detects if segment was 0: */
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if (segment > PREFIX_SS_) {
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EXCEPTION(EX_INTERNAL | 0x132);
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math_abort(FPU_info, SIGSEGV);
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}
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#endif /* PARANOID */
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switch (segment) {
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case PREFIX_GS_ - 1:
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/* user gs handling can be lazy, use special accessors */
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addr->selector = get_user_gs(FPU_info->regs);
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break;
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default:
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addr->selector = PM_REG_(segment);
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}
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descriptor = LDT_DESCRIPTOR(PM_REG_(segment));
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base_address = SEG_BASE_ADDR(descriptor);
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address = base_address + offset;
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limit = base_address
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+ (SEG_LIMIT(descriptor) + 1) * SEG_GRANULARITY(descriptor) - 1;
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if (limit < base_address)
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limit = 0xffffffff;
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if (SEG_EXPAND_DOWN(descriptor)) {
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if (SEG_G_BIT(descriptor))
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seg_top = 0xffffffff;
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else {
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seg_top = base_address + (1 << 20);
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if (seg_top < base_address)
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seg_top = 0xffffffff;
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}
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access_limit =
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(address <= limit) || (address >= seg_top) ? 0 :
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((seg_top - address) >= 255 ? 255 : seg_top - address);
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} else {
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access_limit =
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(address > limit) || (address < base_address) ? 0 :
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((limit - address) >= 254 ? 255 : limit - address + 1);
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}
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if (SEG_EXECUTE_ONLY(descriptor) ||
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(!SEG_WRITE_PERM(descriptor) && (FPU_modrm & FPU_WRITE_BIT))) {
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access_limit = 0;
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}
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return address;
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}
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/*
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MOD R/M byte: MOD == 3 has a special use for the FPU
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SIB byte used iff R/M = 100b
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7 6 5 4 3 2 1 0
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..... ......... .........
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MOD OPCODE(2) R/M
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SIB byte
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7 6 5 4 3 2 1 0
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..... ......... .........
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SS INDEX BASE
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*/
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void __user *FPU_get_address(u_char FPU_modrm, unsigned long *fpu_eip,
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struct address *addr, fpu_addr_modes addr_modes)
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{
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u_char mod;
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unsigned rm = FPU_modrm & 7;
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long *cpu_reg_ptr;
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int address = 0; /* Initialized just to stop compiler warnings. */
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/* Memory accessed via the cs selector is write protected
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in `non-segmented' 32 bit protected mode. */
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if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
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&& (addr_modes.override.segment == PREFIX_CS_)) {
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math_abort(FPU_info, SIGSEGV);
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}
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addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
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mod = (FPU_modrm >> 6) & 3;
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if (rm == 4 && mod != 3) {
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address = sib(mod, fpu_eip);
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} else {
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cpu_reg_ptr = ®_(rm);
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switch (mod) {
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case 0:
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if (rm == 5) {
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/* Special case: disp32 */
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(4);
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FPU_get_user(address,
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(unsigned long __user
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*)(*fpu_eip));
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(*fpu_eip) += 4;
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RE_ENTRANT_CHECK_ON;
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addr->offset = address;
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return (void __user *)address;
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} else {
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address = *cpu_reg_ptr; /* Just return the contents
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of the cpu register */
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addr->offset = address;
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return (void __user *)address;
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}
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case 1:
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/* 8 bit signed displacement */
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(1);
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FPU_get_user(address, (signed char __user *)(*fpu_eip));
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RE_ENTRANT_CHECK_ON;
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(*fpu_eip)++;
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break;
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case 2:
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/* 32 bit displacement */
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(4);
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FPU_get_user(address, (long __user *)(*fpu_eip));
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(*fpu_eip) += 4;
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RE_ENTRANT_CHECK_ON;
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break;
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case 3:
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/* Not legal for the FPU */
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EXCEPTION(EX_Invalid);
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}
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address += *cpu_reg_ptr;
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}
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addr->offset = address;
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switch (addr_modes.default_mode) {
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case 0:
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break;
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case VM86:
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address += vm86_segment(addr_modes.override.segment, addr);
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break;
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case PM16:
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case SEG32:
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address = pm_address(FPU_modrm, addr_modes.override.segment,
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addr, address);
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break;
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default:
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EXCEPTION(EX_INTERNAL | 0x133);
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}
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return (void __user *)address;
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}
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void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip,
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struct address *addr, fpu_addr_modes addr_modes)
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{
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u_char mod;
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unsigned rm = FPU_modrm & 7;
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int address = 0; /* Default used for mod == 0 */
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/* Memory accessed via the cs selector is write protected
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in `non-segmented' 32 bit protected mode. */
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if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
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&& (addr_modes.override.segment == PREFIX_CS_)) {
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math_abort(FPU_info, SIGSEGV);
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}
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addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
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mod = (FPU_modrm >> 6) & 3;
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switch (mod) {
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case 0:
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if (rm == 6) {
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/* Special case: disp16 */
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(2);
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FPU_get_user(address,
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(unsigned short __user *)(*fpu_eip));
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(*fpu_eip) += 2;
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RE_ENTRANT_CHECK_ON;
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goto add_segment;
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}
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break;
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case 1:
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/* 8 bit signed displacement */
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(1);
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FPU_get_user(address, (signed char __user *)(*fpu_eip));
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RE_ENTRANT_CHECK_ON;
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(*fpu_eip)++;
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break;
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case 2:
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/* 16 bit displacement */
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(2);
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FPU_get_user(address, (unsigned short __user *)(*fpu_eip));
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(*fpu_eip) += 2;
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RE_ENTRANT_CHECK_ON;
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break;
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case 3:
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/* Not legal for the FPU */
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EXCEPTION(EX_Invalid);
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break;
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}
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switch (rm) {
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case 0:
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address += FPU_info->regs->bx + FPU_info->regs->si;
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break;
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case 1:
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address += FPU_info->regs->bx + FPU_info->regs->di;
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break;
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case 2:
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address += FPU_info->regs->bp + FPU_info->regs->si;
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if (addr_modes.override.segment == PREFIX_DEFAULT)
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addr_modes.override.segment = PREFIX_SS_;
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break;
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case 3:
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address += FPU_info->regs->bp + FPU_info->regs->di;
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if (addr_modes.override.segment == PREFIX_DEFAULT)
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addr_modes.override.segment = PREFIX_SS_;
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break;
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case 4:
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address += FPU_info->regs->si;
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break;
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case 5:
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address += FPU_info->regs->di;
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break;
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case 6:
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address += FPU_info->regs->bp;
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if (addr_modes.override.segment == PREFIX_DEFAULT)
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addr_modes.override.segment = PREFIX_SS_;
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break;
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case 7:
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address += FPU_info->regs->bx;
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break;
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}
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add_segment:
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address &= 0xffff;
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addr->offset = address;
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switch (addr_modes.default_mode) {
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case 0:
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break;
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case VM86:
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address += vm86_segment(addr_modes.override.segment, addr);
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break;
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case PM16:
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case SEG32:
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address = pm_address(FPU_modrm, addr_modes.override.segment,
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addr, address);
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break;
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default:
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EXCEPTION(EX_INTERNAL | 0x131);
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}
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return (void __user *)address;
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}
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