Fixed MTP to work with TWRP

This commit is contained in:
awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions

44
arch/xtensa/boot/Makefile Normal file
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#
# arch/xtensa/boot/Makefile
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
#
# KBUILD_CFLAGS used when building rest of boot (takes effect recursively)
KBUILD_CFLAGS += -fno-builtin -Iarch/$(ARCH)/boot/include
HOSTFLAGS += -Iarch/$(ARCH)/boot/include
BIG_ENDIAN := $(shell echo __XTENSA_EB__ | $(CC) -E - | grep -v "\#")
export ccflags-y
export BIG_ENDIAN
subdir-y := lib
# Subdirs for the boot loader(s)
bootdir-$(CONFIG_XTENSA_PLATFORM_ISS) += boot-elf
bootdir-$(CONFIG_XTENSA_PLATFORM_XT2000) += boot-redboot boot-elf boot-uboot
bootdir-$(CONFIG_XTENSA_PLATFORM_XTFPGA) += boot-redboot boot-elf boot-uboot
zImage Image: $(bootdir-y)
$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
$(addprefix $(obj)/,$(host-progs))
$(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
OBJCOPYFLAGS = --strip-all -R .comment -R .note.gnu.build-id -O binary
vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
vmlinux.bin.gz: vmlinux.bin FORCE
$(call if_changed,gzip)
boot-elf: vmlinux.bin
boot-redboot: vmlinux.bin.gz
boot-uboot: vmlinux.bin.gz

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#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
ifeq ($(BIG_ENDIAN),1)
OBJCOPY_ARGS := -O elf32-xtensa-be
else
OBJCOPY_ARGS := -O elf32-xtensa-le
endif
export OBJCOPY_ARGS
export CPPFLAGS_boot.lds += -P -C
export KBUILD_AFLAGS += -mtext-section-literals
boot-y := bootstrap.o
OBJS := $(addprefix $(obj)/,$(boot-y))
$(obj)/Image.o: vmlinux.bin $(OBJS)
$(Q)$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
--add-section image=vmlinux.bin \
--set-section-flags image=contents,alloc,load,load,data \
$(OBJS) $@
$(obj)/../Image.elf: $(obj)/Image.o $(obj)/boot.lds
$(Q)$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
-T $(obj)/boot.lds \
--build-id=none \
-o $@ $(obj)/Image.o
$(Q)$(kecho) ' Kernel: $@ is ready'
zImage: $(obj)/../Image.elf

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/*
* linux/arch/xtensa/boot/boot-elf/boot.lds.S
*
* Copyright (C) 2008 - 2013 by Tensilica Inc.
*
* Chris Zankel <chris@zankel.net>
* Marc Gauthier <marc@tensilica.com
* Pete Delaney <piet@tensilica.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <asm/vectors.h>
OUTPUT_ARCH(xtensa)
ENTRY(_ResetVector)
SECTIONS
{
.ResetVector.text XCHAL_RESET_VECTOR_VADDR :
{
*(.ResetVector.text)
}
.image KERNELOFFSET: AT (LOAD_MEMORY_ADDRESS)
{
_image_start = .;
*(image)
. = (. + 3) & ~ 3;
_image_end = . ;
}
.bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3):
{
__bss_start = .;
*(.sbss)
*(.scommon)
*(.dynbss)
*(.bss)
__bss_end = .;
}
/*
* This is a remapped copy of the Reset Vector Code.
* It keeps gdb in sync with the PC after switching
* to the temporary mapping used while setting up
* the V2 MMU mappings for Linux.
*/
.ResetVector.remapped_text 0x46000000 (INFO):
{
*(.ResetVector.remapped_text)
}
}

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/*
* arch/xtensa/boot/boot-elf/bootstrap.S
*
* Low-level exception handling
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2004 - 2013 by Tensilica Inc.
*
* Chris Zankel <chris@zankel.net>
* Marc Gauthier <marc@tensilica.com>
* Piet Delaney <piet@tensilica.com>
*/
#include <asm/bootparam.h>
#include <asm/processor.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/cacheasm.h>
#include <asm/initialize_mmu.h>
#include <linux/linkage.h>
.section .ResetVector.text, "ax"
.global _ResetVector
.global reset
_ResetVector:
_j _SetupMMU
.begin no-absolute-literals
.literal_position
.align 4
RomInitAddr:
#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
.word 0x00003000
#else
.word 0xd0003000
#endif
RomBootParam:
.word _bootparam
_bootparam:
.short BP_TAG_FIRST
.short 4
.long BP_VERSION
.short BP_TAG_LAST
.short 0
.long 0
.align 4
_SetupMMU:
movi a0, 0
wsr a0, windowbase
rsync
movi a0, 1
wsr a0, windowstart
rsync
movi a0, 0x1F
wsr a0, ps
rsync
Offset = _SetupMMU - _ResetVector
#ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
initialize_mmu
#endif
.end no-absolute-literals
rsil a0, XCHAL_DEBUGLEVEL-1
rsync
reset:
l32r a0, RomInitAddr
l32r a2, RomBootParam
movi a3, 0
movi a4, 0
jx a0
.align 4
.section .ResetVector.remapped_text, "x"
.global _RemappedResetVector
/* Do org before literals */
.org 0
_RemappedResetVector:
.begin no-absolute-literals
.literal_position
_j _RemappedSetupMMU
/* Position Remapped code at the same location as the original code */
. = _RemappedResetVector + Offset
_RemappedSetupMMU:
#ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
initialize_mmu
#endif
.end no-absolute-literals

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#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
ifeq ($(BIG_ENDIAN),1)
OBJCOPY_ARGS := -O elf32-xtensa-be
else
OBJCOPY_ARGS := -O elf32-xtensa-le
endif
LD_ARGS = -T $(srctree)/$(obj)/boot.ld
boot-y := bootstrap.o
OBJS := $(addprefix $(obj)/,$(boot-y))
LIBS := arch/xtensa/boot/lib/lib.a arch/xtensa/lib/lib.a
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
$(obj)/zImage.o: vmlinux.bin.gz $(OBJS)
$(Q)$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
--add-section image=vmlinux.bin.gz \
--set-section-flags image=contents,alloc,load,load,data \
$(OBJS) $@
$(obj)/zImage.elf: $(obj)/zImage.o $(LIBS)
$(Q)$(LD) $(LD_ARGS) -o $@ $^ -L/xtensa-elf/lib $(LIBGCC)
$(obj)/../zImage.redboot: $(obj)/zImage.elf
$(Q)$(OBJCOPY) -S -O binary $< $@
$(Q)$(kecho) ' Kernel: $@ is ready'
zImage: $(obj)/../zImage.redboot

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OUTPUT_ARCH(xtensa)
SECTIONS
{
.start 0xD1000000 : { *(.start) }
.text :
{
__reloc_start = . ;
_text_start = . ;
*(.literal .text.literal .text)
_text_end = . ;
}
.rodata ALIGN(0x04):
{
*(.rodata)
*(.rodata1)
}
.data ALIGN(0x04):
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.got.plt)
*(.got)
*(.dynamic)
}
__reloc_end = . ;
. = ALIGN(0x10);
__image_load = . ;
.image 0xd0003000: AT(__image_load)
{
_image_start = .;
*(image)
. = (. + 3) & ~ 3;
_image_end = . ;
}
.bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3):
{
__bss_start = .;
*(.sbss)
*(.scommon)
*(.dynbss)
*(.bss)
__bss_end = .;
}
_end = .;
_param_start = .;
PROVIDE (end = .);
}

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#include <variant/core.h>
#include <asm/regs.h>
#include <asm/asmmacro.h>
#include <asm/cacheasm.h>
/*
* RB-Data: RedBoot data/bss
* P: Boot-Parameters
* L: Kernel-Loader
*
* The Linux-Kernel image including the loader must be loaded
* to a position so that the kernel and the boot parameters
* can fit in the space before the load address.
* ______________________________________________________
* |_RB-Data_|_P_|__________|_L_|___Linux-Kernel___|______|
* ^
* ^ Load address
* ______________________________________________________
* |___Linux-Kernel___|_P_|_L_|___________________________|
*
* The loader copies the parameter to the position that will
* be the end of the kernel and itself to the end of the
* parameter list.
*/
/* Make sure we have enough space for the 'uncompressor' */
#define STACK_SIZE 32768
#define HEAP_SIZE (131072*4)
# a2: Parameter list
# a3: Size of parameter list
.section .start, "ax"
.globl __start
/* this must be the first byte of the loader! */
__start:
entry sp, 32 # we do not intend to return
_call0 _start
__start_a0:
.align 4
.section .text, "ax"
.begin literal_prefix .text
/* put literals in here! */
.globl _start
_start:
/* 'reset' window registers */
movi a4, 1
wsr a4, ps
rsync
rsr a5, windowbase
ssl a5
sll a4, a4
wsr a4, windowstart
rsync
movi a4, 0x00040000
wsr a4, ps
rsync
/* copy the loader to its address
* Note: The loader itself is a very small piece, so we assume we
* don't partially overlap. We also assume (even more important)
* that the kernel image is out of the way. Usually, when the
* load address of this image is not at an arbitrary address,
* but aligned to some 10K's we shouldn't overlap.
*/
/* Note: The assembler cannot relax "addi a0, a0, ..." to an
l32r, so we load to a4 first. */
# addi a4, a0, __start - __start_a0
# mov a0, a4
movi a4, __start
movi a5, __start_a0
add a4, a0, a4
sub a0, a4, a5
movi a4, __start
movi a5, __reloc_end
# a0: address where this code has been loaded
# a4: compiled address of __start
# a5: compiled end address
mov.n a7, a0
mov.n a8, a4
1:
l32i a10, a7, 0
l32i a11, a7, 4
s32i a10, a8, 0
s32i a11, a8, 4
l32i a10, a7, 8
l32i a11, a7, 12
s32i a10, a8, 8
s32i a11, a8, 12
addi a8, a8, 16
addi a7, a7, 16
blt a8, a5, 1b
/* We have to flush and invalidate the caches here before we jump. */
#if XCHAL_DCACHE_IS_WRITEBACK
___flush_dcache_all a5 a6
#endif
___invalidate_icache_all a5 a6
isync
movi a11, _reloc
jx a11
.globl _reloc
_reloc:
/* RedBoot is now at the end of the memory, so we don't have
* to copy the parameter list. Keep the code around; in case
* we need it again. */
#if 0
# a0: load address
# a2: start address of parameter list
# a3: length of parameter list
# a4: __start
/* copy the parameter list out of the way */
movi a6, _param_start
add a3, a2, a3
2:
l32i a8, a2, 0
s32i a8, a6, 0
addi a2, a2, 4
addi a6, a6, 4
blt a2, a3, 2b
#endif
/* clear BSS section */
movi a6, __bss_start
movi a7, __bss_end
movi.n a5, 0
3:
s32i a5, a6, 0
addi a6, a6, 4
blt a6, a7, 3b
movi a5, -16
movi a1, _stack + STACK_SIZE
and a1, a1, a5
/* Uncompress the kernel */
# a0: load address
# a2: boot parameter
# a4: __start
movi a3, __image_load
sub a4, a3, a4
add a8, a0, a4
# a1 Stack
# a8(a4) Load address of the image
movi a6, _image_start
movi a10, _image_end
movi a7, 0x1000000
sub a11, a10, a6
movi a9, complen
s32i a11, a9, 0
movi a0, 0
# a6 destination
# a7 maximum size of destination
# a8 source
# a9 ptr to length
.extern gunzip
movi a4, gunzip
beqz a4, 1f
callx4 a4
j 2f
# a6 destination start
# a7 maximum size of destination
# a8 source start
# a9 ptr to length
# a10 destination end
1:
l32i a9, a8, 0
l32i a11, a8, 4
s32i a9, a6, 0
s32i a11, a6, 4
l32i a9, a8, 8
l32i a11, a8, 12
s32i a9, a6, 8
s32i a11, a6, 12
addi a6, a6, 16
addi a8, a8, 16
blt a6, a10, 1b
/* jump to the kernel */
2:
#if XCHAL_DCACHE_IS_WRITEBACK
___flush_dcache_all a5 a6
#endif
___invalidate_icache_all a5 a6
isync
# a2 Boot parameter list
movi a0, _image_start
jx a0
.align 16
.data
.globl avail_ram
avail_ram:
.long _heap
.globl end_avail
end_avail:
.long _heap + HEAP_SIZE
.comm _stack, STACK_SIZE
.comm _heap, HEAP_SIZE
.globl end_avail
.comm complen, 4
.end literal_prefix

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#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
UIMAGE_LOADADDR = 0x00003000
else
UIMAGE_LOADADDR = 0xd0003000
endif
UIMAGE_COMPRESSION = gzip
$(obj)/../uImage: vmlinux.bin.gz FORCE
$(call if_changed,uimage)
$(Q)$(kecho) ' Kernel: $@ is ready'
zImage: $(obj)/../uImage

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#
# arch/xtensa/boot/dts/Makefile
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
#
BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
ifneq ($(CONFIG_BUILTIN_DTB),"")
obj-$(CONFIG_OF) += $(BUILTIN_DTB)
endif
clean-files := *.dtb.S

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/dts-v1/;
/include/ "xtfpga.dtsi"
/include/ "xtfpga-flash-128m.dtsi"
/ {
compatible = "cdns,xtensa-kc705";
chosen {
bootargs = "earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=0x38000000";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x38000000>;
};
};

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/dts-v1/;
/include/ "xtfpga.dtsi"
/include/ "xtfpga-flash-16m.dtsi"
/ {
compatible = "cdns,xtensa-lx200";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x06000000>;
};
pic: pic {
compatible = "cdns,xtensa-mx";
#interrupt-cells = <2>;
interrupt-controller;
};
};

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/dts-v1/;
/include/ "xtfpga.dtsi"
/include/ "xtfpga-flash-4m.dtsi"
/ {
compatible = "cdns,xtensa-lx60";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
};

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/dts-v1/;
/include/ "xtfpga.dtsi"
/include/ "xtfpga-flash-16m.dtsi"
/ {
compatible = "cdns,xtensa-ml605";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
};

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/ {
soc {
flash: flash@00000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x00000000 0x08000000>;
bank-width = <2>;
device-width = <2>;
partition@0x0 {
label = "data";
reg = <0x00000000 0x06000000>;
};
partition@0x6000000 {
label = "boot loader area";
reg = <0x06000000 0x00800000>;
};
partition@0x6800000 {
label = "kernel image";
reg = <0x06800000 0x017e0000>;
};
partition@0x7fe0000 {
label = "boot environment";
reg = <0x07fe0000 0x00020000>;
};
};
};
};

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/ {
soc {
flash: flash@08000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x08000000 0x01000000>;
bank-width = <2>;
device-width = <2>;
partition@0x0 {
label = "boot loader area";
reg = <0x00000000 0x00400000>;
};
partition@0x400000 {
label = "kernel image";
reg = <0x00400000 0x00600000>;
};
partition@0xa00000 {
label = "data";
reg = <0x00a00000 0x005e0000>;
};
partition@0xfe0000 {
label = "boot environment";
reg = <0x00fe0000 0x00020000>;
};
};
};
};

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/ {
soc {
flash: flash@08000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x08000000 0x00400000>;
bank-width = <2>;
device-width = <2>;
partition@0x0 {
label = "boot loader area";
reg = <0x00000000 0x003f0000>;
};
partition@0x3f0000 {
label = "boot environment";
reg = <0x003f0000 0x00010000>;
};
};
};
};

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/ {
compatible = "cdns,xtensa-xtfpga";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&pic>;
chosen {
bootargs = "earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x06000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "cdns,xtensa-cpu";
reg = <0>;
/* Filled in by platform_setup from FPGA register
* clock-frequency = <100000000>;
*/
};
};
pic: pic {
compatible = "cdns,xtensa-pic";
/* one cell: internal irq number,
* two cells: second cell == 0: internal irq number
* second cell == 1: external irq number
*/
#interrupt-cells = <2>;
interrupt-controller;
};
clocks {
osc: main-oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0x00000000 0xf0000000 0x10000000>;
serial0: serial@0d050020 {
device_type = "serial";
compatible = "ns16550a";
no-loopback-test;
reg = <0x0d050020 0x20>;
reg-shift = <2>;
interrupts = <0 1>; /* external irq 0 */
clocks = <&osc>;
};
enet0: ethoc@0d030000 {
compatible = "opencores,ethoc";
reg = <0x0d030000 0x4000 0x0d800000 0x4000>;
interrupts = <1 1>; /* external irq 1 */
local-mac-address = [00 50 c2 13 6f 00];
clocks = <&osc>;
};
};
};

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#
# Makefile for some libs needed by zImage.
#
zlib := inffast.c inflate.c inftrees.c
lib-y += $(zlib:.c=.o) zmem.o
ccflags-y := -Ilib/zlib_inflate
ifdef CONFIG_FUNCTION_TRACER
CFLAGS_REMOVE_inflate.o = -pg
CFLAGS_REMOVE_zmem.o = -pg
CFLAGS_REMOVE_inftrees.o = -pg
CFLAGS_REMOVE_inffast.o = -pg
endif
quiet_cmd_copy_zlib = COPY $@
cmd_copy_zlib = cat $< > $@
$(addprefix $(obj)/,$(zlib)): $(obj)/%: $(srctree)/lib/zlib_inflate/%
$(call cmd,copy_zlib)
clean-files := $(zlib)

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#include <linux/zlib.h>
/* bits taken from ppc */
extern void *avail_ram, *end_avail;
void exit (void)
{
for (;;);
}
void *zalloc(unsigned size)
{
void *p = avail_ram;
size = (size + 7) & -8;
avail_ram += size;
if (avail_ram > end_avail) {
//puts("oops... out of memory\n");
//pause();
exit ();
}
return p;
}
#define HEAD_CRC 2
#define EXTRA_FIELD 4
#define ORIG_NAME 8
#define COMMENT 0x10
#define RESERVED 0xe0
#define DEFLATED 8
void gunzip (void *dst, int dstlen, unsigned char *src, int *lenp)
{
z_stream s;
int r, i, flags;
/* skip header */
i = 10;
flags = src[3];
if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
//puts("bad gzipped data\n");
exit();
}
if ((flags & EXTRA_FIELD) != 0)
i = 12 + src[10] + (src[11] << 8);
if ((flags & ORIG_NAME) != 0)
while (src[i++] != 0)
;
if ((flags & COMMENT) != 0)
while (src[i++] != 0)
;
if ((flags & HEAD_CRC) != 0)
i += 2;
if (i >= *lenp) {
//puts("gunzip: ran out of data in header\n");
exit();
}
s.workspace = zalloc(zlib_inflate_workspacesize());
r = zlib_inflateInit2(&s, -MAX_WBITS);
if (r != Z_OK) {
//puts("inflateInit2 returned "); puthex(r); puts("\n");
exit();
}
s.next_in = src + i;
s.avail_in = *lenp - i;
s.next_out = dst;
s.avail_out = dstlen;
r = zlib_inflate(&s, Z_FINISH);
if (r != Z_OK && r != Z_STREAM_END) {
//puts("inflate returned "); puthex(r); puts("\n");
exit();
}
*lenp = s.next_out - (unsigned char *) dst;
zlib_inflateEnd(&s);
}