mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 01:28:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
627
drivers/ata/pata_icside.c
Normal file
627
drivers/ata/pata_icside.c
Normal file
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@ -0,0 +1,627 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/gfp.h>
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#include <scsi/scsi_host.h>
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#include <linux/ata.h>
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#include <linux/libata.h>
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#include <asm/dma.h>
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#include <asm/ecard.h>
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#define DRV_NAME "pata_icside"
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#define ICS_IDENT_OFFSET 0x2280
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#define ICS_ARCIN_V5_INTRSTAT 0x0000
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#define ICS_ARCIN_V5_INTROFFSET 0x0004
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#define ICS_ARCIN_V6_INTROFFSET_1 0x2200
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#define ICS_ARCIN_V6_INTRSTAT_1 0x2290
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#define ICS_ARCIN_V6_INTROFFSET_2 0x3200
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#define ICS_ARCIN_V6_INTRSTAT_2 0x3290
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struct portinfo {
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unsigned int dataoffset;
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unsigned int ctrloffset;
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unsigned int stepping;
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};
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static const struct portinfo pata_icside_portinfo_v5 = {
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.dataoffset = 0x2800,
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.ctrloffset = 0x2b80,
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.stepping = 6,
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};
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static const struct portinfo pata_icside_portinfo_v6_1 = {
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.dataoffset = 0x2000,
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.ctrloffset = 0x2380,
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.stepping = 6,
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};
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static const struct portinfo pata_icside_portinfo_v6_2 = {
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.dataoffset = 0x3000,
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.ctrloffset = 0x3380,
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.stepping = 6,
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};
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struct pata_icside_state {
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void __iomem *irq_port;
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void __iomem *ioc_base;
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unsigned int type;
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unsigned int dma;
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struct {
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u8 port_sel;
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u8 disabled;
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unsigned int speed[ATA_MAX_DEVICES];
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} port[2];
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};
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struct pata_icside_info {
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struct pata_icside_state *state;
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struct expansion_card *ec;
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void __iomem *base;
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void __iomem *irqaddr;
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unsigned int irqmask;
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const expansioncard_ops_t *irqops;
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unsigned int mwdma_mask;
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unsigned int nr_ports;
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const struct portinfo *port[2];
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unsigned long raw_base;
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unsigned long raw_ioc_base;
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};
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#define ICS_TYPE_A3IN 0
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#define ICS_TYPE_A3USER 1
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#define ICS_TYPE_V6 3
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#define ICS_TYPE_V5 15
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#define ICS_TYPE_NOTYPE ((unsigned int)-1)
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/* ---------------- Version 5 PCB Support Functions --------------------- */
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/* Prototype: pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
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* Purpose : enable interrupts from card
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*/
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static void pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
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}
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/* Prototype: pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
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* Purpose : disable interrupts from card
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*/
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static void pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
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}
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static const expansioncard_ops_t pata_icside_ops_arcin_v5 = {
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.irqenable = pata_icside_irqenable_arcin_v5,
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.irqdisable = pata_icside_irqdisable_arcin_v5,
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};
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/* ---------------- Version 6 PCB Support Functions --------------------- */
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/* Prototype: pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
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* Purpose : enable interrupts from card
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*/
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static void pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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void __iomem *base = state->irq_port;
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if (!state->port[0].disabled)
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writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
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if (!state->port[1].disabled)
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writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
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}
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/* Prototype: pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
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* Purpose : disable interrupts from card
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*/
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static void pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
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{
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struct pata_icside_state *state = ec->irq_data;
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readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
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readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
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}
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/* Prototype: pata_icside_irqprobe(struct expansion_card *ec)
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* Purpose : detect an active interrupt from card
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*/
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static int pata_icside_irqpending_arcin_v6(struct expansion_card *ec)
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{
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struct pata_icside_state *state = ec->irq_data;
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return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
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readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
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}
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static const expansioncard_ops_t pata_icside_ops_arcin_v6 = {
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.irqenable = pata_icside_irqenable_arcin_v6,
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.irqdisable = pata_icside_irqdisable_arcin_v6,
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.irqpending = pata_icside_irqpending_arcin_v6,
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};
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/*
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* SG-DMA support.
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*
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* Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
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* There is only one DMA controller per card, which means that only
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* one drive can be accessed at one time. NOTE! We do not enforce that
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* here, but we rely on the main IDE driver spotting that both
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* interfaces use the same IRQ, which should guarantee this.
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*/
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/*
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* Configure the IOMD to give the appropriate timings for the transfer
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* mode being requested. We take the advice of the ATA standards, and
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* calculate the cycle time based on the transfer mode, and the EIDE
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* MW DMA specs that the drive provides in the IDENTIFY command.
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*
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* We have the following IOMD DMA modes to choose from:
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*
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* Type Active Recovery Cycle
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* A 250 (250) 312 (550) 562 (800)
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* B 187 (200) 250 (550) 437 (750)
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* C 125 (125) 125 (375) 250 (500)
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* D 62 (50) 125 (375) 187 (425)
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*
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* (figures in brackets are actual measured timings on DIOR/DIOW)
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*
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* However, we also need to take care of the read/write active and
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* recovery timings:
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*
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* Read Write
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* Mode Active -- Recovery -- Cycle IOMD type
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* MW0 215 50 215 480 A
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* MW1 80 50 50 150 C
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* MW2 70 25 25 120 C
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*/
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static void pata_icside_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pata_icside_state *state = ap->host->private_data;
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struct ata_timing t;
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unsigned int cycle;
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char iomd_type;
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/*
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* DMA is based on a 16MHz clock
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*/
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if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1))
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return;
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/*
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* Choose the IOMD cycle timing which ensure that the interface
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* satisfies the measured active, recovery and cycle times.
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*/
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if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425)
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iomd_type = 'D', cycle = 187;
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else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500)
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iomd_type = 'C', cycle = 250;
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else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750)
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iomd_type = 'B', cycle = 437;
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else
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iomd_type = 'A', cycle = 562;
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ata_dev_info(adev, "timings: act %dns rec %dns cyc %dns (%c)\n",
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t.active, t.recover, t.cycle, iomd_type);
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state->port[ap->port_no].speed[adev->devno] = cycle;
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}
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static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pata_icside_state *state = ap->host->private_data;
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unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
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/*
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* We are simplex; BUG if we try to fiddle with DMA
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* while it's active.
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*/
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BUG_ON(dma_channel_active(state->dma));
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/*
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* Route the DMA signals to the correct interface
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*/
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writeb(state->port[ap->port_no].port_sel, state->ioc_base);
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set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
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set_dma_sg(state->dma, qc->sg, qc->n_elem);
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set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
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/* issue r/w command */
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ap->ops->sff_exec_command(ap, &qc->tf);
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}
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static void pata_icside_bmdma_start(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pata_icside_state *state = ap->host->private_data;
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BUG_ON(dma_channel_active(state->dma));
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enable_dma(state->dma);
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}
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static void pata_icside_bmdma_stop(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pata_icside_state *state = ap->host->private_data;
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disable_dma(state->dma);
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/* see ata_bmdma_stop */
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ata_sff_dma_pause(ap);
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}
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static u8 pata_icside_bmdma_status(struct ata_port *ap)
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{
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struct pata_icside_state *state = ap->host->private_data;
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void __iomem *irq_port;
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irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 :
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ICS_ARCIN_V6_INTRSTAT_1);
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return readb(irq_port) & 1 ? ATA_DMA_INTR : 0;
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}
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static int icside_dma_init(struct pata_icside_info *info)
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{
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struct pata_icside_state *state = info->state;
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struct expansion_card *ec = info->ec;
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int i;
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for (i = 0; i < ATA_MAX_DEVICES; i++) {
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state->port[0].speed[i] = 480;
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state->port[1].speed[i] = 480;
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}
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if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
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state->dma = ec->dma;
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info->mwdma_mask = ATA_MWDMA2;
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}
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return 0;
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}
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static struct scsi_host_template pata_icside_sht = {
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ATA_BASE_SHT(DRV_NAME),
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.sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
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.dma_boundary = IOMD_DMA_BOUNDARY,
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};
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static void pata_icside_postreset(struct ata_link *link, unsigned int *classes)
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{
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struct ata_port *ap = link->ap;
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struct pata_icside_state *state = ap->host->private_data;
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if (classes[0] != ATA_DEV_NONE || classes[1] != ATA_DEV_NONE)
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return ata_sff_postreset(link, classes);
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state->port[ap->port_no].disabled = 1;
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if (state->type == ICS_TYPE_V6) {
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/*
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* Disable interrupts from this port, otherwise we
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* receive spurious interrupts from the floating
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* interrupt line.
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*/
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void __iomem *irq_port = state->irq_port +
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(ap->port_no ? ICS_ARCIN_V6_INTROFFSET_2 : ICS_ARCIN_V6_INTROFFSET_1);
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readb(irq_port);
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}
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}
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static struct ata_port_operations pata_icside_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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/* no need to build any PRD tables for DMA */
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.qc_prep = ata_noop_qc_prep,
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.sff_data_xfer = ata_sff_data_xfer_noirq,
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.bmdma_setup = pata_icside_bmdma_setup,
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.bmdma_start = pata_icside_bmdma_start,
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.bmdma_stop = pata_icside_bmdma_stop,
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.bmdma_status = pata_icside_bmdma_status,
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.cable_detect = ata_cable_40wire,
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.set_dmamode = pata_icside_set_dmamode,
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.postreset = pata_icside_postreset,
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.port_start = ATA_OP_NULL, /* don't need PRD table */
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};
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static void pata_icside_setup_ioaddr(struct ata_port *ap, void __iomem *base,
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struct pata_icside_info *info,
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const struct portinfo *port)
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{
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struct ata_ioports *ioaddr = &ap->ioaddr;
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void __iomem *cmd = base + port->dataoffset;
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ioaddr->cmd_addr = cmd;
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ioaddr->data_addr = cmd + (ATA_REG_DATA << port->stepping);
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ioaddr->error_addr = cmd + (ATA_REG_ERR << port->stepping);
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ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << port->stepping);
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ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << port->stepping);
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ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << port->stepping);
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ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << port->stepping);
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ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << port->stepping);
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ioaddr->device_addr = cmd + (ATA_REG_DEVICE << port->stepping);
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ioaddr->status_addr = cmd + (ATA_REG_STATUS << port->stepping);
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ioaddr->command_addr = cmd + (ATA_REG_CMD << port->stepping);
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ioaddr->ctl_addr = base + port->ctrloffset;
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ioaddr->altstatus_addr = ioaddr->ctl_addr;
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ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
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info->raw_base + port->dataoffset,
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info->raw_base + port->ctrloffset);
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if (info->raw_ioc_base)
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ata_port_desc(ap, "iocbase 0x%lx", info->raw_ioc_base);
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}
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static int pata_icside_register_v5(struct pata_icside_info *info)
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{
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struct pata_icside_state *state = info->state;
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void __iomem *base;
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base = ecardm_iomap(info->ec, ECARD_RES_MEMC, 0, 0);
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if (!base)
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return -ENOMEM;
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state->irq_port = base;
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info->base = base;
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info->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
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info->irqmask = 1;
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info->irqops = &pata_icside_ops_arcin_v5;
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info->nr_ports = 1;
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info->port[0] = &pata_icside_portinfo_v5;
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info->raw_base = ecard_resource_start(info->ec, ECARD_RES_MEMC);
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return 0;
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}
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static int pata_icside_register_v6(struct pata_icside_info *info)
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{
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struct pata_icside_state *state = info->state;
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struct expansion_card *ec = info->ec;
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void __iomem *ioc_base, *easi_base;
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unsigned int sel = 0;
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ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
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if (!ioc_base)
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return -ENOMEM;
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easi_base = ioc_base;
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if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
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easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
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if (!easi_base)
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return -ENOMEM;
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/*
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* Enable access to the EASI region.
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*/
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sel = 1 << 5;
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}
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writeb(sel, ioc_base);
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state->irq_port = easi_base;
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state->ioc_base = ioc_base;
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state->port[0].port_sel = sel;
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state->port[1].port_sel = sel | 1;
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info->base = easi_base;
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info->irqops = &pata_icside_ops_arcin_v6;
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info->nr_ports = 2;
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info->port[0] = &pata_icside_portinfo_v6_1;
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info->port[1] = &pata_icside_portinfo_v6_2;
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info->raw_base = ecard_resource_start(ec, ECARD_RES_EASI);
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info->raw_ioc_base = ecard_resource_start(ec, ECARD_RES_IOCFAST);
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return icside_dma_init(info);
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}
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static int pata_icside_add_ports(struct pata_icside_info *info)
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{
|
||||
struct expansion_card *ec = info->ec;
|
||||
struct ata_host *host;
|
||||
int i;
|
||||
|
||||
if (info->irqaddr) {
|
||||
ec->irqaddr = info->irqaddr;
|
||||
ec->irqmask = info->irqmask;
|
||||
}
|
||||
if (info->irqops)
|
||||
ecard_setirq(ec, info->irqops, info->state);
|
||||
|
||||
/*
|
||||
* Be on the safe side - disable interrupts
|
||||
*/
|
||||
ec->ops->irqdisable(ec, ec->irq);
|
||||
|
||||
host = ata_host_alloc(&ec->dev, info->nr_ports);
|
||||
if (!host)
|
||||
return -ENOMEM;
|
||||
|
||||
host->private_data = info->state;
|
||||
host->flags = ATA_HOST_SIMPLEX;
|
||||
|
||||
for (i = 0; i < info->nr_ports; i++) {
|
||||
struct ata_port *ap = host->ports[i];
|
||||
|
||||
ap->pio_mask = ATA_PIO4;
|
||||
ap->mwdma_mask = info->mwdma_mask;
|
||||
ap->flags |= ATA_FLAG_SLAVE_POSS;
|
||||
ap->ops = &pata_icside_port_ops;
|
||||
|
||||
pata_icside_setup_ioaddr(ap, info->base, info, info->port[i]);
|
||||
}
|
||||
|
||||
return ata_host_activate(host, ec->irq, ata_bmdma_interrupt, 0,
|
||||
&pata_icside_sht);
|
||||
}
|
||||
|
||||
static int pata_icside_probe(struct expansion_card *ec,
|
||||
const struct ecard_id *id)
|
||||
{
|
||||
struct pata_icside_state *state;
|
||||
struct pata_icside_info info;
|
||||
void __iomem *idmem;
|
||||
int ret;
|
||||
|
||||
ret = ecard_request_resources(ec);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL);
|
||||
if (!state) {
|
||||
ret = -ENOMEM;
|
||||
goto release;
|
||||
}
|
||||
|
||||
state->type = ICS_TYPE_NOTYPE;
|
||||
state->dma = NO_DMA;
|
||||
|
||||
idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
|
||||
if (idmem) {
|
||||
unsigned int type;
|
||||
|
||||
type = readb(idmem + ICS_IDENT_OFFSET) & 1;
|
||||
type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
|
||||
type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
|
||||
type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
|
||||
ecardm_iounmap(ec, idmem);
|
||||
|
||||
state->type = type;
|
||||
}
|
||||
|
||||
memset(&info, 0, sizeof(info));
|
||||
info.state = state;
|
||||
info.ec = ec;
|
||||
|
||||
switch (state->type) {
|
||||
case ICS_TYPE_A3IN:
|
||||
dev_warn(&ec->dev, "A3IN unsupported\n");
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
|
||||
case ICS_TYPE_A3USER:
|
||||
dev_warn(&ec->dev, "A3USER unsupported\n");
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
|
||||
case ICS_TYPE_V5:
|
||||
ret = pata_icside_register_v5(&info);
|
||||
break;
|
||||
|
||||
case ICS_TYPE_V6:
|
||||
ret = pata_icside_register_v6(&info);
|
||||
break;
|
||||
|
||||
default:
|
||||
dev_warn(&ec->dev, "unknown interface type\n");
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret == 0)
|
||||
ret = pata_icside_add_ports(&info);
|
||||
|
||||
if (ret == 0)
|
||||
goto out;
|
||||
|
||||
release:
|
||||
ecard_release_resources(ec);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void pata_icside_shutdown(struct expansion_card *ec)
|
||||
{
|
||||
struct ata_host *host = ecard_get_drvdata(ec);
|
||||
unsigned long flags;
|
||||
|
||||
/*
|
||||
* Disable interrupts from this card. We need to do
|
||||
* this before disabling EASI since we may be accessing
|
||||
* this register via that region.
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
ec->ops->irqdisable(ec, ec->irq);
|
||||
local_irq_restore(flags);
|
||||
|
||||
/*
|
||||
* Reset the ROM pointer so that we can read the ROM
|
||||
* after a soft reboot. This also disables access to
|
||||
* the IDE taskfile via the EASI region.
|
||||
*/
|
||||
if (host) {
|
||||
struct pata_icside_state *state = host->private_data;
|
||||
if (state->ioc_base)
|
||||
writeb(0, state->ioc_base);
|
||||
}
|
||||
}
|
||||
|
||||
static void pata_icside_remove(struct expansion_card *ec)
|
||||
{
|
||||
struct ata_host *host = ecard_get_drvdata(ec);
|
||||
struct pata_icside_state *state = host->private_data;
|
||||
|
||||
ata_host_detach(host);
|
||||
|
||||
pata_icside_shutdown(ec);
|
||||
|
||||
/*
|
||||
* don't NULL out the drvdata - devres/libata wants it
|
||||
* to free the ata_host structure.
|
||||
*/
|
||||
if (state->dma != NO_DMA)
|
||||
free_dma(state->dma);
|
||||
|
||||
ecard_release_resources(ec);
|
||||
}
|
||||
|
||||
static const struct ecard_id pata_icside_ids[] = {
|
||||
{ MANU_ICS, PROD_ICS_IDE },
|
||||
{ MANU_ICS2, PROD_ICS2_IDE },
|
||||
{ 0xffff, 0xffff }
|
||||
};
|
||||
|
||||
static struct ecard_driver pata_icside_driver = {
|
||||
.probe = pata_icside_probe,
|
||||
.remove = pata_icside_remove,
|
||||
.shutdown = pata_icside_shutdown,
|
||||
.id_table = pata_icside_ids,
|
||||
.drv = {
|
||||
.name = DRV_NAME,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init pata_icside_init(void)
|
||||
{
|
||||
return ecard_register_driver(&pata_icside_driver);
|
||||
}
|
||||
|
||||
static void __exit pata_icside_exit(void)
|
||||
{
|
||||
ecard_remove_driver(&pata_icside_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("ICS PATA driver");
|
||||
|
||||
module_init(pata_icside_init);
|
||||
module_exit(pata_icside_exit);
|
||||
Loading…
Add table
Add a link
Reference in a new issue