mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 15:48:52 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
325
drivers/gpu/drm/qxl/qxl_object.c
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325
drivers/gpu/drm/qxl/qxl_object.c
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@ -0,0 +1,325 @@
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/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alon Levy
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*/
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#include "qxl_drv.h"
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#include "qxl_object.h"
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#include <linux/io-mapping.h>
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static void qxl_ttm_bo_destroy(struct ttm_buffer_object *tbo)
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{
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struct qxl_bo *bo;
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struct qxl_device *qdev;
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bo = container_of(tbo, struct qxl_bo, tbo);
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qdev = (struct qxl_device *)bo->gem_base.dev->dev_private;
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qxl_surface_evict(qdev, bo, false);
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mutex_lock(&qdev->gem.mutex);
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list_del_init(&bo->list);
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mutex_unlock(&qdev->gem.mutex);
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drm_gem_object_release(&bo->gem_base);
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kfree(bo);
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}
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bool qxl_ttm_bo_is_qxl_bo(struct ttm_buffer_object *bo)
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{
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if (bo->destroy == &qxl_ttm_bo_destroy)
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return true;
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return false;
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}
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void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain, bool pinned)
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{
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u32 c = 0;
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u32 pflag = pinned ? TTM_PL_FLAG_NO_EVICT : 0;
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unsigned i;
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qbo->placement.placement = qbo->placements;
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qbo->placement.busy_placement = qbo->placements;
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if (domain == QXL_GEM_DOMAIN_VRAM)
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qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
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if (domain == QXL_GEM_DOMAIN_SURFACE)
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qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV0 | pflag;
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if (domain == QXL_GEM_DOMAIN_CPU)
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qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | pflag;
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if (!c)
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qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
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qbo->placement.num_placement = c;
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qbo->placement.num_busy_placement = c;
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for (i = 0; i < c; ++i) {
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qbo->placements[i].fpfn = 0;
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qbo->placements[i].lpfn = 0;
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}
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}
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int qxl_bo_create(struct qxl_device *qdev,
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unsigned long size, bool kernel, bool pinned, u32 domain,
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struct qxl_surface *surf,
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struct qxl_bo **bo_ptr)
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{
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struct qxl_bo *bo;
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enum ttm_bo_type type;
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int r;
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if (kernel)
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type = ttm_bo_type_kernel;
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else
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type = ttm_bo_type_device;
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*bo_ptr = NULL;
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bo = kzalloc(sizeof(struct qxl_bo), GFP_KERNEL);
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if (bo == NULL)
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return -ENOMEM;
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size = roundup(size, PAGE_SIZE);
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r = drm_gem_object_init(qdev->ddev, &bo->gem_base, size);
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if (unlikely(r)) {
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kfree(bo);
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return r;
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}
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bo->type = domain;
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bo->pin_count = pinned ? 1 : 0;
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bo->surface_id = 0;
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INIT_LIST_HEAD(&bo->list);
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if (surf)
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bo->surf = *surf;
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qxl_ttm_placement_from_domain(bo, domain, pinned);
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r = ttm_bo_init(&qdev->mman.bdev, &bo->tbo, size, type,
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&bo->placement, 0, !kernel, NULL, size,
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NULL, NULL, &qxl_ttm_bo_destroy);
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if (unlikely(r != 0)) {
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if (r != -ERESTARTSYS)
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dev_err(qdev->dev,
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"object_init failed for (%lu, 0x%08X)\n",
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size, domain);
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return r;
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}
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*bo_ptr = bo;
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return 0;
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}
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int qxl_bo_kmap(struct qxl_bo *bo, void **ptr)
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{
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bool is_iomem;
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int r;
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if (bo->kptr) {
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if (ptr)
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*ptr = bo->kptr;
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return 0;
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}
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r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
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if (r)
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return r;
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bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
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if (ptr)
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*ptr = bo->kptr;
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return 0;
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}
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void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev,
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struct qxl_bo *bo, int page_offset)
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{
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struct ttm_mem_type_manager *man = &bo->tbo.bdev->man[bo->tbo.mem.mem_type];
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void *rptr;
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int ret;
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struct io_mapping *map;
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if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
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map = qdev->vram_mapping;
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else if (bo->tbo.mem.mem_type == TTM_PL_PRIV0)
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map = qdev->surface_mapping;
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else
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goto fallback;
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(void) ttm_mem_io_lock(man, false);
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ret = ttm_mem_io_reserve(bo->tbo.bdev, &bo->tbo.mem);
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ttm_mem_io_unlock(man);
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return io_mapping_map_atomic_wc(map, bo->tbo.mem.bus.offset + page_offset);
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fallback:
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if (bo->kptr) {
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rptr = bo->kptr + (page_offset * PAGE_SIZE);
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return rptr;
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}
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ret = qxl_bo_kmap(bo, &rptr);
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if (ret)
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return NULL;
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rptr += page_offset * PAGE_SIZE;
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return rptr;
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}
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void qxl_bo_kunmap(struct qxl_bo *bo)
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{
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if (bo->kptr == NULL)
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return;
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bo->kptr = NULL;
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ttm_bo_kunmap(&bo->kmap);
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}
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void qxl_bo_kunmap_atomic_page(struct qxl_device *qdev,
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struct qxl_bo *bo, void *pmap)
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{
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struct ttm_mem_type_manager *man = &bo->tbo.bdev->man[bo->tbo.mem.mem_type];
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struct io_mapping *map;
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if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
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map = qdev->vram_mapping;
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else if (bo->tbo.mem.mem_type == TTM_PL_PRIV0)
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map = qdev->surface_mapping;
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else
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goto fallback;
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io_mapping_unmap_atomic(pmap);
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(void) ttm_mem_io_lock(man, false);
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ttm_mem_io_free(bo->tbo.bdev, &bo->tbo.mem);
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ttm_mem_io_unlock(man);
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return ;
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fallback:
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qxl_bo_kunmap(bo);
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}
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void qxl_bo_unref(struct qxl_bo **bo)
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{
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struct ttm_buffer_object *tbo;
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if ((*bo) == NULL)
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return;
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tbo = &((*bo)->tbo);
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ttm_bo_unref(&tbo);
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if (tbo == NULL)
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*bo = NULL;
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}
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struct qxl_bo *qxl_bo_ref(struct qxl_bo *bo)
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{
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ttm_bo_reference(&bo->tbo);
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return bo;
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}
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int qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr)
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{
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struct qxl_device *qdev = (struct qxl_device *)bo->gem_base.dev->dev_private;
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int r;
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if (bo->pin_count) {
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bo->pin_count++;
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if (gpu_addr)
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*gpu_addr = qxl_bo_gpu_offset(bo);
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return 0;
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}
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qxl_ttm_placement_from_domain(bo, domain, true);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (likely(r == 0)) {
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bo->pin_count = 1;
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if (gpu_addr != NULL)
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*gpu_addr = qxl_bo_gpu_offset(bo);
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}
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if (unlikely(r != 0))
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dev_err(qdev->dev, "%p pin failed\n", bo);
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return r;
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}
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int qxl_bo_unpin(struct qxl_bo *bo)
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{
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struct qxl_device *qdev = (struct qxl_device *)bo->gem_base.dev->dev_private;
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int r, i;
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if (!bo->pin_count) {
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dev_warn(qdev->dev, "%p unpin not necessary\n", bo);
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return 0;
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}
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bo->pin_count--;
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if (bo->pin_count)
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return 0;
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for (i = 0; i < bo->placement.num_placement; i++)
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bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (unlikely(r != 0))
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dev_err(qdev->dev, "%p validate failed for unpin\n", bo);
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return r;
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}
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void qxl_bo_force_delete(struct qxl_device *qdev)
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{
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struct qxl_bo *bo, *n;
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if (list_empty(&qdev->gem.objects))
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return;
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dev_err(qdev->dev, "Userspace still has active objects !\n");
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list_for_each_entry_safe(bo, n, &qdev->gem.objects, list) {
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mutex_lock(&qdev->ddev->struct_mutex);
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dev_err(qdev->dev, "%p %p %lu %lu force free\n",
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&bo->gem_base, bo, (unsigned long)bo->gem_base.size,
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*((unsigned long *)&bo->gem_base.refcount));
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mutex_lock(&qdev->gem.mutex);
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list_del_init(&bo->list);
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mutex_unlock(&qdev->gem.mutex);
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/* this should unref the ttm bo */
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drm_gem_object_unreference(&bo->gem_base);
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mutex_unlock(&qdev->ddev->struct_mutex);
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}
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}
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int qxl_bo_init(struct qxl_device *qdev)
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{
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return qxl_ttm_init(qdev);
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}
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void qxl_bo_fini(struct qxl_device *qdev)
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{
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qxl_ttm_fini(qdev);
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}
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int qxl_bo_check_id(struct qxl_device *qdev, struct qxl_bo *bo)
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{
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int ret;
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if (bo->type == QXL_GEM_DOMAIN_SURFACE && bo->surface_id == 0) {
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/* allocate a surface id for this surface now */
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ret = qxl_surface_id_alloc(qdev, bo);
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if (ret)
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return ret;
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ret = qxl_hw_surface_alloc(qdev, bo, NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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int qxl_surf_evict(struct qxl_device *qdev)
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{
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return ttm_bo_evict_mm(&qdev->mman.bdev, TTM_PL_PRIV0);
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}
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int qxl_vram_evict(struct qxl_device *qdev)
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{
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return ttm_bo_evict_mm(&qdev->mman.bdev, TTM_PL_VRAM);
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}
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