mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 23:58:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
678
drivers/gpu/drm/tilcdc/tilcdc_drv.c
Normal file
678
drivers/gpu/drm/tilcdc/tilcdc_drv.c
Normal file
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@ -0,0 +1,678 @@
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/*
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* Copyright (C) 2012 Texas Instruments
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* LCDC DRM driver, based on da8xx-fb */
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#include "tilcdc_drv.h"
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#include "tilcdc_regs.h"
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#include "tilcdc_tfp410.h"
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#include "tilcdc_slave.h"
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#include "tilcdc_panel.h"
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#include "drm_fb_helper.h"
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static LIST_HEAD(module_list);
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static bool slave_probing;
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void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
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const struct tilcdc_module_ops *funcs)
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{
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mod->name = name;
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mod->funcs = funcs;
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INIT_LIST_HEAD(&mod->list);
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list_add(&mod->list, &module_list);
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}
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void tilcdc_module_cleanup(struct tilcdc_module *mod)
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{
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list_del(&mod->list);
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}
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void tilcdc_slave_probedefer(bool defered)
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{
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slave_probing = defered;
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}
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static struct of_device_id tilcdc_of_match[];
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static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
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struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
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{
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return drm_fb_cma_create(dev, file_priv, mode_cmd);
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}
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static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
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{
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struct tilcdc_drm_private *priv = dev->dev_private;
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if (priv->fbdev)
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drm_fbdev_cma_hotplug_event(priv->fbdev);
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}
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static const struct drm_mode_config_funcs mode_config_funcs = {
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.fb_create = tilcdc_fb_create,
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.output_poll_changed = tilcdc_fb_output_poll_changed,
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};
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static int modeset_init(struct drm_device *dev)
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{
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struct tilcdc_drm_private *priv = dev->dev_private;
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struct tilcdc_module *mod;
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drm_mode_config_init(dev);
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priv->crtc = tilcdc_crtc_create(dev);
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list_for_each_entry(mod, &module_list, list) {
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DBG("loading module: %s", mod->name);
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mod->funcs->modeset_init(mod, dev);
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}
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if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
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/* oh nos! */
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dev_err(dev->dev, "no encoders/connectors found\n");
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drm_mode_config_cleanup(dev);
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return -ENXIO;
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}
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dev->mode_config.min_width = 0;
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dev->mode_config.min_height = 0;
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dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
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dev->mode_config.max_height = 2048;
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dev->mode_config.funcs = &mode_config_funcs;
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return 0;
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}
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#ifdef CONFIG_CPU_FREQ
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static int cpufreq_transition(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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struct tilcdc_drm_private *priv = container_of(nb,
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struct tilcdc_drm_private, freq_transition);
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if (val == CPUFREQ_POSTCHANGE) {
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if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
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priv->lcd_fck_rate = clk_get_rate(priv->clk);
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tilcdc_crtc_update_clk(priv->crtc);
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}
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}
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return 0;
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}
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#endif
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/*
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* DRM operations:
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*/
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static int tilcdc_unload(struct drm_device *dev)
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{
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struct tilcdc_drm_private *priv = dev->dev_private;
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drm_fbdev_cma_fini(priv->fbdev);
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drm_kms_helper_poll_fini(dev);
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drm_mode_config_cleanup(dev);
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drm_vblank_cleanup(dev);
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pm_runtime_get_sync(dev->dev);
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drm_irq_uninstall(dev);
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pm_runtime_put_sync(dev->dev);
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#ifdef CONFIG_CPU_FREQ
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cpufreq_unregister_notifier(&priv->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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#endif
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if (priv->clk)
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clk_put(priv->clk);
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if (priv->mmio)
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iounmap(priv->mmio);
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flush_workqueue(priv->wq);
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destroy_workqueue(priv->wq);
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dev->dev_private = NULL;
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pm_runtime_disable(dev->dev);
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kfree(priv);
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return 0;
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}
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static int tilcdc_load(struct drm_device *dev, unsigned long flags)
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{
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struct platform_device *pdev = dev->platformdev;
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struct device_node *node = pdev->dev.of_node;
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struct tilcdc_drm_private *priv;
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struct tilcdc_module *mod;
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struct resource *res;
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u32 bpp = 0;
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int ret;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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dev_err(dev->dev, "failed to allocate private data\n");
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return -ENOMEM;
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}
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dev->dev_private = priv;
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priv->wq = alloc_ordered_workqueue("tilcdc", 0);
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if (!priv->wq) {
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ret = -ENOMEM;
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goto fail_free_priv;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev->dev, "failed to get memory resource\n");
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ret = -EINVAL;
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goto fail_free_wq;
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}
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priv->mmio = ioremap_nocache(res->start, resource_size(res));
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if (!priv->mmio) {
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dev_err(dev->dev, "failed to ioremap\n");
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ret = -ENOMEM;
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goto fail_free_wq;
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}
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priv->clk = clk_get(dev->dev, "fck");
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if (IS_ERR(priv->clk)) {
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dev_err(dev->dev, "failed to get functional clock\n");
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ret = -ENODEV;
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goto fail_iounmap;
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}
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priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
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if (IS_ERR(priv->clk)) {
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dev_err(dev->dev, "failed to get display clock\n");
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ret = -ENODEV;
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goto fail_put_clk;
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}
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#ifdef CONFIG_CPU_FREQ
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priv->lcd_fck_rate = clk_get_rate(priv->clk);
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priv->freq_transition.notifier_call = cpufreq_transition;
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ret = cpufreq_register_notifier(&priv->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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if (ret) {
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dev_err(dev->dev, "failed to register cpufreq notifier\n");
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goto fail_put_disp_clk;
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}
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#endif
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if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
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priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
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DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
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if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
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priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
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DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
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if (of_property_read_u32(node, "ti,max-pixelclock",
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&priv->max_pixelclock))
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priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
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DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
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pm_runtime_enable(dev->dev);
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/* Determine LCD IP Version */
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pm_runtime_get_sync(dev->dev);
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switch (tilcdc_read(dev, LCDC_PID_REG)) {
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case 0x4c100102:
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priv->rev = 1;
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break;
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case 0x4f200800:
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case 0x4f201000:
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priv->rev = 2;
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break;
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default:
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dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
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"defaulting to LCD revision 1\n",
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tilcdc_read(dev, LCDC_PID_REG));
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priv->rev = 1;
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break;
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}
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pm_runtime_put_sync(dev->dev);
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ret = modeset_init(dev);
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if (ret < 0) {
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dev_err(dev->dev, "failed to initialize mode setting\n");
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goto fail_cpufreq_unregister;
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}
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ret = drm_vblank_init(dev, 1);
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if (ret < 0) {
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dev_err(dev->dev, "failed to initialize vblank\n");
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goto fail_mode_config_cleanup;
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}
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pm_runtime_get_sync(dev->dev);
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ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
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pm_runtime_put_sync(dev->dev);
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if (ret < 0) {
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dev_err(dev->dev, "failed to install IRQ handler\n");
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goto fail_vblank_cleanup;
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}
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platform_set_drvdata(pdev, dev);
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list_for_each_entry(mod, &module_list, list) {
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DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
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bpp = mod->preferred_bpp;
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if (bpp > 0)
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break;
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}
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priv->fbdev = drm_fbdev_cma_init(dev, bpp,
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dev->mode_config.num_crtc,
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dev->mode_config.num_connector);
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if (IS_ERR(priv->fbdev)) {
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ret = PTR_ERR(priv->fbdev);
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goto fail_irq_uninstall;
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}
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drm_kms_helper_poll_init(dev);
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return 0;
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fail_irq_uninstall:
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pm_runtime_get_sync(dev->dev);
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drm_irq_uninstall(dev);
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pm_runtime_put_sync(dev->dev);
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|
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fail_vblank_cleanup:
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drm_vblank_cleanup(dev);
|
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|
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fail_mode_config_cleanup:
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drm_mode_config_cleanup(dev);
|
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|
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fail_cpufreq_unregister:
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pm_runtime_disable(dev->dev);
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#ifdef CONFIG_CPU_FREQ
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cpufreq_unregister_notifier(&priv->freq_transition,
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CPUFREQ_TRANSITION_NOTIFIER);
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fail_put_disp_clk:
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clk_put(priv->disp_clk);
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#endif
|
||||
|
||||
fail_put_clk:
|
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clk_put(priv->clk);
|
||||
|
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fail_iounmap:
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iounmap(priv->mmio);
|
||||
|
||||
fail_free_wq:
|
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flush_workqueue(priv->wq);
|
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destroy_workqueue(priv->wq);
|
||||
|
||||
fail_free_priv:
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||||
dev->dev_private = NULL;
|
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kfree(priv);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
|
||||
{
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
|
||||
tilcdc_crtc_cancel_page_flip(priv->crtc, file);
|
||||
}
|
||||
|
||||
static void tilcdc_lastclose(struct drm_device *dev)
|
||||
{
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
drm_fbdev_cma_restore_mode(priv->fbdev);
|
||||
}
|
||||
|
||||
static irqreturn_t tilcdc_irq(int irq, void *arg)
|
||||
{
|
||||
struct drm_device *dev = arg;
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
return tilcdc_crtc_irq(priv->crtc);
|
||||
}
|
||||
|
||||
static void tilcdc_irq_preinstall(struct drm_device *dev)
|
||||
{
|
||||
tilcdc_clear_irqstatus(dev, 0xffffffff);
|
||||
}
|
||||
|
||||
static int tilcdc_irq_postinstall(struct drm_device *dev)
|
||||
{
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
|
||||
/* enable FIFO underflow irq: */
|
||||
if (priv->rev == 1)
|
||||
tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
|
||||
else
|
||||
tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void tilcdc_irq_uninstall(struct drm_device *dev)
|
||||
{
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
|
||||
/* disable irqs that we might have enabled: */
|
||||
if (priv->rev == 1) {
|
||||
tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
|
||||
LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
|
||||
tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
|
||||
} else {
|
||||
tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
|
||||
LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
|
||||
LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
|
||||
LCDC_FRAME_DONE);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static void enable_vblank(struct drm_device *dev, bool enable)
|
||||
{
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
u32 reg, mask;
|
||||
|
||||
if (priv->rev == 1) {
|
||||
reg = LCDC_DMA_CTRL_REG;
|
||||
mask = LCDC_V1_END_OF_FRAME_INT_ENA;
|
||||
} else {
|
||||
reg = LCDC_INT_ENABLE_SET_REG;
|
||||
mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
|
||||
LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
|
||||
}
|
||||
|
||||
if (enable)
|
||||
tilcdc_set(dev, reg, mask);
|
||||
else
|
||||
tilcdc_clear(dev, reg, mask);
|
||||
}
|
||||
|
||||
static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
|
||||
{
|
||||
enable_vblank(dev, true);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
|
||||
{
|
||||
enable_vblank(dev, false);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
|
||||
static const struct {
|
||||
const char *name;
|
||||
uint8_t rev;
|
||||
uint8_t save;
|
||||
uint32_t reg;
|
||||
} registers[] = {
|
||||
#define REG(rev, save, reg) { #reg, rev, save, reg }
|
||||
/* exists in revision 1: */
|
||||
REG(1, false, LCDC_PID_REG),
|
||||
REG(1, true, LCDC_CTRL_REG),
|
||||
REG(1, false, LCDC_STAT_REG),
|
||||
REG(1, true, LCDC_RASTER_CTRL_REG),
|
||||
REG(1, true, LCDC_RASTER_TIMING_0_REG),
|
||||
REG(1, true, LCDC_RASTER_TIMING_1_REG),
|
||||
REG(1, true, LCDC_RASTER_TIMING_2_REG),
|
||||
REG(1, true, LCDC_DMA_CTRL_REG),
|
||||
REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
|
||||
REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
|
||||
REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
|
||||
REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
|
||||
/* new in revision 2: */
|
||||
REG(2, false, LCDC_RAW_STAT_REG),
|
||||
REG(2, false, LCDC_MASKED_STAT_REG),
|
||||
REG(2, false, LCDC_INT_ENABLE_SET_REG),
|
||||
REG(2, false, LCDC_INT_ENABLE_CLR_REG),
|
||||
REG(2, false, LCDC_END_OF_INT_IND_REG),
|
||||
REG(2, true, LCDC_CLK_ENABLE_REG),
|
||||
REG(2, true, LCDC_INT_ENABLE_SET_REG),
|
||||
#undef REG
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static int tilcdc_regs_show(struct seq_file *m, void *arg)
|
||||
{
|
||||
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
||||
struct drm_device *dev = node->minor->dev;
|
||||
struct tilcdc_drm_private *priv = dev->dev_private;
|
||||
unsigned i;
|
||||
|
||||
pm_runtime_get_sync(dev->dev);
|
||||
|
||||
seq_printf(m, "revision: %d\n", priv->rev);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(registers); i++)
|
||||
if (priv->rev >= registers[i].rev)
|
||||
seq_printf(m, "%s:\t %08x\n", registers[i].name,
|
||||
tilcdc_read(dev, registers[i].reg));
|
||||
|
||||
pm_runtime_put_sync(dev->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tilcdc_mm_show(struct seq_file *m, void *arg)
|
||||
{
|
||||
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
||||
struct drm_device *dev = node->minor->dev;
|
||||
return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
|
||||
}
|
||||
|
||||
static struct drm_info_list tilcdc_debugfs_list[] = {
|
||||
{ "regs", tilcdc_regs_show, 0 },
|
||||
{ "mm", tilcdc_mm_show, 0 },
|
||||
{ "fb", drm_fb_cma_debugfs_show, 0 },
|
||||
};
|
||||
|
||||
static int tilcdc_debugfs_init(struct drm_minor *minor)
|
||||
{
|
||||
struct drm_device *dev = minor->dev;
|
||||
struct tilcdc_module *mod;
|
||||
int ret;
|
||||
|
||||
ret = drm_debugfs_create_files(tilcdc_debugfs_list,
|
||||
ARRAY_SIZE(tilcdc_debugfs_list),
|
||||
minor->debugfs_root, minor);
|
||||
|
||||
list_for_each_entry(mod, &module_list, list)
|
||||
if (mod->funcs->debugfs_init)
|
||||
mod->funcs->debugfs_init(mod, minor);
|
||||
|
||||
if (ret) {
|
||||
dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
|
||||
{
|
||||
struct tilcdc_module *mod;
|
||||
drm_debugfs_remove_files(tilcdc_debugfs_list,
|
||||
ARRAY_SIZE(tilcdc_debugfs_list), minor);
|
||||
|
||||
list_for_each_entry(mod, &module_list, list)
|
||||
if (mod->funcs->debugfs_cleanup)
|
||||
mod->funcs->debugfs_cleanup(mod, minor);
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct file_operations fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = drm_open,
|
||||
.release = drm_release,
|
||||
.unlocked_ioctl = drm_ioctl,
|
||||
#ifdef CONFIG_COMPAT
|
||||
.compat_ioctl = drm_compat_ioctl,
|
||||
#endif
|
||||
.poll = drm_poll,
|
||||
.read = drm_read,
|
||||
.llseek = no_llseek,
|
||||
.mmap = drm_gem_cma_mmap,
|
||||
};
|
||||
|
||||
static struct drm_driver tilcdc_driver = {
|
||||
.driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
|
||||
.load = tilcdc_load,
|
||||
.unload = tilcdc_unload,
|
||||
.preclose = tilcdc_preclose,
|
||||
.lastclose = tilcdc_lastclose,
|
||||
.set_busid = drm_platform_set_busid,
|
||||
.irq_handler = tilcdc_irq,
|
||||
.irq_preinstall = tilcdc_irq_preinstall,
|
||||
.irq_postinstall = tilcdc_irq_postinstall,
|
||||
.irq_uninstall = tilcdc_irq_uninstall,
|
||||
.get_vblank_counter = drm_vblank_count,
|
||||
.enable_vblank = tilcdc_enable_vblank,
|
||||
.disable_vblank = tilcdc_disable_vblank,
|
||||
.gem_free_object = drm_gem_cma_free_object,
|
||||
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
||||
.dumb_create = drm_gem_cma_dumb_create,
|
||||
.dumb_map_offset = drm_gem_cma_dumb_map_offset,
|
||||
.dumb_destroy = drm_gem_dumb_destroy,
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
.debugfs_init = tilcdc_debugfs_init,
|
||||
.debugfs_cleanup = tilcdc_debugfs_cleanup,
|
||||
#endif
|
||||
.fops = &fops,
|
||||
.name = "tilcdc",
|
||||
.desc = "TI LCD Controller DRM",
|
||||
.date = "20121205",
|
||||
.major = 1,
|
||||
.minor = 0,
|
||||
};
|
||||
|
||||
/*
|
||||
* Power management:
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int tilcdc_pm_suspend(struct device *dev)
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct tilcdc_drm_private *priv = ddev->dev_private;
|
||||
unsigned i, n = 0;
|
||||
|
||||
drm_kms_helper_poll_disable(ddev);
|
||||
|
||||
/* Save register state: */
|
||||
for (i = 0; i < ARRAY_SIZE(registers); i++)
|
||||
if (registers[i].save && (priv->rev >= registers[i].rev))
|
||||
priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tilcdc_pm_resume(struct device *dev)
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
struct tilcdc_drm_private *priv = ddev->dev_private;
|
||||
unsigned i, n = 0;
|
||||
|
||||
/* Restore register state: */
|
||||
for (i = 0; i < ARRAY_SIZE(registers); i++)
|
||||
if (registers[i].save && (priv->rev >= registers[i].rev))
|
||||
tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
|
||||
|
||||
drm_kms_helper_poll_enable(ddev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops tilcdc_pm_ops = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
|
||||
};
|
||||
|
||||
/*
|
||||
* Platform driver:
|
||||
*/
|
||||
|
||||
static int tilcdc_pdev_probe(struct platform_device *pdev)
|
||||
{
|
||||
/* bail out early if no DT data: */
|
||||
if (!pdev->dev.of_node) {
|
||||
dev_err(&pdev->dev, "device-tree data is missing\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
/* defer probing if slave is in deferred probing */
|
||||
if (slave_probing == true)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
return drm_platform_init(&tilcdc_driver, pdev);
|
||||
}
|
||||
|
||||
static int tilcdc_pdev_remove(struct platform_device *pdev)
|
||||
{
|
||||
drm_put_dev(platform_get_drvdata(pdev));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id tilcdc_of_match[] = {
|
||||
{ .compatible = "ti,am33xx-tilcdc", },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tilcdc_of_match);
|
||||
|
||||
static struct platform_driver tilcdc_platform_driver = {
|
||||
.probe = tilcdc_pdev_probe,
|
||||
.remove = tilcdc_pdev_remove,
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "tilcdc",
|
||||
.pm = &tilcdc_pm_ops,
|
||||
.of_match_table = tilcdc_of_match,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init tilcdc_drm_init(void)
|
||||
{
|
||||
DBG("init");
|
||||
tilcdc_tfp410_init();
|
||||
tilcdc_slave_init();
|
||||
tilcdc_panel_init();
|
||||
return platform_driver_register(&tilcdc_platform_driver);
|
||||
}
|
||||
|
||||
static void __exit tilcdc_drm_fini(void)
|
||||
{
|
||||
DBG("fini");
|
||||
platform_driver_unregister(&tilcdc_platform_driver);
|
||||
tilcdc_panel_fini();
|
||||
tilcdc_slave_fini();
|
||||
tilcdc_tfp410_fini();
|
||||
}
|
||||
|
||||
module_init(tilcdc_drm_init);
|
||||
module_exit(tilcdc_drm_fini);
|
||||
|
||||
MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
|
||||
MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Add table
Add a link
Reference in a new issue