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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 01:28:05 -04:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
351
drivers/i2c/busses/i2c-designware-platdrv.c
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351
drivers/i2c/busses/i2c-designware-platdrv.c
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/*
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* Synopsys DesignWare I2C adapter driver (master only).
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*
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* Based on the TI DAVINCI I2C adapter driver.
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*
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* Copyright (C) 2006 Texas Instruments.
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* Copyright (C) 2007 MontaVista Software Inc.
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* Copyright (C) 2009 Provigent Ltd.
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*
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* ----------------------------------------------------------------------------
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* ----------------------------------------------------------------------------
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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#include <linux/platform_data/i2c-designware.h>
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#include "i2c-designware-core.h"
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static struct i2c_algorithm i2c_dw_algo = {
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.master_xfer = i2c_dw_xfer,
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.functionality = i2c_dw_func,
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};
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static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
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{
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return clk_get_rate(dev->clk)/1000;
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}
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#ifdef CONFIG_ACPI
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static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
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u16 *hcnt, u16 *lcnt, u32 *sda_hold)
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{
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struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
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acpi_handle handle = ACPI_HANDLE(&pdev->dev);
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union acpi_object *obj;
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if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
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return;
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obj = (union acpi_object *)buf.pointer;
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if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
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const union acpi_object *objs = obj->package.elements;
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*hcnt = (u16)objs[0].integer.value;
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*lcnt = (u16)objs[1].integer.value;
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if (sda_hold)
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*sda_hold = (u32)objs[2].integer.value;
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}
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kfree(buf.pointer);
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}
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static int dw_i2c_acpi_configure(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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const struct acpi_device_id *id;
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dev->adapter.nr = -1;
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dev->tx_fifo_depth = 32;
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dev->rx_fifo_depth = 32;
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/*
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* Try to get SDA hold time and *CNT values from an ACPI method if
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* it exists for both supported speed modes.
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*/
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dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, NULL);
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dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt,
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&dev->sda_hold_time);
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/*
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* Provide a way for Designware I2C host controllers that are not
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* based on Intel LPSS to specify their input clock frequency via
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* id->driver_data.
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*/
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id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
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if (id && id->driver_data)
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clk_register_fixed_rate(&pdev->dev, dev_name(&pdev->dev), NULL,
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CLK_IS_ROOT, id->driver_data);
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return 0;
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}
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static void dw_i2c_acpi_unconfigure(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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const struct acpi_device_id *id;
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id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
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if (id && id->driver_data)
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clk_unregister(dev->clk);
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}
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static const struct acpi_device_id dw_i2c_acpi_match[] = {
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{ "INT33C2", 0 },
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{ "INT33C3", 0 },
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{ "INT3432", 0 },
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{ "INT3433", 0 },
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{ "80860F41", 0 },
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{ "808622C1", 0 },
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{ "AMD0010", 133 * 1000 * 1000 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
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#else
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static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
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{
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return -ENODEV;
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}
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static inline void dw_i2c_acpi_unconfigure(struct platform_device *pdev) { }
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#endif
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static int dw_i2c_probe(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev;
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struct i2c_adapter *adap;
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struct resource *mem;
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struct dw_i2c_platform_data *pdata;
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int irq, r;
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u32 clk_freq, ht = 0;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "no irq resource?\n");
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return irq; /* -ENXIO */
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}
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dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dev->base = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(dev->base))
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return PTR_ERR(dev->base);
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init_completion(&dev->cmd_complete);
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mutex_init(&dev->lock);
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dev->dev = &pdev->dev;
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dev->irq = irq;
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platform_set_drvdata(pdev, dev);
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/* fast mode by default because of legacy reasons */
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clk_freq = 400000;
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if (ACPI_COMPANION(&pdev->dev)) {
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dw_i2c_acpi_configure(pdev);
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} else if (pdev->dev.of_node) {
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of_property_read_u32(pdev->dev.of_node,
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"i2c-sda-hold-time-ns", &ht);
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of_property_read_u32(pdev->dev.of_node,
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"i2c-sda-falling-time-ns",
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&dev->sda_falling_time);
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of_property_read_u32(pdev->dev.of_node,
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"i2c-scl-falling-time-ns",
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&dev->scl_falling_time);
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of_property_read_u32(pdev->dev.of_node, "clock-frequency",
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&clk_freq);
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/* Only standard mode at 100kHz and fast mode at 400kHz
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* are supported.
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*/
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if (clk_freq != 100000 && clk_freq != 400000) {
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dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
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return -EINVAL;
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}
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} else {
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pdata = dev_get_platdata(&pdev->dev);
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if (pdata)
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clk_freq = pdata->i2c_scl_freq;
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}
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dev->functionality =
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I2C_FUNC_I2C |
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I2C_FUNC_10BIT_ADDR |
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I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA |
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I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_I2C_BLOCK;
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if (clk_freq == 100000)
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dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
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DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD;
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else
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dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
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DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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clk_prepare_enable(dev->clk);
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if (!dev->sda_hold_time && ht) {
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u32 ic_clk = dev->get_clk_rate_khz(dev);
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dev->sda_hold_time = div_u64((u64)ic_clk * ht + 500000,
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1000000);
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}
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if (!dev->tx_fifo_depth) {
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u32 param1 = i2c_dw_read_comp_param(dev);
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dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1;
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dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1;
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dev->adapter.nr = pdev->id;
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}
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r = i2c_dw_init(dev);
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if (r)
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return r;
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i2c_dw_disable_int(dev);
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r = devm_request_irq(&pdev->dev, dev->irq, i2c_dw_isr, IRQF_SHARED,
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pdev->name, dev);
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if (r) {
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dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
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return r;
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}
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adap = &dev->adapter;
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i2c_set_adapdata(adap, dev);
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adap->owner = THIS_MODULE;
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adap->class = I2C_CLASS_DEPRECATED;
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strlcpy(adap->name, "Synopsys DesignWare I2C adapter",
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sizeof(adap->name));
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adap->algo = &i2c_dw_algo;
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adap->dev.parent = &pdev->dev;
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adap->dev.of_node = pdev->dev.of_node;
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r = i2c_add_numbered_adapter(adap);
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if (r) {
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dev_err(&pdev->dev, "failure adding adapter\n");
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return r;
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}
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pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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return 0;
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}
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static int dw_i2c_remove(struct platform_device *pdev)
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{
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struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
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pm_runtime_get_sync(&pdev->dev);
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i2c_del_adapter(&dev->adapter);
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i2c_dw_disable(dev);
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pm_runtime_put(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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if (ACPI_COMPANION(&pdev->dev))
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dw_i2c_acpi_unconfigure(pdev);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id dw_i2c_of_match[] = {
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{ .compatible = "snps,designware-i2c", },
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{},
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};
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MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
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#endif
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#ifdef CONFIG_PM
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static int dw_i2c_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
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i2c_dw_disable(i_dev);
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clk_disable_unprepare(i_dev->clk);
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return 0;
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}
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static int dw_i2c_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
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clk_prepare_enable(i_dev->clk);
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i2c_dw_init(i_dev);
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return 0;
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}
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#endif
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static UNIVERSAL_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend,
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dw_i2c_resume, NULL);
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/* work with hotplug and coldplug */
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MODULE_ALIAS("platform:i2c_designware");
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static struct platform_driver dw_i2c_driver = {
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.probe = dw_i2c_probe,
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.remove = dw_i2c_remove,
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.driver = {
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.name = "i2c_designware",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(dw_i2c_of_match),
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.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
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.pm = &dw_i2c_dev_pm_ops,
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},
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};
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static int __init dw_i2c_init_driver(void)
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{
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return platform_driver_register(&dw_i2c_driver);
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}
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subsys_initcall(dw_i2c_init_driver);
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static void __exit dw_i2c_exit_driver(void)
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{
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platform_driver_unregister(&dw_i2c_driver);
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}
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module_exit(dw_i2c_exit_driver);
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MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
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MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
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MODULE_LICENSE("GPL");
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