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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-29 23:28:52 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
191
drivers/isdn/hardware/eicon/s_bri.c
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191
drivers/isdn/hardware/eicon/s_bri.c
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/*
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*
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Copyright (c) Eicon Networks, 2002.
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*
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This source file is supplied for the use with
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Eicon Networks range of DIVA Server Adapters.
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*
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Eicon File Revision : 2.1
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*
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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*
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
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implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details.
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*
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include "platform.h"
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#include "di_defs.h"
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#include "pc.h"
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#include "pr_pc.h"
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#include "di.h"
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#include "mi_pc.h"
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#include "pc_maint.h"
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#include "divasync.h"
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#include "io.h"
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#include "helpers.h"
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#include "dsrv_bri.h"
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#include "dsp_defs.h"
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/*****************************************************************************/
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#define MAX_XLOG_SIZE (64 * 1024)
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/* --------------------------------------------------------------------------
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Investigate card state, recovery trace buffer
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-------------------------------------------------------------------------- */
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static void bri_cpu_trapped(PISDN_ADAPTER IoAdapter) {
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byte __iomem *addrHi, *addrLo, *ioaddr;
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word *Xlog;
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dword regs[4], i, size;
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Xdesc xlogDesc;
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byte __iomem *Port;
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/*
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* first read pointers and trap frame
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*/
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if (!(Xlog = (word *)diva_os_malloc(0, MAX_XLOG_SIZE)))
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return;
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Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
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addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
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addrLo = Port + ADDR;
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ioaddr = Port + DATA;
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outpp(addrHi, 0);
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outppw(addrLo, 0);
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for (i = 0; i < 0x100; Xlog[i++] = inppw(ioaddr));
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/*
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* check for trapped MIPS 3xxx CPU, dump only exception frame
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*/
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if (GET_DWORD(&Xlog[0x80 / sizeof(Xlog[0])]) == 0x99999999)
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{
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dump_trap_frame(IoAdapter, &((byte *)Xlog)[0x90]);
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IoAdapter->trapped = 1;
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}
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regs[0] = GET_DWORD(&((byte *)Xlog)[0x70]);
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regs[1] = GET_DWORD(&((byte *)Xlog)[0x74]);
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regs[2] = GET_DWORD(&((byte *)Xlog)[0x78]);
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regs[3] = GET_DWORD(&((byte *)Xlog)[0x7c]);
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outpp(addrHi, (regs[1] >> 16) & 0x7F);
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outppw(addrLo, regs[1] & 0xFFFF);
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xlogDesc.cnt = inppw(ioaddr);
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outpp(addrHi, (regs[2] >> 16) & 0x7F);
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outppw(addrLo, regs[2] & 0xFFFF);
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xlogDesc.out = inppw(ioaddr);
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xlogDesc.buf = Xlog;
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regs[0] &= IoAdapter->MemorySize - 1;
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if ((regs[0] < IoAdapter->MemorySize - 1))
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{
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size = IoAdapter->MemorySize - regs[0];
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if (size > MAX_XLOG_SIZE)
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size = MAX_XLOG_SIZE;
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for (i = 0; i < (size / sizeof(*Xlog)); regs[0] += 2)
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{
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outpp(addrHi, (regs[0] >> 16) & 0x7F);
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outppw(addrLo, regs[0] & 0xFFFF);
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Xlog[i++] = inppw(ioaddr);
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}
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dump_xlog_buffer(IoAdapter, &xlogDesc);
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diva_os_free(0, Xlog);
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IoAdapter->trapped = 2;
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}
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outpp(addrHi, (byte)((BRI_UNCACHED_ADDR(IoAdapter->MemoryBase + IoAdapter->MemorySize -
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BRI_SHARED_RAM_SIZE)) >> 16));
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outppw(addrLo, 0x00);
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DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
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}
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/* ---------------------------------------------------------------------
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Reset hardware
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--------------------------------------------------------------------- */
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static void reset_bri_hardware(PISDN_ADAPTER IoAdapter) {
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byte __iomem *p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
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outpp(p, 0x00);
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DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
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}
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/* ---------------------------------------------------------------------
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Halt system
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--------------------------------------------------------------------- */
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static void stop_bri_hardware(PISDN_ADAPTER IoAdapter) {
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byte __iomem *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
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if (p) {
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outpp(p, 0x00); /* disable interrupts ! */
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}
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DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
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p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
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outpp(p, 0x00); /* clear int, halt cpu */
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DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
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}
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static int load_bri_hardware(PISDN_ADAPTER IoAdapter) {
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return (0);
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}
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/******************************************************************************/
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static int bri_ISR(struct _ISDN_ADAPTER *IoAdapter) {
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byte __iomem *p;
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p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
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if (!(inpp(p) & 0x01)) {
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DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
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return (0);
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}
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/*
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clear interrupt line
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*/
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outpp(p, 0x08);
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DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
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IoAdapter->IrqCount++;
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if (IoAdapter->Initialized) {
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diva_os_schedule_soft_isr(&IoAdapter->isr_soft_isr);
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}
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return (1);
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}
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/* --------------------------------------------------------------------------
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Disable IRQ in the card hardware
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-------------------------------------------------------------------------- */
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static void disable_bri_interrupt(PISDN_ADAPTER IoAdapter) {
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byte __iomem *p;
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p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
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if (p)
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{
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outpp(p, 0x00); /* disable interrupts ! */
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}
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DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
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p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
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outpp(p, 0x00); /* clear int, halt cpu */
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DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
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}
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/* -------------------------------------------------------------------------
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Fill card entry points
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------------------------------------------------------------------------- */
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void prepare_maestra_functions(PISDN_ADAPTER IoAdapter) {
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ADAPTER *a = &IoAdapter->a;
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a->ram_in = io_in;
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a->ram_inw = io_inw;
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a->ram_in_buffer = io_in_buffer;
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a->ram_look_ahead = io_look_ahead;
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a->ram_out = io_out;
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a->ram_outw = io_outw;
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a->ram_out_buffer = io_out_buffer;
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a->ram_inc = io_inc;
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IoAdapter->MemoryBase = BRI_MEMORY_BASE;
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IoAdapter->MemorySize = BRI_MEMORY_SIZE;
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IoAdapter->out = pr_out;
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IoAdapter->dpc = pr_dpc;
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IoAdapter->tst_irq = scom_test_int;
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IoAdapter->clr_irq = scom_clear_int;
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IoAdapter->pcm = (struct pc_maint *)MIPS_MAINT_OFFS;
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IoAdapter->load = load_bri_hardware;
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IoAdapter->disIrq = disable_bri_interrupt;
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IoAdapter->rstFnc = reset_bri_hardware;
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IoAdapter->stop = stop_bri_hardware;
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IoAdapter->trapFnc = bri_cpu_trapped;
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IoAdapter->diva_isr_handler = bri_ISR;
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/*
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Prepare OS dependent functions
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*/
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diva_os_prepare_maestra_functions(IoAdapter);
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}
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/* -------------------------------------------------------------------------- */
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