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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-01 08:38:52 +01:00
Fixed MTP to work with TWRP
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commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
93
drivers/media/usb/stk1160/stk1160-reg.h
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93
drivers/media/usb/stk1160/stk1160-reg.h
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/*
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* STK1160 driver
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*
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* Copyright (C) 2012 Ezequiel Garcia
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* <elezegarcia--a.t--gmail.com>
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*
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* Based on Easycap driver by R.M. Thomas
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* Copyright (C) 2010 R.M. Thomas
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* <rmthomas--a.t--sciolus.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/* GPIO Control */
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#define STK1160_GCTRL 0x000
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/* Remote Wakup Control */
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#define STK1160_RMCTL 0x00c
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/*
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* Decoder Control Register:
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* This byte controls capture start/stop
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* with bit #7 (0x?? OR 0x80 to activate).
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*/
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#define STK1160_DCTRL 0x100
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/* Capture Frame Start Position */
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#define STK116_CFSPO 0x110
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#define STK116_CFSPO_STX_L 0x110
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#define STK116_CFSPO_STX_H 0x111
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#define STK116_CFSPO_STY_L 0x112
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#define STK116_CFSPO_STY_H 0x113
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/* Capture Frame End Position */
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#define STK116_CFEPO 0x114
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#define STK116_CFEPO_ENX_L 0x114
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#define STK116_CFEPO_ENX_H 0x115
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#define STK116_CFEPO_ENY_L 0x116
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#define STK116_CFEPO_ENY_H 0x117
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/* Serial Interface Control */
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#define STK1160_SICTL 0x200
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#define STK1160_SICTL_CD 0x202
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#define STK1160_SICTL_SDA 0x203
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/* Serial Bus Write */
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#define STK1160_SBUSW 0x204
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#define STK1160_SBUSW_WA 0x204
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#define STK1160_SBUSW_WD 0x205
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/* Serial Bus Read */
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#define STK1160_SBUSR 0x208
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#define STK1160_SBUSR_RA 0x208
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#define STK1160_SBUSR_RD 0x209
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/* Alternate Serial Inteface Control */
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#define STK1160_ASIC 0x2fc
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/* PLL Select Options */
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#define STK1160_PLLSO 0x018
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/* PLL Frequency Divider */
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#define STK1160_PLLFD 0x01c
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/* Timing Generator */
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#define STK1160_TIGEN 0x300
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/* Timing Control Parameter */
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#define STK1160_TICTL 0x350
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/* AC97 Audio Control */
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#define STK1160_AC97CTL_0 0x500
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#define STK1160_AC97CTL_1 0x504
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/* Use [0:6] bits of register 0x504 to set codec command address */
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#define STK1160_AC97_ADDR 0x504
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/* Use [16:31] bits of register 0x500 to set codec command data */
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#define STK1160_AC97_CMD 0x502
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/* Audio I2S Interface */
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#define STK1160_I2SCTL 0x50c
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/* EEPROM Interface */
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#define STK1160_EEPROM_SZ 0x5f0
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