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Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
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6
drivers/message/Makefile Normal file
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#
# Makefile for MPT based block devices
#
obj-$(CONFIG_I2O) += i2o/
obj-$(CONFIG_FUSION) += fusion/

123
drivers/message/fusion/Kconfig Normal file
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menuconfig FUSION
bool "Fusion MPT device support"
depends on PCI
---help---
Say Y here to get to see options for Fusion Message
Passing Technology (MPT) drivers.
This option alone does not add any kernel code.
If you say N, all options in this submenu will be skipped and disabled.
if FUSION
config FUSION_SPI
tristate "Fusion MPT ScsiHost drivers for SPI"
depends on PCI && SCSI
select SCSI_SPI_ATTRS
---help---
SCSI HOST support for a parallel SCSI host adapters.
List of supported controllers:
LSI53C1020
LSI53C1020A
LSI53C1030
LSI53C1035
ATTO UL4D
config FUSION_FC
tristate "Fusion MPT ScsiHost drivers for FC"
depends on PCI && SCSI
depends on SCSI_FC_ATTRS
---help---
SCSI HOST support for a Fiber Channel host adapters.
List of supported controllers:
LSIFC909
LSIFC919
LSIFC919X
LSIFC929
LSIFC929X
LSIFC929XL
LSIFC949X
LSIFC949E
Brocade FC 410/420
config FUSION_SAS
tristate "Fusion MPT ScsiHost drivers for SAS"
depends on PCI && SCSI
select SCSI_SAS_ATTRS
---help---
SCSI HOST support for a SAS host adapters.
List of supported controllers:
LSISAS1064
LSISAS1068
LSISAS1064E
LSISAS1068E
LSISAS1078
config FUSION_MAX_SGE
int "Maximum number of scatter gather entries (16 - 128)"
default "128"
range 16 128
help
This option allows you to specify the maximum number of scatter-
gather entries per I/O. The driver default is 128, which matches
SCSI_MAX_PHYS_SEGMENTS. However, it may decreased down to 16.
Decreasing this parameter will reduce memory requirements
on a per controller instance.
config FUSION_CTL
tristate "Fusion MPT misc device (ioctl) driver"
depends on FUSION_SPI || FUSION_FC || FUSION_SAS
---help---
The Fusion MPT misc device driver provides specialized control
of MPT adapters via system ioctl calls. Use of ioctl calls to
the MPT driver requires that you create and use a misc device
node ala:
mknod /dev/mptctl c 10 240
One use of this ioctl interface is to perform an upgrade (reflash)
of the MPT adapter firmware. Refer to readme file(s) distributed
with the Fusion MPT linux driver for additional details.
If enabled by saying M to this, a driver named: mptctl
will be compiled.
If unsure whether you really want or need this, say N.
config FUSION_LAN
tristate "Fusion MPT LAN driver"
depends on FUSION_FC && NET_FC
---help---
This module supports LAN IP traffic over Fibre Channel port(s)
on Fusion MPT compatible hardware (LSIFC9xx chips).
The physical interface used is defined in RFC 2625.
Please refer to that document for details.
Installing this driver requires the knowledge to configure and
activate a new network interface, "fc0", using standard Linux tools.
If enabled by saying M to this, a driver named: mptlan
will be compiled.
If unsure whether you really want or need this, say N.
config FUSION_LOGGING
bool "Fusion MPT logging facility"
---help---
This turns on a logging facility that can be used to debug a number
of Fusion MPT related problems.
The debug level can be programmed on the fly via SysFS (hex values)
echo [level] > /sys/class/scsi_host/host#/debug_level
There are various debug levels that can be found in the source:
file:drivers/message/fusion/mptdebug.h
endif # FUSION

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drivers/message/fusion/Makefile Normal file
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# Fusion MPT drivers; recognized debug defines...
# enable verbose logging
# CONFIG_FUSION_LOGGING needs to be enabled in Kconfig
#ccflags-y := -DMPT_DEBUG_VERBOSE
#=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-} LSI_LOGIC
obj-$(CONFIG_FUSION_SPI) += mptbase.o mptscsih.o mptspi.o
obj-$(CONFIG_FUSION_FC) += mptbase.o mptscsih.o mptfc.o
obj-$(CONFIG_FUSION_SAS) += mptbase.o mptscsih.o mptsas.o
obj-$(CONFIG_FUSION_CTL) += mptctl.o
obj-$(CONFIG_FUSION_LAN) += mptlan.o

799
drivers/message/fusion/lsi/mpi.h Normal file
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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi.h
* Title: MPI Message independent structures and definitions
* Creation Date: July 27, 2000
*
* mpi.h Version: 01.05.16
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
* 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
* 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions.
* Removed LAN_SUSPEND function definition.
* Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
* 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
* Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
* 07-27-00 01.00.04 Added MPI_FAULT_ definitions.
* Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
* Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
* Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
* 11-02-00 01.01.01 Original release for post 1.0 work.
* 12-04-00 01.01.02 Added new function codes.
* 01-09-01 01.01.03 Added more definitions to the system interface section
* Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
* 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
* 02-20-01 01.01.05 Started using MPI_POINTER.
* Fixed value for MPI_DIAG_RW_ENABLE.
* Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
* MPI_DIAG_CLEAR_FLASH_BAD_SIG.
* Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
* 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define.
* Added function codes for RAID.
* 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
* MPI_DOORBELL_USED, to better match the spec.
* 08-08-01 01.02.01 Original release for v1.2 work.
* Changed MPI_VERSION_MINOR from 0x01 to 0x02.
* Added define MPI_FUNCTION_TOOLBOX.
* 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
* 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
* 03-14-02 01.02.04 Added MPI_HEADER_VERSION_ defines.
* 05-31-02 01.02.05 Bumped MPI_HEADER_VERSION_UNIT.
* 07-12-02 01.02.06 Added define for MPI_FUNCTION_MAILBOX.
* 09-16-02 01.02.07 Bumped value for MPI_HEADER_VERSION_UNIT.
* 11-15-02 01.02.08 Added define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX and
* obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
* 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
* 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
* 01-16-04 01.02.11 Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
* 04-29-04 01.02.12 Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
* and MPI_FUNCTION_DIAG_RELEASE.
* Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
* Bumped MPI_HEADER_VERSION_UNIT value.
* 05-11-04 01.03.01 Bumped MPI_VERSION_MINOR for MPI v1.3.
* Added codes for Inband.
* 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.
* Added define for offset of High Priority Request Queue.
* Added new function codes and new IOCStatus codes.
* Added a IOCLogInfo type of SAS.
* 12-07-04 01.05.02 Bumped MPI_HEADER_VERSION_UNIT.
* 12-09-04 01.05.03 Bumped MPI_HEADER_VERSION_UNIT.
* 01-15-05 01.05.04 Bumped MPI_HEADER_VERSION_UNIT.
* 02-09-05 01.05.05 Bumped MPI_HEADER_VERSION_UNIT.
* 02-22-05 01.05.06 Bumped MPI_HEADER_VERSION_UNIT.
* 03-11-05 01.05.07 Removed function codes for SCSI IO 32 and
* TargetAssistExtended requests.
* Removed EEDP IOCStatus codes.
* 06-24-05 01.05.08 Added function codes for SCSI IO 32 and
* TargetAssistExtended requests.
* Added EEDP IOCStatus codes.
* 08-03-05 01.05.09 Bumped MPI_HEADER_VERSION_UNIT.
* 08-30-05 01.05.10 Added 2 new IOCStatus codes for Target.
* 03-27-06 01.05.11 Bumped MPI_HEADER_VERSION_UNIT.
* 10-11-06 01.05.12 Bumped MPI_HEADER_VERSION_UNIT.
* 05-24-07 01.05.13 Bumped MPI_HEADER_VERSION_UNIT.
* 08-07-07 01.05.14 Bumped MPI_HEADER_VERSION_UNIT.
* 01-15-08 01.05.15 Bumped MPI_HEADER_VERSION_UNIT.
* 03-28-08 01.05.16 Bumped MPI_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
*/
#ifndef MPI_H
#define MPI_H
/*****************************************************************************
*
* M P I V e r s i o n D e f i n i t i o n s
*
*****************************************************************************/
#define MPI_VERSION_MAJOR (0x01)
#define MPI_VERSION_MINOR (0x05)
#define MPI_VERSION_MAJOR_MASK (0xFF00)
#define MPI_VERSION_MAJOR_SHIFT (8)
#define MPI_VERSION_MINOR_MASK (0x00FF)
#define MPI_VERSION_MINOR_SHIFT (0)
#define MPI_VERSION ((MPI_VERSION_MAJOR << MPI_VERSION_MAJOR_SHIFT) | \
MPI_VERSION_MINOR)
#define MPI_VERSION_01_00 (0x0100)
#define MPI_VERSION_01_01 (0x0101)
#define MPI_VERSION_01_02 (0x0102)
#define MPI_VERSION_01_03 (0x0103)
#define MPI_VERSION_01_05 (0x0105)
/* Note: The major versions of 0xe0 through 0xff are reserved */
/* versioning for this MPI header set */
#define MPI_HEADER_VERSION_UNIT (0x13)
#define MPI_HEADER_VERSION_DEV (0x00)
#define MPI_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI_HEADER_VERSION_UNIT_SHIFT (8)
#define MPI_HEADER_VERSION_DEV_MASK (0x00FF)
#define MPI_HEADER_VERSION_DEV_SHIFT (0)
#define MPI_HEADER_VERSION ((MPI_HEADER_VERSION_UNIT << 8) | MPI_HEADER_VERSION_DEV)
/*****************************************************************************
*
* I O C S t a t e D e f i n i t i o n s
*
*****************************************************************************/
#define MPI_IOC_STATE_RESET (0x00000000)
#define MPI_IOC_STATE_READY (0x10000000)
#define MPI_IOC_STATE_OPERATIONAL (0x20000000)
#define MPI_IOC_STATE_FAULT (0x40000000)
#define MPI_IOC_STATE_MASK (0xF0000000)
#define MPI_IOC_STATE_SHIFT (28)
/* Fault state codes (product independent range 0x8000-0xFFFF) */
#define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR (0x8111)
#define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT (0x8112)
#define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR (0x8113)
#define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT (0x8114)
#define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR (0x8115)
#define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT (0x8116)
#define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR (0x8117)
#define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT (0x8118)
/*****************************************************************************
*
* P C I S y s t e m I n t e r f a c e R e g i s t e r s
*
*****************************************************************************/
/*
* Defines for working with the System Doorbell register.
* Values for doorbell function codes are included in the section that defines
* all the function codes (further on in this file).
*/
#define MPI_DOORBELL_OFFSET (0x00000000)
#define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */
#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
#define MPI_DOORBELL_ACTIVE_SHIFT (27)
#define MPI_DOORBELL_WHO_INIT_MASK (0x07000000)
#define MPI_DOORBELL_WHO_INIT_SHIFT (24)
#define MPI_DOORBELL_FUNCTION_MASK (0xFF000000)
#define MPI_DOORBELL_FUNCTION_SHIFT (24)
#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
#define MPI_DOORBELL_FUNCTION_SPECIFIC_MASK (0x0000FFFF)
/* values for Host Buffer Access Control doorbell function */
#define MPI_DB_HPBAC_VALUE_MASK (0x0000F000)
#define MPI_DB_HPBAC_ENABLE_ACCESS (0x01)
#define MPI_DB_HPBAC_DISABLE_ACCESS (0x02)
#define MPI_DB_HPBAC_FREE_BUFFER (0x03)
#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI_WRSEQ_KEY_VALUE_MASK (0x0000000F)
#define MPI_WRSEQ_1ST_KEY_VALUE (0x04)
#define MPI_WRSEQ_2ND_KEY_VALUE (0x0B)
#define MPI_WRSEQ_3RD_KEY_VALUE (0x02)
#define MPI_WRSEQ_4TH_KEY_VALUE (0x07)
#define MPI_WRSEQ_5TH_KEY_VALUE (0x0D)
#define MPI_DIAGNOSTIC_OFFSET (0x00000008)
#define MPI_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
#define MPI_DIAG_PREVENT_IOC_BOOT (0x00000200)
#define MPI_DIAG_DRWE (0x00000080)
#define MPI_DIAG_FLASH_BAD_SIG (0x00000040)
#define MPI_DIAG_RESET_HISTORY (0x00000020)
#define MPI_DIAG_RW_ENABLE (0x00000010)
#define MPI_DIAG_RESET_ADAPTER (0x00000004)
#define MPI_DIAG_DISABLE_ARM (0x00000002)
#define MPI_DIAG_MEM_ENABLE (0x00000001)
#define MPI_TEST_BASE_ADDRESS_OFFSET (0x0000000C)
#define MPI_DIAG_RW_DATA_OFFSET (0x00000010)
#define MPI_DIAG_RW_ADDRESS_OFFSET (0x00000014)
#define MPI_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
#define MPI_HIS_IOP_DOORBELL_STATUS (0x80000000)
#define MPI_HIS_REPLY_MESSAGE_INTERRUPT (0x00000008)
#define MPI_HIS_DOORBELL_INTERRUPT (0x00000001)
#define MPI_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
#define MPI_HIM_RIM (0x00000008)
#define MPI_HIM_DIM (0x00000001)
#define MPI_REQUEST_QUEUE_OFFSET (0x00000040)
#define MPI_REQUEST_POST_FIFO_OFFSET (0x00000040)
#define MPI_REPLY_QUEUE_OFFSET (0x00000044)
#define MPI_REPLY_POST_FIFO_OFFSET (0x00000044)
#define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044)
#define MPI_HI_PRI_REQUEST_QUEUE_OFFSET (0x00000048)
/*****************************************************************************
*
* M e s s a g e F r a m e D e s c r i p t o r s
*
*****************************************************************************/
#define MPI_REQ_MF_DESCRIPTOR_NB_MASK (0x00000003)
#define MPI_REQ_MF_DESCRIPTOR_F_BIT (0x00000004)
#define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK (0xFFFFFFF8)
#define MPI_ADDRESS_REPLY_A_BIT (0x80000000)
#define MPI_ADDRESS_REPLY_ADDRESS_MASK (0x7FFFFFFF)
#define MPI_CONTEXT_REPLY_A_BIT (0x80000000)
#define MPI_CONTEXT_REPLY_TYPE_MASK (0x60000000)
#define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT (0x00)
#define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET (0x01)
#define MPI_CONTEXT_REPLY_TYPE_LAN (0x02)
#define MPI_CONTEXT_REPLY_TYPE_SHIFT (29)
#define MPI_CONTEXT_REPLY_CONTEXT_MASK (0x1FFFFFFF)
/****************************************************************************/
/* Context Reply macros */
/****************************************************************************/
#define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \
>> MPI_CONTEXT_REPLY_TYPE_SHIFT)
#define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \
((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \
(((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) & \
MPI_CONTEXT_REPLY_TYPE_MASK))
/*****************************************************************************
*
* M e s s a g e F u n c t i o n s
* 0x80 -> 0x8F reserved for private message use per product
*
*
*****************************************************************************/
#define MPI_FUNCTION_SCSI_IO_REQUEST (0x00)
#define MPI_FUNCTION_SCSI_TASK_MGMT (0x01)
#define MPI_FUNCTION_IOC_INIT (0x02)
#define MPI_FUNCTION_IOC_FACTS (0x03)
#define MPI_FUNCTION_CONFIG (0x04)
#define MPI_FUNCTION_PORT_FACTS (0x05)
#define MPI_FUNCTION_PORT_ENABLE (0x06)
#define MPI_FUNCTION_EVENT_NOTIFICATION (0x07)
#define MPI_FUNCTION_EVENT_ACK (0x08)
#define MPI_FUNCTION_FW_DOWNLOAD (0x09)
#define MPI_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
#define MPI_FUNCTION_TARGET_ASSIST (0x0B)
#define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C)
#define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D)
#define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E)
#define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F)
#define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10)
#define MPI_FUNCTION_FC_ABORT (0x11)
#define MPI_FUNCTION_FW_UPLOAD (0x12)
#define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND (0x13)
#define MPI_FUNCTION_FC_PRIMITIVE_SEND (0x14)
#define MPI_FUNCTION_RAID_ACTION (0x15)
#define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16)
#define MPI_FUNCTION_TOOLBOX (0x17)
#define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
#define MPI_FUNCTION_MAILBOX (0x19)
#define MPI_FUNCTION_SMP_PASSTHROUGH (0x1A)
#define MPI_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
#define MPI_FUNCTION_SATA_PASSTHROUGH (0x1C)
#define MPI_FUNCTION_DIAG_BUFFER_POST (0x1D)
#define MPI_FUNCTION_DIAG_RELEASE (0x1E)
#define MPI_FUNCTION_SCSI_IO_32 (0x1F)
#define MPI_FUNCTION_LAN_SEND (0x20)
#define MPI_FUNCTION_LAN_RECEIVE (0x21)
#define MPI_FUNCTION_LAN_RESET (0x22)
#define MPI_FUNCTION_TARGET_ASSIST_EXTENDED (0x23)
#define MPI_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24)
#define MPI_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25)
#define MPI_FUNCTION_INBAND_BUFFER_POST (0x28)
#define MPI_FUNCTION_INBAND_SEND (0x29)
#define MPI_FUNCTION_INBAND_RSP (0x2A)
#define MPI_FUNCTION_INBAND_ABORT (0x2B)
#define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
#define MPI_FUNCTION_HANDSHAKE (0x42)
#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
#define MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL (0x44)
/* standard version format */
typedef struct _MPI_VERSION_STRUCT
{
U8 Dev; /* 00h */
U8 Unit; /* 01h */
U8 Minor; /* 02h */
U8 Major; /* 03h */
} MPI_VERSION_STRUCT, MPI_POINTER PTR_MPI_VERSION_STRUCT,
MpiVersionStruct_t, MPI_POINTER pMpiVersionStruct;
typedef union _MPI_VERSION_FORMAT
{
MPI_VERSION_STRUCT Struct;
U32 Word;
} MPI_VERSION_FORMAT, MPI_POINTER PTR_MPI_VERSION_FORMAT,
MpiVersionFormat_t, MPI_POINTER pMpiVersionFormat_t;
/*****************************************************************************
*
* S c a t t e r G a t h e r E l e m e n t s
*
*****************************************************************************/
/****************************************************************************/
/* Simple element structures */
/****************************************************************************/
typedef struct _SGE_SIMPLE32
{
U32 FlagsLength;
U32 Address;
} SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32,
SGESimple32_t, MPI_POINTER pSGESimple32_t;
typedef struct _SGE_SIMPLE64
{
U32 FlagsLength;
U64 Address;
} SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64,
SGESimple64_t, MPI_POINTER pSGESimple64_t;
typedef struct _SGE_SIMPLE_UNION
{
U32 FlagsLength;
union
{
U32 Address32;
U64 Address64;
}u;
} SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION,
SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t;
/****************************************************************************/
/* Chain element structures */
/****************************************************************************/
typedef struct _SGE_CHAIN32
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U32 Address;
} SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32,
SGEChain32_t, MPI_POINTER pSGEChain32_t;
typedef struct _SGE_CHAIN64
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U64 Address;
} SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64,
SGEChain64_t, MPI_POINTER pSGEChain64_t;
typedef struct _SGE_CHAIN_UNION
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
union
{
U32 Address32;
U64 Address64;
}u;
} SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION,
SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t;
/****************************************************************************/
/* Transaction Context element */
/****************************************************************************/
typedef struct _SGE_TRANSACTION32
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[1];
U32 TransactionDetails[1];
} SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32,
SGETransaction32_t, MPI_POINTER pSGETransaction32_t;
typedef struct _SGE_TRANSACTION64
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[2];
U32 TransactionDetails[1];
} SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64,
SGETransaction64_t, MPI_POINTER pSGETransaction64_t;
typedef struct _SGE_TRANSACTION96
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[3];
U32 TransactionDetails[1];
} SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96,
SGETransaction96_t, MPI_POINTER pSGETransaction96_t;
typedef struct _SGE_TRANSACTION128
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[4];
U32 TransactionDetails[1];
} SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128,
SGETransaction_t128, MPI_POINTER pSGETransaction_t128;
typedef struct _SGE_TRANSACTION_UNION
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
union
{
U32 TransactionContext32[1];
U32 TransactionContext64[2];
U32 TransactionContext96[3];
U32 TransactionContext128[4];
}u;
U32 TransactionDetails[1];
} SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION,
SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t;
/****************************************************************************/
/* SGE IO types union for IO SGL's */
/****************************************************************************/
typedef struct _SGE_IO_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_CHAIN_UNION Chain;
} u;
} SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION,
SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t;
/****************************************************************************/
/* SGE union for SGL's with Simple and Transaction elements */
/****************************************************************************/
typedef struct _SGE_TRANS_SIMPLE_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_TRANSACTION_UNION Transaction;
} u;
} SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION,
SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t;
/****************************************************************************/
/* All SGE types union */
/****************************************************************************/
typedef struct _SGE_MPI_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_CHAIN_UNION Chain;
SGE_TRANSACTION_UNION Transaction;
} u;
} SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION,
MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t,
SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t;
/****************************************************************************/
/* SGE field definition and masks */
/****************************************************************************/
/* Flags field bit definitions */
#define MPI_SGE_FLAGS_LAST_ELEMENT (0x80)
#define MPI_SGE_FLAGS_END_OF_BUFFER (0x40)
#define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
#define MPI_SGE_FLAGS_LOCAL_ADDRESS (0x08)
#define MPI_SGE_FLAGS_DIRECTION (0x04)
#define MPI_SGE_FLAGS_ADDRESS_SIZE (0x02)
#define MPI_SGE_FLAGS_END_OF_LIST (0x01)
#define MPI_SGE_FLAGS_SHIFT (24)
#define MPI_SGE_LENGTH_MASK (0x00FFFFFF)
#define MPI_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
/* Element Type */
#define MPI_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
#define MPI_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
#define MPI_SGE_FLAGS_CHAIN_ELEMENT (0x30)
#define MPI_SGE_FLAGS_ELEMENT_MASK (0x30)
/* Address location */
#define MPI_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
/* Direction */
#define MPI_SGE_FLAGS_IOC_TO_HOST (0x00)
#define MPI_SGE_FLAGS_HOST_TO_IOC (0x04)
/* Address Size */
#define MPI_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
#define MPI_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
/* Context Size */
#define MPI_SGE_FLAGS_32_BIT_CONTEXT (0x00)
#define MPI_SGE_FLAGS_64_BIT_CONTEXT (0x02)
#define MPI_SGE_FLAGS_96_BIT_CONTEXT (0x04)
#define MPI_SGE_FLAGS_128_BIT_CONTEXT (0x06)
#define MPI_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
#define MPI_SGE_CHAIN_OFFSET_SHIFT (16)
/****************************************************************************/
/* SGE operation Macros */
/****************************************************************************/
/* SIMPLE FlagsLength manipulations... */
#define MPI_SGE_SET_FLAGS(f) ((U32)(f) << MPI_SGE_FLAGS_SHIFT)
#define MPI_SGE_GET_FLAGS(fl) (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT)
#define MPI_SGE_LENGTH(fl) ((fl) & MPI_SGE_LENGTH_MASK)
#define MPI_SGE_CHAIN_LENGTH(fl) ((fl) & MPI_SGE_CHAIN_LENGTH_MASK)
#define MPI_SGE_SET_FLAGS_LENGTH(f,l) (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l))
#define MPI_pSGE_GET_FLAGS(psg) MPI_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI_pSGE_GET_LENGTH(psg) MPI_SGE_LENGTH((psg)->FlagsLength)
#define MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l)
/* CAUTION - The following are READ-MODIFY-WRITE! */
#define MPI_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f)
#define MPI_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI_SGE_LENGTH(l)
#define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT)
/*****************************************************************************
*
* S t a n d a r d M e s s a g e S t r u c t u r e s
*
*****************************************************************************/
/****************************************************************************/
/* Standard message request header for all request messages */
/****************************************************************************/
typedef struct _MSG_REQUEST_HEADER
{
U8 Reserved[2]; /* function specific */
U8 ChainOffset;
U8 Function;
U8 Reserved1[3]; /* function specific */
U8 MsgFlags;
U32 MsgContext;
} MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER,
MPIHeader_t, MPI_POINTER pMPIHeader_t;
/****************************************************************************/
/* Default Reply */
/****************************************************************************/
typedef struct _MSG_DEFAULT_REPLY
{
U8 Reserved[2]; /* function specific */
U8 MsgLength;
U8 Function;
U8 Reserved1[3]; /* function specific */
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[2]; /* function specific */
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY,
MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t;
/* MsgFlags definition for all replies */
#define MPI_MSGFLAGS_CONTINUATION_REPLY (0x80)
/*****************************************************************************
*
* I O C S t a t u s V a l u e s
*
*****************************************************************************/
/****************************************************************************/
/* Common IOCStatus values for all replies */
/****************************************************************************/
#define MPI_IOCSTATUS_SUCCESS (0x0000)
#define MPI_IOCSTATUS_INVALID_FUNCTION (0x0001)
#define MPI_IOCSTATUS_BUSY (0x0002)
#define MPI_IOCSTATUS_INVALID_SGL (0x0003)
#define MPI_IOCSTATUS_INTERNAL_ERROR (0x0004)
#define MPI_IOCSTATUS_RESERVED (0x0005)
#define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
#define MPI_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
/****************************************************************************/
/* Config IOCStatus values */
/****************************************************************************/
#define MPI_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
#define MPI_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
#define MPI_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
#define MPI_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
#define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
#define MPI_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
/****************************************************************************/
/* SCSIIO Reply (SPI & FCP) initiator values */
/****************************************************************************/
#define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
#define MPI_IOCSTATUS_SCSI_INVALID_BUS (0x0041)
#define MPI_IOCSTATUS_SCSI_INVALID_TARGETID (0x0042)
#define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
#define MPI_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
#define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
#define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
#define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
#define MPI_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
#define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
#define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
#define MPI_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
/****************************************************************************/
/* For use by SCSI Initiator and SCSI Target end-to-end data protection */
/****************************************************************************/
#define MPI_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
#define MPI_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
#define MPI_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
/****************************************************************************/
/* SCSI Target values */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete name */
#define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
#define MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
#define MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
#define MPI_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
#define MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
#define MPI_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
/****************************************************************************/
/* Additional FCP target values (obsolete) */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066) /* obsolete */
#define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID (0x0067) /* obsolete */
#define MPI_IOCSTATUS_TARGET_FC_DID_INVALID (0x0068) /* obsolete */
#define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069) /* obsolete */
/****************************************************************************/
/* Fibre Channel Direct Access values */
/****************************************************************************/
#define MPI_IOCSTATUS_FC_ABORTED (0x0066)
#define MPI_IOCSTATUS_FC_RX_ID_INVALID (0x0067)
#define MPI_IOCSTATUS_FC_DID_INVALID (0x0068)
#define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT (0x0069)
#define MPI_IOCSTATUS_FC_EXCHANGE_CANCELED (0x006C)
/****************************************************************************/
/* LAN values */
/****************************************************************************/
#define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND (0x0080)
#define MPI_IOCSTATUS_LAN_DEVICE_FAILURE (0x0081)
#define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR (0x0082)
#define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED (0x0083)
#define MPI_IOCSTATUS_LAN_RECEIVE_ERROR (0x0084)
#define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED (0x0085)
#define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086)
#define MPI_IOCSTATUS_LAN_CANCELED (0x0087)
/****************************************************************************/
/* Serial Attached SCSI values */
/****************************************************************************/
#define MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
#define MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
/****************************************************************************/
/* Inband values */
/****************************************************************************/
#define MPI_IOCSTATUS_INBAND_ABORTED (0x0098)
#define MPI_IOCSTATUS_INBAND_NO_CONNECTION (0x0099)
/****************************************************************************/
/* Diagnostic Tools values */
/****************************************************************************/
#define MPI_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
/****************************************************************************/
/* IOCStatus flag to indicate that log info is available */
/****************************************************************************/
#define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
#define MPI_IOCSTATUS_MASK (0x7FFF)
/****************************************************************************/
/* LogInfo Types */
/****************************************************************************/
#define MPI_IOCLOGINFO_TYPE_MASK (0xF0000000)
#define MPI_IOCLOGINFO_TYPE_SHIFT (28)
#define MPI_IOCLOGINFO_TYPE_NONE (0x0)
#define MPI_IOCLOGINFO_TYPE_SCSI (0x1)
#define MPI_IOCLOGINFO_TYPE_FC (0x2)
#define MPI_IOCLOGINFO_TYPE_SAS (0x3)
#define MPI_IOCLOGINFO_TYPE_ISCSI (0x4)
#define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_fc.h
* Title: MPI Fibre Channel messages and structures
* Creation Date: June 12, 2000
*
* mpi_fc.h Version: 01.05.01
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 12-04-00 01.01.02 Added messages for Common Transport Send and
* Primitive Send.
* 01-09-01 01.01.03 Modifed some of the new flags to have an MPI prefix
* and modified the FcPrimitiveSend flags.
* 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger
* field.
* Added FC_ABORT_TYPE_CT_SEND_REQUEST and
* FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request.
* Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND.
* 02-20-01 01.01.05 Started using MPI_POINTER.
* 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY
* and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED.
* Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
* Added structure offset comments.
* 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Change name of reserved field in
* MSG_LINK_SERVICE_RSP_REPLY.
* 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
* 01-16-04 01.02.04 Added define for MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
#ifndef MPI_FC_H
#define MPI_FC_H
/*****************************************************************************
*
* F C D i r e c t A c c e s s M e s s a g e s
*
*****************************************************************************/
/****************************************************************************/
/* Link Service Buffer Post messages */
/****************************************************************************/
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REQUEST
{
U8 BufferPostFlags; /* 00h */
U8 BufferCount; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
SGE_TRANS_SIMPLE_UNION SGL;
} MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
LinkServiceBufferPostRequest_t, MPI_POINTER pLinkServiceBufferPostRequest_t;
#define LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK (0x01)
typedef struct _WWNFORMAT
{
U32 PortNameHigh; /* 00h */
U32 PortNameLow; /* 04h */
U32 NodeNameHigh; /* 08h */
U32 NodeNameLow; /* 0Ch */
} WWNFORMAT,
WwnFormat_t;
/* Link Service Buffer Post Reply */
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REPLY
{
U8 Flags; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved2; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferLength; /* 14h */
U32 TransactionContext; /* 18h */
U32 Rctl_Did; /* 1Ch */
U32 Csctl_Sid; /* 20h */
U32 Type_Fctl; /* 24h */
U16 SeqCnt; /* 28h */
U8 Dfctl; /* 2Ah */
U8 SeqId; /* 2Bh */
U16 Rxid; /* 2Ch */
U16 Oxid; /* 2Eh */
U32 Parameter; /* 30h */
WWNFORMAT Wwn; /* 34h */
} MSG_LINK_SERVICE_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REPLY,
LinkServiceBufferPostReply_t, MPI_POINTER pLinkServiceBufferPostReply_t;
#define MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED (0x80)
#define MPI_FC_DID_MASK (0x00FFFFFF)
#define MPI_FC_DID_SHIFT (0)
#define MPI_FC_RCTL_MASK (0xFF000000)
#define MPI_FC_RCTL_SHIFT (24)
#define MPI_FC_SID_MASK (0x00FFFFFF)
#define MPI_FC_SID_SHIFT (0)
#define MPI_FC_CSCTL_MASK (0xFF000000)
#define MPI_FC_CSCTL_SHIFT (24)
#define MPI_FC_FCTL_MASK (0x00FFFFFF)
#define MPI_FC_FCTL_SHIFT (0)
#define MPI_FC_TYPE_MASK (0xFF000000)
#define MPI_FC_TYPE_SHIFT (24)
/* obsolete name for the above */
#define FCP_TARGET_DID_MASK (0x00FFFFFF)
#define FCP_TARGET_DID_SHIFT (0)
#define FCP_TARGET_RCTL_MASK (0xFF000000)
#define FCP_TARGET_RCTL_SHIFT (24)
#define FCP_TARGET_SID_MASK (0x00FFFFFF)
#define FCP_TARGET_SID_SHIFT (0)
#define FCP_TARGET_CSCTL_MASK (0xFF000000)
#define FCP_TARGET_CSCTL_SHIFT (24)
#define FCP_TARGET_FCTL_MASK (0x00FFFFFF)
#define FCP_TARGET_FCTL_SHIFT (0)
#define FCP_TARGET_TYPE_MASK (0xFF000000)
#define FCP_TARGET_TYPE_SHIFT (24)
/****************************************************************************/
/* Link Service Response messages */
/****************************************************************************/
typedef struct _MSG_LINK_SERVICE_RSP_REQUEST
{
U8 RspFlags; /* 00h */
U8 RspLength; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Rctl_Did; /* 0Ch */
U32 Csctl_Sid; /* 10h */
U32 Type_Fctl; /* 14h */
U16 SeqCnt; /* 18h */
U8 Dfctl; /* 1Ah */
U8 SeqId; /* 1Bh */
U16 Rxid; /* 1Ch */
U16 Oxid; /* 1Eh */
U32 Parameter; /* 20h */
SGE_SIMPLE_UNION SGL; /* 24h */
} MSG_LINK_SERVICE_RSP_REQUEST, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REQUEST,
LinkServiceRspRequest_t, MPI_POINTER pLinkServiceRspRequest_t;
#define LINK_SERVICE_RSP_FLAGS_IMMEDIATE (0x80)
#define LINK_SERVICE_RSP_FLAGS_PORT_MASK (0x01)
/* Link Service Response Reply */
typedef struct _MSG_LINK_SERVICE_RSP_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved_0100_InitiatorIndex; /* 06h */ /* obsolete InitiatorIndex */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 InitiatorIndex; /* 14h */
} MSG_LINK_SERVICE_RSP_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REPLY,
LinkServiceRspReply_t, MPI_POINTER pLinkServiceRspReply_t;
/****************************************************************************/
/* Extended Link Service Send messages */
/****************************************************************************/
typedef struct _MSG_EXLINK_SERVICE_SEND_REQUEST
{
U8 SendFlags; /* 00h */
U8 AliasIndex; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U32 MsgFlags_Did; /* 04h */
U32 MsgContext; /* 08h */
U32 ElsCommandCode; /* 0Ch */
SGE_SIMPLE_UNION SGL; /* 10h */
} MSG_EXLINK_SERVICE_SEND_REQUEST, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REQUEST,
ExLinkServiceSendRequest_t, MPI_POINTER pExLinkServiceSendRequest_t;
#define EX_LINK_SERVICE_SEND_DID_MASK (0x00FFFFFF)
#define EX_LINK_SERVICE_SEND_DID_SHIFT (0)
#define EX_LINK_SERVICE_SEND_MSGFLAGS_MASK (0xFF000000)
#define EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT (24)
/* Extended Link Service Send Reply */
typedef struct _MSG_EXLINK_SERVICE_SEND_REPLY
{
U8 Reserved; /* 00h */
U8 AliasIndex; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ResponseLength; /* 14h */
} MSG_EXLINK_SERVICE_SEND_REPLY, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REPLY,
ExLinkServiceSendReply_t, MPI_POINTER pExLinkServiceSendReply_t;
/****************************************************************************/
/* FC Abort messages */
/****************************************************************************/
typedef struct _MSG_FC_ABORT_REQUEST
{
U8 AbortFlags; /* 00h */
U8 AbortType; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 TransactionContextToAbort; /* 0Ch */
} MSG_FC_ABORT_REQUEST, MPI_POINTER PTR_MSG_FC_ABORT_REQUEST,
FcAbortRequest_t, MPI_POINTER pFcAbortRequest_t;
#define FC_ABORT_FLAG_PORT_MASK (0x01)
#define FC_ABORT_TYPE_ALL_FC_BUFFERS (0x00)
#define FC_ABORT_TYPE_EXACT_FC_BUFFER (0x01)
#define FC_ABORT_TYPE_CT_SEND_REQUEST (0x02)
#define FC_ABORT_TYPE_EXLINKSEND_REQUEST (0x03)
/* FC Abort Reply */
typedef struct _MSG_FC_ABORT_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_FC_ABORT_REPLY, MPI_POINTER PTR_MSG_FC_ABORT_REPLY,
FcAbortReply_t, MPI_POINTER pFcAbortReply_t;
/****************************************************************************/
/* FC Common Transport Send messages */
/****************************************************************************/
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REQUEST
{
U8 SendFlags; /* 00h */
U8 AliasIndex; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U32 MsgFlags_Did; /* 04h */
U32 MsgContext; /* 08h */
U16 CTCommandCode; /* 0Ch */
U8 FsType; /* 0Eh */
U8 Reserved1; /* 0Fh */
SGE_SIMPLE_UNION SGL; /* 10h */
} MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
FcCommonTransportSendRequest_t, MPI_POINTER pFcCommonTransportSendRequest_t;
#define MPI_FC_CT_SEND_DID_MASK (0x00FFFFFF)
#define MPI_FC_CT_SEND_DID_SHIFT (0)
#define MPI_FC_CT_SEND_MSGFLAGS_MASK (0xFF000000)
#define MPI_FC_CT_SEND_MSGFLAGS_SHIFT (24)
/* FC Common Transport Send Reply */
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REPLY
{
U8 Reserved; /* 00h */
U8 AliasIndex; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ResponseLength; /* 14h */
} MSG_FC_COMMON_TRANSPORT_SEND_REPLY, MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REPLY,
FcCommonTransportSendReply_t, MPI_POINTER pFcCommonTransportSendReply_t;
/****************************************************************************/
/* FC Primitive Send messages */
/****************************************************************************/
typedef struct _MSG_FC_PRIMITIVE_SEND_REQUEST
{
U8 SendFlags; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 FcPrimitive[4]; /* 0Ch */
} MSG_FC_PRIMITIVE_SEND_REQUEST, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REQUEST,
FcPrimitiveSendRequest_t, MPI_POINTER pFcPrimitiveSendRequest_t;
#define MPI_FC_PRIM_SEND_FLAGS_PORT_MASK (0x01)
#define MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK (0x02)
#define MPI_FC_PRIM_SEND_FLAGS_RESET_LINK (0x04)
#define MPI_FC_PRIM_SEND_FLAGS_STOP_SEND (0x08)
#define MPI_FC_PRIM_SEND_FLAGS_SEND_ONCE (0x10)
#define MPI_FC_PRIM_SEND_FLAGS_SEND_AROUND (0x20)
#define MPI_FC_PRIM_SEND_FLAGS_UNTIL_FULL (0x40)
#define MPI_FC_PRIM_SEND_FLAGS_FOREVER (0x80)
/* FC Primitive Send Reply */
typedef struct _MSG_FC_PRIMITIVE_SEND_REPLY
{
U8 SendFlags; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_FC_PRIMITIVE_SEND_REPLY, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REPLY,
FcPrimitiveSendReply_t, MPI_POINTER pFcPrimitiveSendReply_t;
#endif

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drivers/message/fusion/lsi/mpi_history.txt Normal file
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@ -0,0 +1,868 @@
==============================
MPI Header File Change History
==============================
Copyright (c) 2000-2008 LSI Corporation.
---------------------------------------
Header Set Release Version: 01.05.19
Header Set Release Date: 03-28-08
---------------------------------------
Filename Current version Prior version
---------- --------------- -------------
mpi.h 01.05.16 01.05.15
mpi_ioc.h 01.05.16 01.05.15
mpi_cnfg.h 01.05.18 01.05.17
mpi_init.h 01.05.09 01.05.09
mpi_targ.h 01.05.06 01.05.06
mpi_fc.h 01.05.01 01.05.01
mpi_lan.h 01.05.01 01.05.01
mpi_raid.h 01.05.05 01.05.05
mpi_tool.h 01.05.03 01.05.03
mpi_inb.h 01.05.01 01.05.01
mpi_sas.h 01.05.05 01.05.05
mpi_type.h 01.05.02 01.05.02
mpi_history.txt 01.05.19 01.05.18
* Date Version Description
* -------- -------- ------------------------------------------------------
mpi.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH definition.
* 06-06-00 01.00.01 Update MPI_VERSION_MAJOR and MPI_VERSION_MINOR.
* 06-22-00 01.00.02 Added MPI_IOCSTATUS_LAN_ definitions.
* Removed LAN_SUSPEND function definition.
* Added MPI_MSGFLAGS_CONTINUATION_REPLY definition.
* 06-30-00 01.00.03 Added MPI_CONTEXT_REPLY_TYPE_LAN definition.
* Added MPI_GET/SET_CONTEXT_REPLY_TYPE macros.
* 07-27-00 01.00.04 Added MPI_FAULT_ definitions.
* Removed MPI_IOCSTATUS_MSG/DATA_XFER_ERROR definitions.
* Added MPI_IOCSTATUS_INTERNAL_ERROR definition.
* Added MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 12-04-00 01.01.02 Added new function codes.
* 01-09-01 01.01.03 Added more definitions to the system interface section
* Added MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT.
* 01-25-01 01.01.04 Changed MPI_VERSION_MINOR from 0x00 to 0x01.
* 02-20-01 01.01.05 Started using MPI_POINTER.
* Added defines for MPI_DIAG_PREVENT_IOC_BOOT and
* MPI_DIAG_CLEAR_FLASH_BAD_SIG.
* Obsoleted MPI_IOCSTATUS_TARGET_FC_ defines.
* 02-27-01 01.01.06 Removed MPI_HOST_INDEX_REGISTER define.
* Added function codes for RAID.
* 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
* MPI_DOORBELL_USED, to better match the spec.
* 08-08-01 01.02.01 Original release for v1.2 work.
* Changed MPI_VERSION_MINOR from 0x01 to 0x02.
* Added define MPI_FUNCTION_TOOLBOX.
* 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
* 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
* 03-14-02 01.02.04 Added MPI_HEADER_VERSION_ defines.
* 05-31-02 01.02.05 Bumped MPI_HEADER_VERSION_UNIT.
* 07-12-02 01.02.06 Added define for MPI_FUNCTION_MAILBOX.
* 09-16-02 01.02.07 Bumped value for MPI_HEADER_VERSION_UNIT.
* 11-15-02 01.02.08 Added define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX and
* obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
* 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
* 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
* 01-16-04 01.02.11 Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
* 04-29-04 01.02.12 Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
* and MPI_FUNCTION_DIAG_RELEASE.
* Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
* Bumped MPI_HEADER_VERSION_UNIT value.
* 05-11-04 01.03.01 Bumped MPI_VERSION_MINOR for MPI v1.3.
* Added codes for Inband.
* 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.
* Added define for offset of High Priority Request Queue.
* Added new function codes and new IOCStatus codes.
* Added a IOCLogInfo type of SAS.
* 12-07-04 01.05.02 Bumped MPI_HEADER_VERSION_UNIT.
* 12-09-04 01.05.03 Bumped MPI_HEADER_VERSION_UNIT.
* 01-15-05 01.05.04 Bumped MPI_HEADER_VERSION_UNIT.
* 02-09-05 01.05.05 Bumped MPI_HEADER_VERSION_UNIT.
* 02-22-05 01.05.06 Bumped MPI_HEADER_VERSION_UNIT.
* 03-11-05 01.05.07 Removed function codes for SCSI IO 32 and
* TargetAssistExtended requests.
* Removed EEDP IOCStatus codes.
* 06-24-05 01.05.08 Added function codes for SCSI IO 32 and
* TargetAssistExtended requests.
* Added EEDP IOCStatus codes.
* 08-03-05 01.05.09 Bumped MPI_HEADER_VERSION_UNIT.
* 08-30-05 01.05.10 Added 2 new IOCStatus codes for Target.
* 03-27-06 01.05.11 Bumped MPI_HEADER_VERSION_UNIT.
* 10-11-06 01.05.12 Bumped MPI_HEADER_VERSION_UNIT.
* 05-24-07 01.05.13 Bumped MPI_HEADER_VERSION_UNIT.
* 08-07-07 01.05.14 Bumped MPI_HEADER_VERSION_UNIT.
* 01-15-08 01.05.15 Bumped MPI_HEADER_VERSION_UNIT.
* 03-28-08 01.05.16 Bumped MPI_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
mpi_ioc.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
* 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
* 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
* Added _MSG_EVENT_ACK_REPLY structure.
* Added _MSG_FW_DOWNLOAD_REPLY structure.
* Added _MSG_TOOLBOX_REPLY structure.
* 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
* 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
* _LINK_STATUS, _LOOP_STATE and _LOGOUT.
* 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
* _MSG_EVENT_ACK_REPLY structure to match specification.
* 11-02-00 01.01.01 Original release for post 1.0 work
* Added a value for Manufacturer to WhoInit
* 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
* removed toolbox message.
* 01-09-01 01.01.03 Added event enabled and disabled defines.
* Added structures for FwHeader and DataHeader.
* Added ImageType to FwUpload reply.
* 02-20-01 01.01.04 Started using MPI_POINTER.
* 02-27-01 01.01.05 Added event for RAID status change and its event data.
* Added IocNumber field to MSG_IOC_FACTS_REPLY.
* 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
* Added structure offset comments.
* 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
* 08-08-01 01.02.01 Original release for v1.2 work.
* New format for FWVersion and ProductId in
* MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
* 08-31-01 01.02.02 Added event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
* related structure and defines.
* Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
* Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
* Replaced a reserved field in MSG_IOC_FACTS_REPLY with
* IOCExceptions and changed DataImageSize to reserved.
* Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
* MPI_FW_UPLOAD_ITYPE_NVDATA.
* 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
* 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
* 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
* 05-31-02 01.02.06 Added define for
* MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
* Added AliasIndex to EVENT_DATA_LOGOUT structure.
* 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
* 06-26-03 01.02.08 Added new values to the product family defines.
* 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
* added related defines.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
* Added three new fields to MSG_IOC_FACTS_REPLY.
* Defined four new bits for the IOCCapabilities field of
* the IOCFacts reply.
* Added two new PortTypes for the PortFacts reply.
* Added six new events along with their EventData
* structures.
* Added a new MsgFlag to the FwDownload request to
* indicate last segment.
* Defined a new image type of boot loader.
* Added FW family codes for SAS product families.
* 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
* MSG_IOC_FACTS_REPLY.
* 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
* 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
* 01-15-05 01.05.05 Added event data for SAS SES Event.
* 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
* 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
* Reply and IOC Init Request.
* 03-11-05 01.05.08 Added family code for 1068E family.
* Removed IOCFacts Reply EEDP Capability bit.
* 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
* Added Max SATA Targets to SAS Discovery Error event.
* 08-30-05 01.05.10 Added 4 new events and their event data structures.
* Added new ReasonCode value for SAS Device Status Change
* event.
* Added new family code for FC949E.
* 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
* Added additional Reason Codes and more event data fields
* to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
* Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
* new event.
* Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
* Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
* data structure.
* Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
* data structure.
* Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
* 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
* Added MaxInitiators field to PortFacts reply.
* Added SAS Device Status Change ReasonCode for
* asynchronous notification.
* Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
* data structure.
* Added new ImageType values for FWDownload and FWUpload
* requests.
* 02-28-07 01.05.13 Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
* Broadcast Event Data (replacing _RESERVED2).
* For Discovery Error Event Data DiscoveryStatus field,
* replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
* added _MULTI_PORT_DOMAIN.
* 05-24-07 01.05.14 Added Common Boot Block type to FWDownload Request.
* Added Common Boot Block type to FWUpload Request.
* 08-07-07 01.05.15 Added MPI_EVENT_SAS_INIT_RC_REMOVED define.
* Added MPI_EVENT_IR2_RC_DUAL_PORT_ADDED and
* MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED for IR2 event data.
* Added SASAddress field to SAS Initiator Device Table
* Overflow event data structure.
* 03-28-08 01.05.16 Added two new ReasonCode values to SAS Device Status
* Change Event data to indicate completion of internally
* generated task management.
* Added MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE define.
* Added MPI_EVENT_SAS_INIT_RC_INACCESSIBLE define.
* --------------------------------------------------------------------------
mpi_cnfg.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages.
* Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
* fields to FC_DEVICE_0 page, updated the page version.
* Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
* SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
* and updated the page versions.
* Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
* page and updated the page version.
* Added Information field and _INFO_PARAMS_NEGOTIATED
* definitionto SCSI_DEVICE_0 page.
* 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the
* page version.
* Added BucketsRemaining to LAN_1 page, redefined the
* state values, and updated the page version.
* Revised bus width definitions in SCSI_PORT_0,
* SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
* 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page
* version.
* Moved FC_DEVICE_0 PageAddress description to spec.
* 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field
* widths in IOC_0 page and updated the page version.
* 11-02-00 01.01.01 Original release for post 1.0 work
* Added Manufacturing pages, IO Unit Page 2, SCSI SPI
* Port Page 2, FC Port Page 4, FC Port Page 5
* 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01.
* 12-05-00 01.01.04 Modified config page actions.
* 01-09-01 01.01.05 Added defines for page address formats.
* Data size for Manufacturing pages 2 and 3 no longer
* defined here.
* Io Unit Page 2 size is fixed at 4 adapters and some
* flags were changed.
* SCSI Port Page 2 Device Settings modified.
* New fields added to FC Port Page 0 and some flags
* cleaned up.
* Removed impedance flash from FC Port Page 1.
* Added FC Port pages 6 and 7.
* 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0.
* 01-29-01 01.01.07 Changed some defines to make them 32 character unique.
* Added some LinkType defines for FcPortPage0.
* 02-20-01 01.01.08 Started using MPI_POINTER.
* 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
* MPI_CONFIG_PAGETYPE_RAID_VOLUME.
* Added definitions and structures for IOC Page 2 and
* RAID Volume Page 2.
* 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
* CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
* Added VendorId and ProductRevLevel fields to
* RAIDVOL2_IM_PHYS_ID struct.
* Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
* defines to make them compatible to MPI version 1.0.
* Added structure offset comments.
* 04-09-01 01.01.11 Added some new defines for the PageAddress field and
* removed some obsolete ones.
* Added IO Unit Page 3.
* Modified defines for Scsi Port Page 2.
* Modified RAID Volume Pages.
* 08-08-01 01.02.01 Original release for v1.2 work.
* Added SepID and SepBus to RVP2 IMPhysicalDisk struct.
* Added defines for the SEP bits in RVP2 VolumeSettings.
* Modified the DeviceSettings field in RVP2 to use the
* proper structure.
* Added defines for SES, SAF-TE, and cross channel for
* IOCPage2 CapabilitiesFlags.
* Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE.
* Removed define for
* MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE.
* Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT.
* 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035.
* Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY
* and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY.
* Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS,
* MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and
* MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and
* MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED.
* Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED
* and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED.
* Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1.
* Added rejected bits to SCSI Device Page 0 Information.
* Increased size of ALPA array in FC Port Page 2 by one
* and removed a one byte reserved field.
* 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in
* CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering.
* Added structures for Manufacturing Page 4, IO Unit
* Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and
* RAID PhysDisk Page 0.
* 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK.
* Modified some of the new defines to make them 32
* character unique.
* Modified how variable length pages (arrays) are defined.
* Added generic defines for hot spare pools and RAID
* volume types.
* 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR.
* 03-14-02 01.02.06 Added PCISlotNum field to CONFIG_PAGE_IOC_1 along with
* related define, and bumped the page version define.
* 05-31-02 01.02.07 Added a Flags field to CONFIG_PAGE_IOC_2_RAID_VOL in a
* reserved byte and added a define.
* Added define for
* MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE.
* Added new config page: CONFIG_PAGE_IOC_5.
* Added MaxAliases, MaxHardAliases, and NumCurrentAliases
* fields to CONFIG_PAGE_FC_PORT_0.
* Added AltConnector and NumRequestedAliases fields to
* CONFIG_PAGE_FC_PORT_1.
* Added new config page: CONFIG_PAGE_FC_PORT_10.
* 07-12-02 01.02.08 Added more MPI_MANUFACTPAGE_DEVID_ defines.
* Added additional MPI_SCSIDEVPAGE0_NP_ defines.
* Added more MPI_SCSIDEVPAGE1_RP_ defines.
* Added define for
* MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE.
* Added new config page: CONFIG_PAGE_SCSI_DEVICE_3.
* Modified MPI_FCPORTPAGE5_FLAGS_ defines.
* 09-16-02 01.02.09 Added MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG define.
* 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
* Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
* Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
* 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
* CONFIG_PAGE_FC_PORT_1.
* Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
* an alias.
* Added more device id defines.
* 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define.
* Added TargetConfig and IDConfig fields to
* CONFIG_PAGE_SCSI_PORT_1.
* Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2
* to control DV.
* Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
* In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
* with ADISCHardALPA.
* Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
* 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout
* fields and related defines to CONFIG_PAGE_FC_PORT_1.
* Added define for
* MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
* Added new fields to the substructures of
* CONFIG_PAGE_FC_PORT_10.
* 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0,
* CONFIG_PAGE_SCSI_DEVICE_0, and
* CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for
* these pages.
* 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0.
* 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config
* pages.
* Added a new structure for extended config page header.
* Added new extended config pages types and structures for
* SAS IO Unit, SAS Expander, SAS Device, and SAS PHY.
* Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4
* to add a Flags field.
* Two new Manufacturing config pages (5 and 6).
* Two new bits defined for IO Unit Page 1 Flags field.
* Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields
* to specify the BIOS boot device.
* Four new Flags bits defined for IO Unit Page 2.
* Added IO Unit Page 4.
* Added EEDP Flags settings to IOC Page 1.
* Added new BIOS Page 1 config page.
* 10-05-04 01.05.02 Added define for
* MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE.
* Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and
* associated defines.
* Added more defines for SAS IO Unit Page 0
* DiscoveryStatus field.
* Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK
* and MPI_SAS_IOUNIT0_DS_TABLE_LINK.
* Added defines for Physical Mapping Modes to SAS IO Unit
* Page 2.
* Added define for
* MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH.
* 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode.
* Added defines for MaxTargetSpinUp to BIOS Page 1.
* Added 5 new ControlFlags defines for SAS IO Unit
* Page 1.
* Added MaxNumPhysicalMappedIDs field to SAS IO Unit
* Page 2.
* Added AccessStatus field to SAS Device Page 0 and added
* new Flags bits for supported SATA features.
* 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID
* Volume Page 1, and RAID Physical Disk Page 1.
* Replaced IO Unit Page 1 BootTargetID,BootBus, and
* BootAdapterNum with reserved field.
* Added DataScrubRate and ResyncRate to RAID Volume
* Page 0.
* Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT
* define.
* 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
* Flags field.
* Added Auto Port Config flag define for SAS IOUNIT
* Page 1 ControlFlags.
* Added Disabled bad Phy define to Expander Page 1
* Discovery Info field.
* Added SAS/SATA device support to SAS IOUnit Page 1
* ControlFlags.
* Added Unsupported device to SAS Dev Page 0 Flags field
* Added disable use SATA Hash Address for SAS IOUNIT
* page 1 in ControlFields.
* 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to
* Manufacturing Page 4.
* Added new defines for BIOS Page 1 IOCSettings field.
* Added ExtDiskIdentifier field to RAID Physical Disk
* Page 0.
* Added new defines for SAS IO Unit Page 1 ControlFlags
* and to SAS Device Page 0 Flags to control SATA devices.
* Added defines and structures for the new Log Page 0, a
* new type of configuration page.
* 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0.
* Added WWID field to RAID Volume Page 1.
* Added PhysicalPort field to SAS Expander pages 0 and 1.
* 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1.
* Added Enclosure/Slot boot device format to BIOS Page 2.
* New status value for RAID Volume Page 0 VolumeStatus
* (VolumeState subfield).
* New value for RAID Physical Page 0 InactiveStatus.
* Added Inactive Volume Member flag RAID Physical Disk
* Page 0 PhysDiskStatus field.
* New physical mapping mode in SAS IO Unit Page 2.
* Added CONFIG_PAGE_SAS_ENCLOSURE_0.
* Added Slot and Enclosure fields to SAS Device Page 0.
* 06-24-05 01.05.09 Added EEDP defines to IOC Page 1.
* Added more RAID type defines to IOC Page 2.
* Added Port Enable Delay settings to BIOS Page 1.
* Added Bad Block Table Full define to RAID Volume Page 0.
* Added Previous State defines to RAID Physical Disk
* Page 0.
* Added Max Sata Targets define for DiscoveryStatus field
* of SAS IO Unit Page 0.
* Added Device Self Test to Control Flags of SAS IO Unit
* Page 1.
* Added Direct Attach Starting Slot Number define for SAS
* IO Unit Page 2.
* Added new fields in SAS Device Page 2 for enclosure
* mapping.
* Added OwnerDevHandle and Flags field to SAS PHY Page 0.
* Added IOC GPIO Flags define to SAS Enclosure Page 0.
* Fixed the value for MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT.
* 08-03-05 01.05.10 Removed ISDataScrubRate and ISResyncRate from
* Manufacturing Page 4.
* Added MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE bit.
* Added NumDevsPerEnclosure field to SAS IO Unit page 2.
* Added MPI_SAS_IOUNIT2_FLAGS_HOST_ASSIGNED_PHYS_MAP
* define.
* Added EnclosureHandle field to SAS Expander page 0.
* Removed redundant NumTableEntriesProg field from SAS
* Expander Page 1.
* 08-30-05 01.05.11 Added DeviceID for FC949E and changed the DeviceID for
* SAS1078.
* Added more defines for Manufacturing Page 4 Flags field.
* Added more defines for IOCSettings and added
* ExpanderSpinup field to Bios Page 1.
* Added postpone SATA Init bit to SAS IO Unit Page 1
* ControlFlags.
* Changed LogEntry format for Log Page 0.
* 03-27-06 01.05.12 Added two new Flags defines for Manufacturing Page 4.
* Added Manufacturing Page 7.
* Added MPI_IOCPAGE2_CAP_FLAGS_RAID_64_BIT_ADDRESSING.
* Added IOC Page 6.
* Added PrevBootDeviceForm field to CONFIG_PAGE_BIOS_2.
* Added MaxLBAHigh field to RAID Volume Page 0.
* Added Nvdata version fields to SAS IO Unit Page 0.
* Added AdditionalControlFlags, MaxTargetPortConnectTime,
* ReportDeviceMissingDelay, and IODeviceMissingDelay
* fields to SAS IO Unit Page 1.
* 10-11-06 01.05.13 Added NumForceWWID field and ForceWWID array to
* Manufacturing Page 5.
* Added Manufacturing pages 8 through 10.
* Added defines for supported metadata size bits in
* CapabilitiesFlags field of IOC Page 6.
* Added defines for metadata size bits in VolumeSettings
* field of RAID Volume Page 0.
* Added SATA Link Reset settings, Enable SATA Asynchronous
* Notification bit, and HideNonZeroAttachedPhyIdentifiers
* bit to AdditionalControlFlags field of SAS IO Unit
* Page 1.
* Added defines for Enclosure Devices Unmapped and
* Device Limit Exceeded bits in Status field of SAS IO
* Unit Page 2.
* Added more AccessStatus values for SAS Device Page 0.
* Added bit for SATA Asynchronous Notification Support in
* Flags field of SAS Device Page 0.
* 02-28-07 01.05.14 Added ExtFlags field to Manufacturing Page 4.
* Added Disable SMART Polling for CapabilitiesFlags of
* IOC Page 6.
* Added Disable SMART Polling to DeviceSettings of BIOS
* Page 1.
* Added Multi-Port Domain bit for DiscoveryStatus field
* of SAS IO Unit Page.
* Added Multi-Port Domain Illegal flag for SAS IO Unit
* Page 1 AdditionalControlFlags field.
* 05-24-07 01.05.15 Added Hide Physical Disks with Non-Integrated RAID
* Metadata bit to Manufacturing Page 4 ExtFlags field.
* Added Internal Connector to End Device Present bit to
* Expander Page 0 Flags field.
* Fixed define for
* MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED.
* 08-07-07 01.05.16 Added MPI_IOCPAGE6_CAP_FLAGS_MULTIPORT_DRIVE_SUPPORT
* define.
* Added BIOS Page 4 structure.
* Added MPI_RAID_PHYS_DISK1_PATH_MAX define for RAID
* Physcial Disk Page 1.
* 01-15-07 01.05.17 Added additional bit defines for ExtFlags field of
* Manufacturing Page 4.
* Added Solid State Drives Supported bit to IOC Page 6
* Capabilities Flags.
* Added new value for AccessStatus field of SAS Device
* Page 0 (_SATA_NEEDS_INITIALIZATION).
* 03-28-08 01.05.18 Defined new bits in Manufacturing Page 4 ExtFlags field
* to control coercion size and the mixing of SAS and SATA
* SSD drives.
* --------------------------------------------------------------------------
mpi_init.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
* 02-20-01 01.01.03 Started using MPI_POINTER.
* 03-27-01 01.01.04 Added structure offset comments.
* 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
* Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
* MSG_SCSI_IO_REPLY.
* 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
* Processor messages.
* 10-04-01 01.02.04 Added defines for SEP request Action field.
* 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
* for SCSI IO requests.
* 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
* 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
* Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
* and a reserved U16.
* Added new MSG_SCSI_IO32_REQUEST structure.
* Added a TaskType of Clear Task Set to SCSI
* Task Management request.
* 12-07-04 01.05.02 Added support for Task Management Query Task.
* 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
* WWID addressing.
* 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
* Removed SCSI IO 32 Request.
* Modified SCSI Enclosure Processor Request and Reply to
* support Enclosure/Slot addressing rather than WWID
* addressing.
* 06-24-05 01.05.05 Added SCSI IO 32 structures and defines.
* Added four new defines for SEP SlotStatus.
* 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them
* unique in the first 32 characters.
* 03-27-06 01.05.07 Added Task Management type of Clear ACA.
* 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA.
* 02-28-07 01.05.09 Defined two new MsgFlags bits for SCSI Task Management
* Request: Do Not Send Task IU and Soft Reset Option.
* --------------------------------------------------------------------------
mpi_targ.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
* Corrected DECSRIPTOR typo to DESCRIPTOR.
* 11-02-00 01.01.01 Original release for post 1.0 work
* Modified target mode to use IoIndex instead of
* HostIndex and IocIndex. Added Alias.
* 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
* and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
* 02-20-01 01.01.03 Started using MPI_POINTER.
* Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
* MPI_TARGET_FCP_CMD_BUFFER.
* 03-27-01 01.01.04 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
* Added PriorityReason field to some replies and
* defined more PriorityReason codes.
* Added some defines for to support previous version
* of MPI.
* 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
* 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
* 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
* byte ordering.
* 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
* one bit.
* Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
* 09-16-02 01.02.07 Added flags for confirmed completion.
* Added PRIORITY_REASON_TARGET_BUSY.
* 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
* 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Added new request message structures for
* MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
* MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
* MSG_TARGET_ASSIST_EXT_REQUEST.
* Added new structures for SAS SSP Command buffer, SSP
* Task buffer, and SSP Status IU.
* 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
* 02-22-05 01.05.03 Changed a comment.
* 03-11-05 01.05.04 Removed TargetAssistExtended Request.
* 06-24-05 01.05.05 Added TargetAssistExtended structures and defines.
* 03-27-06 01.05.06 Added a comment.
* --------------------------------------------------------------------------
mpi_fc.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-12-00 01.00.02 Added _MSG_FC_ABORT_REPLY structure.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 12-04-00 01.01.02 Added messages for Common Transport Send and
* Primitive Send.
* 01-09-01 01.01.03 Modified some of the new flags to have an MPI prefix
* and modified the FcPrimitiveSend flags.
* 01-25-01 01.01.04 Move InitiatorIndex in LinkServiceRsp reply to a larger
* field.
* Added FC_ABORT_TYPE_CT_SEND_REQUEST and
* FC_ABORT_TYPE_EXLINKSEND_REQUEST for FcAbort request.
* Added MPI_FC_PRIM_SEND_FLAGS_STOP_SEND.
* 02-20-01 01.01.05 Started using MPI_POINTER.
* 03-27-01 01.01.06 Added Flags field to MSG_LINK_SERVICE_BUFFER_POST_REPLY
* and defined MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED.
* Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
* Added structure offset comments.
* 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Change name of reserved field in
* MSG_LINK_SERVICE_RSP_REPLY.
* 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
* 01-16-04 01.02.04 Added define for MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
mpi_lan.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added LANStatus field to _MSG_LAN_SEND_REPLY.
* Added LANStatus field to _MSG_LAN_RECEIVE_POST_REPLY.
* Moved ListCount field in _MSG_LAN_RECEIVE_POST_REPLY.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-12-00 01.00.02 Added MPI_ to BUCKETSTATUS_ definitions.
* 06-22-00 01.00.03 Major changes to match new LAN definition in 1.0 spec.
* 06-30-00 01.00.04 Added Context Reply definitions per revised proposal.
* Changed transaction context usage to bucket/buffer.
* 07-05-00 01.00.05 Removed LAN_RECEIVE_POST_BUCKET_CONTEXT_MASK definition
* to lan private header file
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Started using MPI_POINTER.
* 03-27-01 01.01.03 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
mpi_raid.h
* 02-27-01 01.01.01 Original release for this file.
* 03-27-01 01.01.02 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
* 09-28-01 01.02.02 Major rework for MPI v1.2 Integrated RAID changes.
* 10-04-01 01.02.03 Added ActionData defines for
* MPI_RAID_ACTION_DELETE_VOLUME action.
* 11-01-01 01.02.04 Added define for MPI_RAID_ACTION_ADATA_DO_NOT_SYNC.
* 03-14-02 01.02.05 Added define for MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT.
* 05-07-02 01.02.06 Added define for MPI_RAID_ACTION_ACTIVATE_VOLUME,
* MPI_RAID_ACTION_INACTIVATE_VOLUME, and
* MPI_RAID_ACTION_ADATA_INACTIVATE_ALL.
* 07-12-02 01.02.07 Added structures for Mailbox request and reply.
* 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
* 04-01-03 01.02.09 New action data option flag for
* MPI_RAID_ACTION_DELETE_VOLUME.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 01-15-05 01.05.02 Added defines for the two new RAID Actions for
* _SET_RESYNC_RATE and _SET_DATA_SCRUB_RATE.
* 02-28-07 01.05.03 Added new RAID Action, Device FW Update Mode, and
* associated defines.
* 08-07-07 01.05.04 Added Disable Full Rebuild bit to the ActionDataWord
* for the RAID Action MPI_RAID_ACTION_DISABLE_VOLUME.
* 01-15-08 01.05.05 Added define for MPI_RAID_ACTION_SET_VOLUME_NAME.
* --------------------------------------------------------------------------
mpi_tool.h
* 08-08-01 01.02.01 Original release.
* 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
* 01-16-04 01.02.03 Added defines and structures for new tools
*. MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL and
* MPI_TOOLBOX_FC_MANAGEMENT_TOOL.
* 04-29-04 01.02.04 Added message structures for Diagnostic Buffer Post and
* Diagnostic Release requests and replies.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 10-06-04 01.05.02 Added define for MPI_DIAG_BUF_TYPE_COUNT.
* 02-09-05 01.05.03 Added frame size option to FC management tool.
* Added Beacon tool to the Toolbox.
* --------------------------------------------------------------------------
mpi_inb.h
* 05-11-04 01.03.01 Original release.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
mpi_sas.h
* 08-19-04 01.05.01 Original release.
* 08-30-05 01.05.02 Added DeviceInfo bit for SEP.
* Added PrimFlags and Primitive field to SAS IO Unit
* Control request, and added a new operation code.
* 03-27-06 01.05.03 Added Force Full Discovery, Transmit Port Select Signal,
* and Remove Device operations to SAS IO Unit Control.
* Added DevHandle field to SAS IO Unit Control request and
* reply.
* 10-11-06 01.05.04 Fixed the name of a define for Operation field of SAS IO
* Unit Control request.
* 01-15-08 01.05.05 Added support for MPI_SAS_OP_SET_IOC_PARAMETER,
* including adding IOCParameter and IOCParameter value
* fields to SAS IO Unit Control Request.
* Added MPI_SAS_DEVICE_INFO_PRODUCT_SPECIFIC define.
* --------------------------------------------------------------------------
mpi_type.h
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 08-30-05 01.05.02 Added PowerPC option to #ifdef's.
* --------------------------------------------------------------------------
mpi_history.txt Parts list history
Filename 01.05.19 01.05.18 01.05.17 01.05.16 01.05.15
---------- -------- -------- -------- -------- --------
mpi.h 01.05.16 01.05.15 01.05.14 01.05.13 01.05.12
mpi_ioc.h 01.05.16 01.05.15 01.05.15 01.05.14 01.05.13
mpi_cnfg.h 01.05.18 01.05.17 01.05.16 01.05.15 01.05.14
mpi_init.h 01.05.09 01.05.09 01.05.09 01.05.09 01.05.09
mpi_targ.h 01.05.06 01.05.06 01.05.06 01.05.06 01.05.06
mpi_fc.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_lan.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_raid.h 01.05.05 01.05.05 01.05.04 01.05.03 01.05.03
mpi_tool.h 01.05.03 01.05.03 01.05.03 01.05.03 01.05.03
mpi_inb.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_sas.h 01.05.05 01.05.05 01.05.04 01.05.04 01.05.04
mpi_type.h 01.05.02 01.05.02 01.05.02 01.05.02 01.05.02
Filename 01.05.14 01.05.13 01.05.12 01.05.11 01.05.10 01.05.09
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.05.12 01.05.11 01.05.10 01.05.09 01.05.08 01.05.07
mpi_ioc.h 01.05.12 01.05.11 01.05.10 01.05.09 01.05.09 01.05.08
mpi_cnfg.h 01.05.13 01.05.12 01.05.11 01.05.10 01.05.09 01.05.08
mpi_init.h 01.05.08 01.05.07 01.05.06 01.05.06 01.05.05 01.05.04
mpi_targ.h 01.05.06 01.05.06 01.05.05 01.05.05 01.05.05 01.05.04
mpi_fc.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_lan.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_raid.h 01.05.02 01.05.02 01.05.02 01.05.02 01.05.02 01.05.02
mpi_tool.h 01.05.03 01.05.03 01.05.03 01.05.03 01.05.03 01.05.03
mpi_inb.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_sas.h 01.05.04 01.05.03 01.05.02 01.05.01 01.05.01 01.05.01
mpi_type.h 01.05.02 01.05.02 01.05.02 01.05.01 01.05.01 01.05.01
Filename 01.05.08 01.05.07 01.05.06 01.05.05 01.05.04 01.05.03
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.05.06 01.05.05 01.05.04 01.05.03 01.05.02 01.05.01
mpi_ioc.h 01.05.07 01.05.06 01.05.05 01.05.04 01.05.03 01.05.02
mpi_cnfg.h 01.05.07 01.05.07 01.05.06 01.05.05 01.05.04 01.05.03
mpi_init.h 01.05.03 01.05.03 01.05.03 01.05.02 01.05.02 01.05.01
mpi_targ.h 01.05.03 01.05.02 01.05.02 01.05.02 01.05.02 01.05.02
mpi_fc.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_lan.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_raid.h 01.05.02 01.05.02 01.05.02 01.05.01 01.05.01 01.05.01
mpi_tool.h 01.05.03 01.05.03 01.05.02 01.05.02 01.05.02 01.05.02
mpi_inb.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_sas.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
mpi_type.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
Filename 01.05.02 01.05.01 01.03.01 01.02.14 01.02.13 01.02.12
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.05.01 01.05.01 01.03.01 01.02.12 01.02.11 01.02.10
mpi_ioc.h 01.05.02 01.05.01 01.03.01 01.02.09 01.02.08 01.02.08
mpi_cnfg.h 01.05.02 01.05.01 01.03.01 01.02.14 01.02.13 01.02.12
mpi_init.h 01.05.01 01.05.01 01.03.01 01.02.07 01.02.07 01.02.07
mpi_targ.h 01.05.02 01.05.01 01.03.01 01.02.09 01.02.09 01.02.09
mpi_fc.h 01.05.01 01.05.01 01.03.01 01.02.04 01.02.04 01.02.03
mpi_lan.h 01.05.01 01.05.01 01.03.01 01.02.01 01.02.01 01.02.01
mpi_raid.h 01.05.01 01.05.01 01.03.01 01.02.09 01.02.09 01.02.09
mpi_tool.h 01.05.02 01.05.01 01.03.01 01.02.01 01.02.01 01.02.01
mpi_inb.h 01.05.01 01.05.01 01.03.01
mpi_sas.h 01.05.01 01.05.01
mpi_type.h 01.05.01 01.05.01 01.03.01 01.02.04 01.02.03 01.02.02
Filename 01.02.11 01.02.10 01.02.09 01.02.08 01.02.07 01.02.06
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.02.09 01.02.08 01.02.07 01.02.06 01.02.05 01.02.04
mpi_ioc.h 01.02.07 01.02.06 01.02.06 01.02.06 01.02.06 01.02.05
mpi_cnfg.h 01.02.11 01.02.10 01.02.09 01.02.08 01.02.07 01.02.06
mpi_init.h 01.02.06 01.02.06 01.02.05 01.02.05 01.02.05 01.02.04
mpi_targ.h 01.02.09 01.02.08 01.02.07 01.02.06 01.02.06 01.02.05
mpi_fc.h 01.02.03 01.02.03 01.02.03 01.02.03 01.02.03 01.02.02
mpi_lan.h 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01
mpi_raid.h 01.02.09 01.02.08 01.02.07 01.02.07 01.02.06 01.02.05
mpi_tool.h 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01
mpi_type.h 01.02.02 01.02.02 01.02.02 01.02.02 01.02.02 01.02.02
Filename 01.02.05 01.02.04 01.02.03 01.02.02 01.02.01 01.01.10
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.02.03 01.02.02 01.02.02 01.02.01 01.02.01 01.01.07
mpi_ioc.h 01.02.04 01.02.03 01.02.03 01.02.02 01.02.01 01.01.07
mpi_cnfg.h 01.02.05 01.02.04 01.02.03 01.02.02 01.02.01 01.01.11
mpi_init.h 01.02.04 01.02.04 01.02.03 01.02.02 01.02.01 01.01.05
mpi_targ.h 01.02.04 01.02.03 01.02.02 01.02.01 01.02.01 01.01.04
mpi_fc.h 01.02.02 01.02.02 01.02.02 01.02.01 01.02.01 01.01.07
mpi_lan.h 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01 01.01.03
mpi_raid.h 01.02.04 01.02.03 01.02.02 01.02.01 01.02.01 01.01.02
mpi_tool.h 01.02.02 01.02.02 01.02.02 01.02.02 01.02.01
mpi_type.h 01.02.02 01.02.02 01.02.02 01.02.02 01.02.01 01.01.02
Filename 01.01.09 01.01.08 01.01.07 01.01.06 01.01.05 01.01.04
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.01.06 01.01.06 01.01.05 01.01.04 01.01.04 01.01.03
mpi_ioc.h 01.01.06 01.01.05 01.01.04 01.01.03 01.01.03 01.01.03
mpi_cnfg.h 01.01.10 01.01.09 01.01.08 01.01.07 01.01.06 01.01.05
mpi_init.h 01.01.04 01.01.03 01.01.03 01.01.02 01.01.02 01.01.02
mpi_targ.h 01.01.04 01.01.03 01.01.03 01.01.02 01.01.02 01.01.02
mpi_fc.h 01.01.06 01.01.05 01.01.05 01.01.04 01.01.04 01.01.03
mpi_lan.h 01.01.03 01.01.02 01.01.02 01.01.01 01.01.01 01.01.01
mpi_raid.h 01.01.02 01.01.01
mpi_type.h 01.01.02 01.01.02 01.01.02 01.01.01 01.01.01 01.01.01
Filename 01.01.03 01.01.02 01.01.01 01.00.07 01.00.06 01.00.05
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.01.02 01.01.02 01.01.01 01.00.04 01.00.04 01.00.03
mpi_ioc.h 01.01.02 01.01.02 01.01.01 01.00.05 01.00.04 01.00.03
mpi_cnfg.h 01.01.04 01.01.03 01.01.01 01.00.05 01.00.05 01.00.04
mpi_init.h 01.01.02 01.01.02 01.01.01 01.00.02 01.00.02 01.00.02
mpi_targ.h 01.01.01 01.01.01 01.01.01 01.00.02 01.00.02 01.00.02
mpi_fc.h 01.01.02 01.01.02 01.01.01 01.00.02 01.00.02 01.00.02
mpi_lan.h 01.01.01 01.01.01 01.01.01 01.00.05 01.00.05 01.00.05
mpi_type.h 01.01.01 01.01.01 01.01.01 01.00.01 01.00.01 01.00.01
Filename 01.00.04 01.00.03 01.00.02 01.00.01 00.10.02 00.10.01
---------- -------- -------- -------- -------- -------- --------
mpi.h 01.00.02 01.00.01 01.00.01 01.00.01 00.10.02 00.10.01
mpi_ioc.h 01.00.02 01.00.02 01.00.01 01.00.01 00.10.02 00.10.01
mpi_cnfg.h 01.00.03 01.00.02 01.00.02 01.00.01 00.10.01 00.10.01
mpi_init.h 01.00.02 01.00.02 01.00.02 01.00.01 00.10.02 00.10.01
mpi_targ.h 01.00.02 01.00.01 01.00.01 01.00.01 00.10.01 00.10.01
mpi_fc.h 01.00.02 01.00.02 01.00.01 01.00.01 00.10.01 00.10.01
mpi_lan.h 01.00.03 01.00.02 01.00.01 01.00.01 00.10.02 00.10.01
mpi_type.h 01.00.01 01.00.01 01.00.01 01.00.01 00.10.01 00.10.01
* --------------------------------------------------------------------------

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_init.h
* Title: MPI initiator mode messages and structures
* Creation Date: June 8, 2000
*
* mpi_init.h Version: 01.05.09
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions.
* 11-02-00 01.01.01 Original release for post 1.0 work.
* 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT.
* 02-20-01 01.01.03 Started using MPI_POINTER.
* 03-27-01 01.01.04 Added structure offset comments.
* 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
* Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
* MSG_SCSI_IO_REPLY.
* 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
* Processor messages.
* 10-04-01 01.02.04 Added defines for SEP request Action field.
* 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
* for SCSI IO requests.
* 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
* 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
* Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
* and a reserved U16.
* Added new MSG_SCSI_IO32_REQUEST structure.
* Added a TaskType of Clear Task Set to SCSI
* Task Management request.
* 12-07-04 01.05.02 Added support for Task Management Query Task.
* 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
* WWID addressing.
* 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
* Removed SCSI IO 32 Request.
* Modified SCSI Enclosure Processor Request and Reply to
* support Enclosure/Slot addressing rather than WWID
* addressing.
* 06-24-05 01.05.05 Added SCSI IO 32 structures and defines.
* Added four new defines for SEP SlotStatus.
* 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them
* unique in the first 32 characters.
* 03-27-06 01.05.07 Added Task Management type of Clear ACA.
* 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA.
* 02-28-07 01.05.09 Defined two new MsgFlags bits for SCSI Task Management
* Request: Do Not Send Task IU and Soft Reset Option.
* --------------------------------------------------------------------------
*/
#ifndef MPI_INIT_H
#define MPI_INIT_H
/*****************************************************************************
*
* S C S I I n i t i a t o r M e s s a g e s
*
*****************************************************************************/
/****************************************************************************/
/* SCSI IO messages and associated structures */
/****************************************************************************/
typedef struct _MSG_SCSI_IO_REQUEST
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Reserved; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Control; /* 14h */
U8 CDB[16]; /* 18h */
U32 DataLength; /* 28h */
U32 SenseBufferLowAddr; /* 2Ch */
SGE_IO_UNION SGL; /* 30h */
} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
/* SCSI IO MsgFlags bits */
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
/* SCSI IO LUN fields */
#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
/* SCSI IO Control bits */
#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI_SCSIIO_CONTROL_READ (0x02000000)
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
/* SCSI IO reply structure */
typedef struct _MSG_SCSI_IO_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Reserved; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 SCSIStatus; /* 0Ch */
U8 SCSIState; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
U16 TaskTag; /* 20h */
U16 Reserved1; /* 22h */
} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
/* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */
#define MPI_SCSI_STATUS_SUCCESS (0x00)
#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI_SCSI_STATUS_BUSY (0x08)
#define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80)
#define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81)
#define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82)
/* SCSI IO Reply SCSIState values */
#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI_SCSI_STATE_TERMINATED (0x08)
#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
/* SCSI IO Reply ResponseInfo values */
/* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
#define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************/
/* SCSI IO 32 messages and associated structures */
/****************************************************************************/
typedef struct
{
U8 CDB[20]; /* 00h */
U32 PrimaryReferenceTag; /* 14h */
U16 PrimaryApplicationTag; /* 18h */
U16 PrimaryApplicationTagMask; /* 1Ah */
U32 TransferLength; /* 1Ch */
} MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
typedef struct
{
U8 CDB[16]; /* 00h */
U32 DataLength; /* 10h */
U32 PrimaryReferenceTag; /* 14h */
U16 PrimaryApplicationTag; /* 18h */
U16 PrimaryApplicationTagMask; /* 1Ah */
U32 TransferLength; /* 1Ch */
} MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
typedef union
{
U8 CDB32[32];
MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
SGE_SIMPLE_UNION SGE;
} MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
typedef struct
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U16 Reserved1; /* 02h */
U32 Reserved2; /* 04h */
} MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
typedef union
{
MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID;
U64 WWID;
} MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
typedef struct _MSG_SCSI_IO32_REQUEST
{
U8 Port; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Flags; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Control; /* 14h */
MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */
U32 DataLength; /* 38h */
U32 BidirectionalDataLength; /* 3Ch */
U32 SecondaryReferenceTag; /* 40h */
U16 SecondaryApplicationTag; /* 44h */
U16 Reserved2; /* 46h */
U16 EEDPFlags; /* 48h */
U16 ApplicationTagTranslationMask; /* 4Ah */
U32 EEDPBlockSize; /* 4Ch */
MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */
U8 SGLOffset0; /* 58h */
U8 SGLOffset1; /* 59h */
U8 SGLOffset2; /* 5Ah */
U8 SGLOffset3; /* 5Bh */
U32 Reserved3; /* 5Ch */
U32 Reserved4; /* 60h */
U32 SenseBufferLowAddr; /* 64h */
SGE_IO_UNION SGL; /* 68h */
} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
/* SCSI IO 32 MsgFlags bits */
#define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00)
#define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01)
#define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02)
#define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
#define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08)
#define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10)
#define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20)
#define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40)
/* SCSI IO 32 Flags bits */
#define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03)
#define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00)
#define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01)
/* SCSI IO 32 LUN fields */
#define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00)
#define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00)
/* SCSI IO 32 Control bits */
#define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000)
#define MPI_SCSIIO32_CONTROL_WRITE (0x01000000)
#define MPI_SCSIIO32_CONTROL_READ (0x02000000)
#define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000)
#define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100)
#define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200)
#define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400)
#define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500)
#define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700)
#define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000)
#define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000)
#define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000)
#define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000)
#define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000)
#define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000)
#define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000)
#define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000)
#define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000)
/* SCSI IO 32 EEDPFlags */
#define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007)
#define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001)
#define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003)
#define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007)
#define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008)
#define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400)
#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8)
#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
/* SCSIIO32 IO reply structure */
typedef struct _MSG_SCSIIO32_IO_REPLY
{
U8 Port; /* 00h */
U8 Reserved1; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Flags; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 SCSIStatus; /* 0Ch */
U8 SCSIState; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
U16 TaskTag; /* 20h */
U16 Reserved2; /* 22h */
U32 BidirectionalTransferCount; /* 24h */
} MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
/****************************************************************************/
/* SCSI Task Management messages */
/****************************************************************************/
typedef struct _MSG_SCSI_TASK_MGMT
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 Reserved; /* 04h */
U8 TaskType; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Reserved2[7]; /* 14h */
U32 TaskMsgContext; /* 30h */
} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
/* TaskType values */
#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
/* MsgFlags bits */
#define MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
#define MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION (0x08)
/* SCSI Task Management Reply */
typedef struct _MSG_SCSI_TASK_MGMT_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 ResponseCode; /* 04h */
U8 TaskType; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2[2]; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TerminationCount; /* 14h */
} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
/* ResponseCode values */
#define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/****************************************************************************/
/* SCSI Enclosure Processor messages */
/****************************************************************************/
typedef struct _MSG_SEP_REQUEST
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 Action; /* 04h */
U8 Flags; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 SlotStatus; /* 0Ch */
U32 Reserved2; /* 10h */
U32 Reserved3; /* 14h */
U32 Reserved4; /* 18h */
U16 Slot; /* 1Ch */
U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
SEPRequest_t, MPI_POINTER pSEPRequest_t;
/* Action defines */
#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
/* Flags defines */
#define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
#define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
/* SlotStatus bits for MSG_SEP_REQUEST */
#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000)
#define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000)
#define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000)
#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
#define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000)
#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
typedef struct _MSG_SEP_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 Action; /* 04h */
U8 Reserved1; /* 05h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 SlotStatus; /* 14h */
U32 Reserved4; /* 18h */
U16 Slot; /* 1Ch */
U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
SEPReply_t, MPI_POINTER pSEPReply_t;
/* SlotStatus bits for MSG_SEP_REPLY */
#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000)
#define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000)
#define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000)
#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
#define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_lan.h
* Title: MPI LAN messages and structures
* Creation Date: June 30, 2000
*
* mpi_lan.h Version: 01.05.01
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 05-24-00 00.10.02 Added LANStatus field to _MSG_LAN_SEND_REPLY.
* Added LANStatus field to _MSG_LAN_RECEIVE_POST_REPLY.
* Moved ListCount field in _MSG_LAN_RECEIVE_POST_REPLY.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-12-00 01.00.02 Added MPI_ to BUCKETSTATUS_ definitions.
* 06-22-00 01.00.03 Major changes to match new LAN definition in 1.0 spec.
* 06-30-00 01.00.04 Added Context Reply definitions per revised proposal.
* Changed transaction context usage to bucket/buffer.
* 07-05-00 01.00.05 Removed LAN_RECEIVE_POST_BUCKET_CONTEXT_MASK definition
* to lan private header file
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Started using MPI_POINTER.
* 03-27-01 01.01.03 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
#ifndef MPI_LAN_H
#define MPI_LAN_H
/******************************************************************************
*
* L A N M e s s a g e s
*
*******************************************************************************/
/* LANSend messages */
typedef struct _MSG_LAN_SEND_REQUEST
{
U16 Reserved; /* 00h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
SGE_MPI_UNION SG_List[1]; /* 0Ch */
} MSG_LAN_SEND_REQUEST, MPI_POINTER PTR_MSG_LAN_SEND_REQUEST,
LANSendRequest_t, MPI_POINTER pLANSendRequest_t;
typedef struct _MSG_LAN_SEND_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 Reserved2; /* 04h */
U8 NumberOfContexts; /* 05h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 BufferContext; /* 14h */
} MSG_LAN_SEND_REPLY, MPI_POINTER PTR_MSG_LAN_SEND_REPLY,
LANSendReply_t, MPI_POINTER pLANSendReply_t;
/* LANReceivePost */
typedef struct _MSG_LAN_RECEIVE_POST_REQUEST
{
U16 Reserved; /* 00h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 BucketCount; /* 0Ch */
SGE_MPI_UNION SG_List[1]; /* 10h */
} MSG_LAN_RECEIVE_POST_REQUEST, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REQUEST,
LANReceivePostRequest_t, MPI_POINTER pLANReceivePostRequest_t;
typedef struct _MSG_LAN_RECEIVE_POST_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 Reserved2; /* 04h */
U8 NumberOfContexts; /* 05h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 BucketsRemaining; /* 14h */
U32 PacketOffset; /* 18h */
U32 PacketLength; /* 1Ch */
U32 BucketContext[1]; /* 20h */
} MSG_LAN_RECEIVE_POST_REPLY, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REPLY,
LANReceivePostReply_t, MPI_POINTER pLANReceivePostReply_t;
/* LANReset */
typedef struct _MSG_LAN_RESET_REQUEST
{
U16 Reserved; /* 00h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 PortNumber; /* 05h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
} MSG_LAN_RESET_REQUEST, MPI_POINTER PTR_MSG_LAN_RESET_REQUEST,
LANResetRequest_t, MPI_POINTER pLANResetRequest_t;
typedef struct _MSG_LAN_RESET_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 PortNumber; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_LAN_RESET_REPLY, MPI_POINTER PTR_MSG_LAN_RESET_REPLY,
LANResetReply_t, MPI_POINTER pLANResetReply_t;
/****************************************************************************/
/* LAN Context Reply defines and macros */
/****************************************************************************/
#define LAN_REPLY_PACKET_LENGTH_MASK (0x0000FFFF)
#define LAN_REPLY_PACKET_LENGTH_SHIFT (0)
#define LAN_REPLY_BUCKET_CONTEXT_MASK (0x07FF0000)
#define LAN_REPLY_BUCKET_CONTEXT_SHIFT (16)
#define LAN_REPLY_BUFFER_CONTEXT_MASK (0x07FFFFFF)
#define LAN_REPLY_BUFFER_CONTEXT_SHIFT (0)
#define LAN_REPLY_FORM_MASK (0x18000000)
#define LAN_REPLY_FORM_RECEIVE_SINGLE (0x00)
#define LAN_REPLY_FORM_RECEIVE_MULTIPLE (0x01)
#define LAN_REPLY_FORM_SEND_SINGLE (0x02)
#define LAN_REPLY_FORM_MESSAGE_CONTEXT (0x03)
#define LAN_REPLY_FORM_SHIFT (27)
#define GET_LAN_PACKET_LENGTH(x) (((x) & LAN_REPLY_PACKET_LENGTH_MASK) \
>> LAN_REPLY_PACKET_LENGTH_SHIFT)
#define SET_LAN_PACKET_LENGTH(x, lth) \
((x) = ((x) & ~LAN_REPLY_PACKET_LENGTH_MASK) | \
(((lth) << LAN_REPLY_PACKET_LENGTH_SHIFT) & \
LAN_REPLY_PACKET_LENGTH_MASK))
#define GET_LAN_BUCKET_CONTEXT(x) (((x) & LAN_REPLY_BUCKET_CONTEXT_MASK) \
>> LAN_REPLY_BUCKET_CONTEXT_SHIFT)
#define SET_LAN_BUCKET_CONTEXT(x, ctx) \
((x) = ((x) & ~LAN_REPLY_BUCKET_CONTEXT_MASK) | \
(((ctx) << LAN_REPLY_BUCKET_CONTEXT_SHIFT) & \
LAN_REPLY_BUCKET_CONTEXT_MASK))
#define GET_LAN_BUFFER_CONTEXT(x) (((x) & LAN_REPLY_BUFFER_CONTEXT_MASK) \
>> LAN_REPLY_BUFFER_CONTEXT_SHIFT)
#define SET_LAN_BUFFER_CONTEXT(x, ctx) \
((x) = ((x) & ~LAN_REPLY_BUFFER_CONTEXT_MASK) | \
(((ctx) << LAN_REPLY_BUFFER_CONTEXT_SHIFT) & \
LAN_REPLY_BUFFER_CONTEXT_MASK))
#define GET_LAN_FORM(x) (((x) & LAN_REPLY_FORM_MASK) \
>> LAN_REPLY_FORM_SHIFT)
#define SET_LAN_FORM(x, frm) \
((x) = ((x) & ~LAN_REPLY_FORM_MASK) | \
(((frm) << LAN_REPLY_FORM_SHIFT) & \
LAN_REPLY_FORM_MASK))
/****************************************************************************/
/* LAN Current Device State defines */
/****************************************************************************/
#define MPI_LAN_DEVICE_STATE_RESET (0x00)
#define MPI_LAN_DEVICE_STATE_OPERATIONAL (0x01)
/****************************************************************************/
/* LAN Loopback defines */
/****************************************************************************/
#define MPI_LAN_TX_MODES_ENABLE_LOOPBACK_SUPPRESSION (0x01)
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation. All rights reserved.
*
* NAME: fc_log.h
* SUMMARY: MPI IocLogInfo definitions for the SYMFC9xx chips
* DESCRIPTION: Contains the enumerated list of values that may be returned
* in the IOCLogInfo field of a MPI Default Reply Message.
*
* CREATION DATE: 6/02/2000
* ID: $Id: fc_log.h,v 4.6 2001/07/26 14:41:33 sschremm Exp $
*/
/*
* MpiIocLogInfo_t enum
*
* These 32 bit values are used in the IOCLogInfo field of the MPI reply
* messages.
* The value is 0xabcccccc where
* a = The type of log info as per the MPI spec. Since these codes are
* all for Fibre Channel this value will always be 2.
* b = Specifies a subclass of the firmware where
* 0 = FCP Initiator
* 1 = FCP Target
* 2 = LAN
* 3 = MPI Message Layer
* 4 = FC Link
* 5 = Context Manager
* 6 = Invalid Field Offset
* 7 = State Change Info
* all others are reserved for future use
* c = A specific value within the subclass.
*
* NOTE: Any new values should be added to the end of each subclass so that the
* codes remain consistent across firmware releases.
*/
typedef enum _MpiIocLogInfoFc
{
MPI_IOCLOGINFO_FC_INIT_BASE = 0x20000000,
MPI_IOCLOGINFO_FC_INIT_ERROR_OUT_OF_ORDER_FRAME = 0x20000001, /* received an out of order frame - unsupported */
MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_START_OF_FRAME = 0x20000002, /* Bad Rx Frame, bad start of frame primitive */
MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_END_OF_FRAME = 0x20000003, /* Bad Rx Frame, bad end of frame primitive */
MPI_IOCLOGINFO_FC_INIT_ERROR_OVER_RUN = 0x20000004, /* Bad Rx Frame, overrun */
MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OTHER = 0x20000005, /* Other errors caught by IOC which require retries */
MPI_IOCLOGINFO_FC_INIT_ERROR_SUBPROC_DEAD = 0x20000006, /* Main processor could not initialize sub-processor */
MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OVERRUN = 0x20000007, /* Scatter Gather overrun */
MPI_IOCLOGINFO_FC_INIT_ERROR_RX_BAD_STATUS = 0x20000008, /* Receiver detected context mismatch via invalid header */
MPI_IOCLOGINFO_FC_INIT_ERROR_RX_UNEXPECTED_FRAME= 0x20000009, /* CtxMgr detected unsupported frame type */
MPI_IOCLOGINFO_FC_INIT_ERROR_LINK_FAILURE = 0x2000000A, /* Link failure occurred */
MPI_IOCLOGINFO_FC_INIT_ERROR_TX_TIMEOUT = 0x2000000B, /* Transmitter timeout error */
MPI_IOCLOGINFO_FC_TARGET_BASE = 0x21000000,
MPI_IOCLOGINFO_FC_TARGET_NO_PDISC = 0x21000001, /* not sent because we are waiting for a PDISC from the initiator */
MPI_IOCLOGINFO_FC_TARGET_NO_LOGIN = 0x21000002, /* not sent because we are not logged in to the remote node */
MPI_IOCLOGINFO_FC_TARGET_DOAR_KILLED_BY_LIP = 0x21000003, /* Data Out, Auto Response, not sent due to a LIP */
MPI_IOCLOGINFO_FC_TARGET_DIAR_KILLED_BY_LIP = 0x21000004, /* Data In, Auto Response, not sent due to a LIP */
MPI_IOCLOGINFO_FC_TARGET_DIAR_MISSING_DATA = 0x21000005, /* Data In, Auto Response, missing data frames */
MPI_IOCLOGINFO_FC_TARGET_DONR_KILLED_BY_LIP = 0x21000006, /* Data Out, No Response, not sent due to a LIP */
MPI_IOCLOGINFO_FC_TARGET_WRSP_KILLED_BY_LIP = 0x21000007, /* Auto-response after a write not sent due to a LIP */
MPI_IOCLOGINFO_FC_TARGET_DINR_KILLED_BY_LIP = 0x21000008, /* Data In, No Response, not completed due to a LIP */
MPI_IOCLOGINFO_FC_TARGET_DINR_MISSING_DATA = 0x21000009, /* Data In, No Response, missing data frames */
MPI_IOCLOGINFO_FC_TARGET_MRSP_KILLED_BY_LIP = 0x2100000a, /* Manual Response not sent due to a LIP */
MPI_IOCLOGINFO_FC_TARGET_NO_CLASS_3 = 0x2100000b, /* not sent because remote node does not support Class 3 */
MPI_IOCLOGINFO_FC_TARGET_LOGIN_NOT_VALID = 0x2100000c, /* not sent because login to remote node not validated */
MPI_IOCLOGINFO_FC_TARGET_FROM_OUTBOUND = 0x2100000e, /* cleared from the outbound queue after a logout */
MPI_IOCLOGINFO_FC_TARGET_WAITING_FOR_DATA_IN = 0x2100000f, /* cleared waiting for data after a logout */
MPI_IOCLOGINFO_FC_LAN_BASE = 0x22000000,
MPI_IOCLOGINFO_FC_LAN_TRANS_SGL_MISSING = 0x22000001, /* Transaction Context Sgl Missing */
MPI_IOCLOGINFO_FC_LAN_TRANS_WRONG_PLACE = 0x22000002, /* Transaction Context found before an EOB */
MPI_IOCLOGINFO_FC_LAN_TRANS_RES_BITS_SET = 0x22000003, /* Transaction Context value has reserved bits set */
MPI_IOCLOGINFO_FC_LAN_WRONG_SGL_FLAG = 0x22000004, /* Invalid SGL Flags */
MPI_IOCLOGINFO_FC_MSG_BASE = 0x23000000,
MPI_IOCLOGINFO_FC_LINK_BASE = 0x24000000,
MPI_IOCLOGINFO_FC_LINK_LOOP_INIT_TIMEOUT = 0x24000001, /* Loop initialization timed out */
MPI_IOCLOGINFO_FC_LINK_ALREADY_INITIALIZED = 0x24000002, /* Another system controller already initialized the loop */
MPI_IOCLOGINFO_FC_LINK_LINK_NOT_ESTABLISHED = 0x24000003, /* Not synchronized to signal or still negotiating (possible cable problem) */
MPI_IOCLOGINFO_FC_LINK_CRC_ERROR = 0x24000004, /* CRC check detected error on received frame */
MPI_IOCLOGINFO_FC_CTX_BASE = 0x25000000,
MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET = 0x26000000, /* The lower 24 bits give the byte offset of the field in the request message that is invalid */
MPI_IOCLOGINFO_FC_INVALID_FIELD_MAX_OFFSET = 0x26ffffff,
MPI_IOCLOGINFO_FC_STATE_CHANGE = 0x27000000 /* The lower 24 bits give additional information concerning state change */
} MpiIocLogInfoFc_t;

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/***************************************************************************
* *
* Copyright (c) 2000-2008 LSI Corporation. All rights reserved. *
* *
* Description *
* ------------ *
* This include file contains SAS firmware interface IOC Log Info codes *
* *
*-------------------------------------------------------------------------*
*/
#ifndef IOPI_IOCLOGINFO_H_INCLUDED
#define IOPI_IOCLOGINFO_H_INCLUDED
#define SAS_LOGINFO_NEXUS_LOSS 0x31170000
#define SAS_LOGINFO_MASK 0xFFFF0000
/****************************************************************************/
/* IOC LOGINFO defines, 0x00000000 - 0x0FFFFFFF */
/* Format: */
/* Bits 31-28: MPI_IOCLOGINFO_TYPE_SAS (3) */
/* Bits 27-24: IOC_LOGINFO_ORIGINATOR: 0=IOP, 1=PL, 2=IR */
/* Bits 23-16: LOGINFO_CODE */
/* Bits 15-0: LOGINFO_CODE Specific */
/****************************************************************************/
/****************************************************************************/
/* IOC_LOGINFO_ORIGINATOR defines */
/****************************************************************************/
#define IOC_LOGINFO_ORIGINATOR_IOP (0x00000000)
#define IOC_LOGINFO_ORIGINATOR_PL (0x01000000)
#define IOC_LOGINFO_ORIGINATOR_IR (0x02000000)
#define IOC_LOGINFO_ORIGINATOR_MASK (0x0F000000)
/****************************************************************************/
/* LOGINFO_CODE defines */
/****************************************************************************/
#define IOC_LOGINFO_CODE_MASK (0x00FF0000)
#define IOC_LOGINFO_CODE_SHIFT (16)
/****************************************************************************/
/* IOP LOGINFO_CODE defines, valid if IOC_LOGINFO_ORIGINATOR = IOP */
/****************************************************************************/
#define IOP_LOGINFO_CODE_INVALID_SAS_ADDRESS (0x00010000)
#define IOP_LOGINFO_CODE_UNUSED2 (0x00020000)
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE (0x00030000)
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_RT (0x00030100) /* Route Table Entry not found */
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_PN (0x00030200) /* Invalid Page Number */
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_FORM (0x00030300) /* Invalid FORM */
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_PT (0x00030400) /* Invalid Page Type */
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_DNM (0x00030500) /* Device Not Mapped */
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_PERSIST (0x00030600) /* Persistent Page not found */
#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_DEFAULT (0x00030700) /* Default Page not found */
#define IOP_LOGINFO_CODE_FWUPLOAD_NO_FLASH_AVAILABLE (0x0003E000) /* Tried to upload from flash, but there is none */
#define IOP_LOGINFO_CODE_FWUPLOAD_UNKNOWN_IMAGE_TYPE (0x0003E001) /* ImageType field contents were invalid */
#define IOP_LOGINFO_CODE_FWUPLOAD_WRONG_IMAGE_SIZE (0x0003E002) /* ImageSize field in TCSGE was bad/offset in MfgPg 4 was wrong */
#define IOP_LOGINFO_CODE_FWUPLOAD_ENTIRE_FLASH_UPLOAD_FAILED (0x0003E003) /* Error occurred while attempting to upload the entire flash */
#define IOP_LOGINFO_CODE_FWUPLOAD_REGION_UPLOAD_FAILED (0x0003E004) /* Error occurred while attempting to upload single flash region */
#define IOP_LOGINFO_CODE_FWUPLOAD_DMA_FAILURE (0x0003E005) /* Problem occurred while DMAing FW to host memory */
#define IOP_LOGINFO_CODE_DIAG_MSG_ERROR (0x00040000) /* Error handling diag msg - or'd with diag status */
#define IOP_LOGINFO_CODE_TASK_TERMINATED (0x00050000)
#define IOP_LOGINFO_CODE_ENCL_MGMT_READ_ACTION_ERR0R (0x00060001) /* Read Action not supported for SEP msg */
#define IOP_LOGINFO_CODE_ENCL_MGMT_INVALID_BUS_ID_ERR0R (0x00060002) /* Invalid Bus/ID in SEP msg */
#define IOP_LOGINFO_CODE_TARGET_ASSIST_TERMINATED (0x00070001)
#define IOP_LOGINFO_CODE_TARGET_STATUS_SEND_TERMINATED (0x00070002)
#define IOP_LOGINFO_CODE_TARGET_MODE_ABORT_ALL_IO (0x00070003)
#define IOP_LOGINFO_CODE_TARGET_MODE_ABORT_EXACT_IO (0x00070004)
#define IOP_LOGINFO_CODE_TARGET_MODE_ABORT_EXACT_IO_REQ (0x00070005)
#define IOP_LOGINFO_CODE_LOG_TIMESTAMP_EVENT (0x00080000)
/****************************************************************************/
/* PL LOGINFO_CODE defines, valid if IOC_LOGINFO_ORIGINATOR = PL */
/****************************************************************************/
#define PL_LOGINFO_CODE_OPEN_FAILURE (0x00010000) /* see SUB_CODE_OPEN_FAIL_ below */
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_NO_DEST_TIME_OUT (0x00000001)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_PATHWAY_BLOCKED (0x00000002)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RES_CONTINUE0 (0x00000003)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RES_CONTINUE1 (0x00000004)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RES_INITIALIZE0 (0x00000005)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RES_INITIALIZE1 (0x00000006)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RES_STOP0 (0x00000007)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RES_STOP1 (0x00000008)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RETRY (0x00000009)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_BREAK (0x0000000A)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_UNUSED_0B (0x0000000B)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_OPEN_TIMEOUT_EXP (0x0000000C)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_UNUSED_0D (0x0000000D)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_DVTBLE_ACCSS_FAIL (0x0000000E)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_BAD_DEST (0x00000011)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RATE_NOT_SUPP (0x00000012)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_PROT_NOT_SUPP (0x00000013)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RESERVED_ABANDON0 (0x00000014)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RESERVED_ABANDON1 (0x00000015)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RESERVED_ABANDON2 (0x00000016)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_RESERVED_ABANDON3 (0x00000017)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_STP_RESOURCES_BSY (0x00000018)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_WRONG_DESTINATION (0x00000019)
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_PATH_BLOCKED (0x0000001B) /* Retry Timeout */
#define PL_LOGINFO_SUB_CODE_OPEN_FAIL_AWT_MAXED (0x0000001C) /* Retry Timeout */
#define PL_LOGINFO_CODE_INVALID_SGL (0x00020000)
#define PL_LOGINFO_CODE_WRONG_REL_OFF_OR_FRAME_LENGTH (0x00030000)
#define PL_LOGINFO_CODE_FRAME_XFER_ERROR (0x00040000)
#define PL_LOGINFO_CODE_TX_FM_CONNECTED_LOW (0x00050000)
#define PL_LOGINFO_CODE_SATA_NON_NCQ_RW_ERR_BIT_SET (0x00060000)
#define PL_LOGINFO_CODE_SATA_READ_LOG_RECEIVE_DATA_ERR (0x00070000)
#define PL_LOGINFO_CODE_SATA_NCQ_FAIL_ALL_CMDS_AFTR_ERR (0x00080000)
#define PL_LOGINFO_CODE_SATA_ERR_IN_RCV_SET_DEV_BIT_FIS (0x00090000)
#define PL_LOGINFO_CODE_RX_FM_INVALID_MESSAGE (0x000A0000)
#define PL_LOGINFO_CODE_RX_CTX_MESSAGE_VALID_ERROR (0x000B0000)
#define PL_LOGINFO_CODE_RX_FM_CURRENT_FRAME_ERROR (0x000C0000)
#define PL_LOGINFO_CODE_SATA_LINK_DOWN (0x000D0000)
#define PL_LOGINFO_CODE_DISCOVERY_SATA_INIT_W_IOS (0x000E0000)
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE (0x000F0000)
#define PL_LOGINFO_CODE_CONFIG_PL_NOT_INITIALIZED (0x000F0001) /* PL not yet initialized, can't do config page req. */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_PT (0x000F0100) /* Invalid Page Type */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NUM_PHYS (0x000F0200) /* Invalid Number of Phys */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NOT_IMP (0x000F0300) /* Case Not Handled */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NO_DEV (0x000F0400) /* No Device Found */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_FORM (0x000F0500) /* Invalid FORM */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_PHY (0x000F0600) /* Invalid Phy */
#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NO_OWNER (0x000F0700) /* No Owner Found */
#define PL_LOGINFO_CODE_DSCVRY_SATA_INIT_TIMEOUT (0x00100000)
#define PL_LOGINFO_CODE_RESET (0x00110000) /* See Sub-Codes below (PL_LOGINFO_SUB_CODE) */
#define PL_LOGINFO_CODE_ABORT (0x00120000) /* See Sub-Codes below (PL_LOGINFO_SUB_CODE)*/
#define PL_LOGINFO_CODE_IO_NOT_YET_EXECUTED (0x00130000)
#define PL_LOGINFO_CODE_IO_EXECUTED (0x00140000)
#define PL_LOGINFO_CODE_PERS_RESV_OUT_NOT_AFFIL_OWNER (0x00150000)
#define PL_LOGINFO_CODE_OPEN_TXDMA_ABORT (0x00160000)
#define PL_LOGINFO_CODE_IO_DEVICE_MISSING_DELAY_RETRY (0x00170000)
#define PL_LOGINFO_CODE_IO_CANCELLED_DUE_TO_R_ERR (0x00180000)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE (0x00000100)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_NO_DEST_TIMEOUT (0x00000101)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_SATA_NEG_RATE_2HI (0x00000102)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_RATE_NOT_SUPPORTED (0x00000103)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_BREAK (0x00000104)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_ZONE_VIOLATION (0x00000114)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_ABANDON0 (0x00000114) /* Open Reject (Zone Violation) - available on SAS-2 devices */
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_ABANDON1 (0x00000115)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_ABANDON2 (0x00000116)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_ABANDON3 (0x00000117)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_ORR_TIMEOUT (0x0000011A) /* Open Reject (Retry) Timeout */
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_PATH_BLOCKED (0x0000011B)
#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE_AWT_MAXED (0x0000011C) /* Arbitration Wait Timer Maxed */
#define PL_LOGINFO_SUB_CODE_TARGET_BUS_RESET (0x00000120)
#define PL_LOGINFO_SUB_CODE_TRANSPORT_LAYER (0x00000130) /* Leave lower nibble (1-f) reserved. */
#define PL_LOGINFO_SUB_CODE_PORT_LAYER (0x00000140) /* Leave lower nibble (1-f) reserved. */
#define PL_LOGINFO_SUB_CODE_INVALID_SGL (0x00000200)
#define PL_LOGINFO_SUB_CODE_WRONG_REL_OFF_OR_FRAME_LENGTH (0x00000300)
#define PL_LOGINFO_SUB_CODE_FRAME_XFER_ERROR (0x00000400)
/* Bits 0-3 encode Transport Status Register (offset 0x08) */
/* Bit 0 is Status Bit 0: FrameXferErr */
/* Bit 1 & 2 are Status Bits 16 and 17: FrameXmitErrStatus */
/* Bit 3 is Status Bit 18 WriteDataLenghtGTDataLengthErr */
#define PL_LOGINFO_SUB_CODE_TX_FM_CONNECTED_LOW (0x00000500)
#define PL_LOGINFO_SUB_CODE_SATA_NON_NCQ_RW_ERR_BIT_SET (0x00000600)
#define PL_LOGINFO_SUB_CODE_SATA_READ_LOG_RECEIVE_DATA_ERR (0x00000700)
#define PL_LOGINFO_SUB_CODE_SATA_NCQ_FAIL_ALL_CMDS_AFTR_ERR (0x00000800)
#define PL_LOGINFO_SUB_CODE_SATA_ERR_IN_RCV_SET_DEV_BIT_FIS (0x00000900)
#define PL_LOGINFO_SUB_CODE_RX_FM_INVALID_MESSAGE (0x00000A00)
#define PL_LOGINFO_SUB_CODE_RX_CTX_MESSAGE_VALID_ERROR (0x00000B00)
#define PL_LOGINFO_SUB_CODE_RX_FM_CURRENT_FRAME_ERROR (0x00000C00)
#define PL_LOGINFO_SUB_CODE_SATA_LINK_DOWN (0x00000D00)
#define PL_LOGINFO_SUB_CODE_DISCOVERY_SATA_INIT_W_IOS (0x00000E00)
#define PL_LOGINFO_SUB_CODE_DISCOVERY_REMOTE_SEP_RESET (0x00000E01)
#define PL_LOGINFO_SUB_CODE_SECOND_OPEN (0x00000F00)
#define PL_LOGINFO_SUB_CODE_DSCVRY_SATA_INIT_TIMEOUT (0x00001000)
#define PL_LOGINFO_SUB_CODE_BREAK_ON_SATA_CONNECTION (0x00002000)
/* not currently used in mainline */
#define PL_LOGINFO_SUB_CODE_BREAK_ON_STUCK_LINK (0x00003000)
#define PL_LOGINFO_SUB_CODE_BREAK_ON_STUCK_LINK_AIP (0x00004000)
#define PL_LOGINFO_SUB_CODE_BREAK_ON_INCOMPLETE_BREAK_RCVD (0x00005000)
#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_FRAME_FAILURE (0x00200000) /* Can't get SMP Frame */
#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_READ_ERROR (0x00200010) /* Error occurred on SMP Read */
#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_WRITE_ERROR (0x00200020) /* Error occurred on SMP Write */
#define PL_LOGINFO_CODE_ENCL_MGMT_NOT_SUPPORTED_ON_ENCL (0x00200040) /* Encl Mgmt services not available for this WWID */
#define PL_LOGINFO_CODE_ENCL_MGMT_ADDR_MODE_NOT_SUPPORTED (0x00200050) /* Address Mode not suppored */
#define PL_LOGINFO_CODE_ENCL_MGMT_BAD_SLOT_NUM (0x00200060) /* Invalid Slot Number in SEP Msg */
#define PL_LOGINFO_CODE_ENCL_MGMT_SGPIO_NOT_PRESENT (0x00200070) /* SGPIO not present/enabled */
#define PL_LOGINFO_CODE_ENCL_MGMT_GPIO_NOT_CONFIGURED (0x00200080) /* GPIO not configured */
#define PL_LOGINFO_CODE_ENCL_MGMT_GPIO_FRAME_ERROR (0x00200090) /* GPIO can't allocate a frame */
#define PL_LOGINFO_CODE_ENCL_MGMT_GPIO_CONFIG_PAGE_ERROR (0x002000A0) /* GPIO failed config page request */
#define PL_LOGINFO_CODE_ENCL_MGMT_SES_FRAME_ALLOC_ERROR (0x002000B0) /* Can't get frame for SES command */
#define PL_LOGINFO_CODE_ENCL_MGMT_SES_IO_ERROR (0x002000C0) /* I/O execution error */
#define PL_LOGINFO_CODE_ENCL_MGMT_SES_RETRIES_EXHAUSTED (0x002000D0) /* SEP I/O retries exhausted */
#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_FRAME_ALLOC_ERROR (0x002000E0) /* Can't get frame for SMP command */
#define PL_LOGINFO_DA_SEP_NOT_PRESENT (0x00200100) /* SEP not present when msg received */
#define PL_LOGINFO_DA_SEP_SINGLE_THREAD_ERROR (0x00200101) /* Can only accept 1 msg at a time */
#define PL_LOGINFO_DA_SEP_ISTWI_INTR_IN_IDLE_STATE (0x00200102) /* ISTWI interrupt recvd. while IDLE */
#define PL_LOGINFO_DA_SEP_RECEIVED_NACK_FROM_SLAVE (0x00200103) /* SEP NACK'd, it is busy */
#define PL_LOGINFO_DA_SEP_DID_NOT_RECEIVE_ACK (0x00200104) /* SEP didn't rcv. ACK (Last Rcvd Bit = 1) */
#define PL_LOGINFO_DA_SEP_BAD_STATUS_HDR_CHKSUM (0x00200105) /* SEP stopped or sent bad chksum in Hdr */
#define PL_LOGINFO_DA_SEP_STOP_ON_DATA (0x00200106) /* SEP stopped while transferring data */
#define PL_LOGINFO_DA_SEP_STOP_ON_SENSE_DATA (0x00200107) /* SEP stopped while transferring sense data */
#define PL_LOGINFO_DA_SEP_UNSUPPORTED_SCSI_STATUS_1 (0x00200108) /* SEP returned unknown scsi status */
#define PL_LOGINFO_DA_SEP_UNSUPPORTED_SCSI_STATUS_2 (0x00200109) /* SEP returned unknown scsi status */
#define PL_LOGINFO_DA_SEP_CHKSUM_ERROR_AFTER_STOP (0x0020010A) /* SEP returned bad chksum after STOP */
#define PL_LOGINFO_DA_SEP_CHKSUM_ERROR_AFTER_STOP_GETDATA (0x0020010B) /* SEP returned bad chksum after STOP while gettin data*/
#define PL_LOGINFO_DA_SEP_UNSUPPORTED_COMMAND (0x0020010C) /* SEP doesn't support CDB opcode f/w location 1 */
#define PL_LOGINFO_DA_SEP_UNSUPPORTED_COMMAND_2 (0x0020010D) /* SEP doesn't support CDB opcode f/w location 2 */
#define PL_LOGINFO_DA_SEP_UNSUPPORTED_COMMAND_3 (0x0020010E) /* SEP doesn't support CDB opcode f/w location 3 */
/****************************************************************************/
/* IR LOGINFO_CODE defines, valid if IOC_LOGINFO_ORIGINATOR = IR */
/****************************************************************************/
#define IR_LOGINFO_RAID_ACTION_ERROR (0x00010000)
#define IR_LOGINFO_CODE_UNUSED2 (0x00020000)
/* Amount of information passed down for Create Volume is too large */
#define IR_LOGINFO_VOLUME_CREATE_INVALID_LENGTH (0x00010001)
/* Creation of duplicate volume attempted (Bus/Target ID checked) */
#define IR_LOGINFO_VOLUME_CREATE_DUPLICATE (0x00010002)
/* Creation failed due to maximum number of supported volumes exceeded */
#define IR_LOGINFO_VOLUME_CREATE_NO_SLOTS (0x00010003)
/* Creation failed due to DMA error in trying to read from host */
#define IR_LOGINFO_VOLUME_CREATE_DMA_ERROR (0x00010004)
/* Creation failed due to invalid volume type passed down */
#define IR_LOGINFO_VOLUME_CREATE_INVALID_VOLUME_TYPE (0x00010005)
/* Creation failed due to error reading MFG Page 4 */
#define IR_LOGINFO_VOLUME_MFG_PAGE4_ERROR (0x00010006)
/* Creation failed when trying to create internal structures */
#define IR_LOGINFO_VOLUME_INTERNAL_CONFIG_STRUCTURE_ERROR (0x00010007)
/* Activation failed due to trying to activate an already active volume */
#define IR_LOGINFO_VOLUME_ACTIVATING_AN_ACTIVE_VOLUME (0x00010010)
/* Activation failed due to trying to active unsupported volume type */
#define IR_LOGINFO_VOLUME_ACTIVATING_INVALID_VOLUME_TYPE (0x00010011)
/* Activation failed due to trying to active too many volumes */
#define IR_LOGINFO_VOLUME_ACTIVATING_TOO_MANY_VOLUMES (0x00010012)
/* Activation failed due to Volume ID in use already */
#define IR_LOGINFO_VOLUME_ACTIVATING_VOLUME_ID_IN_USE (0x00010013)
/* Activation failed call to activateVolume returned failure */
#define IR_LOGINFO_VOLUME_ACTIVATE_VOLUME_FAILED (0x00010014)
/* Activation failed trying to import the volume */
#define IR_LOGINFO_VOLUME_ACTIVATING_IMPORT_VOLUME_FAILED (0x00010015)
/* Activation failed trying to import the volume */
#define IR_LOGINFO_VOLUME_ACTIVATING_TOO_MANY_PHYS_DISKS (0x00010016)
/* Phys Disk failed, too many phys disks */
#define IR_LOGINFO_PHYSDISK_CREATE_TOO_MANY_DISKS (0x00010020)
/* Amount of information passed down for Create Pnysdisk is too large */
#define IR_LOGINFO_PHYSDISK_CREATE_INVALID_LENGTH (0x00010021)
/* Creation failed due to DMA error in trying to read from host */
#define IR_LOGINFO_PHYSDISK_CREATE_DMA_ERROR (0x00010022)
/* Creation failed due to invalid Bus TargetID passed down */
#define IR_LOGINFO_PHYSDISK_CREATE_BUS_TID_INVALID (0x00010023)
/* Creation failed due to error in creating RAID Phys Disk Config Page */
#define IR_LOGINFO_PHYSDISK_CREATE_CONFIG_PAGE_ERROR (0x00010024)
/* Compatibility Error : IR Disabled */
#define IR_LOGINFO_COMPAT_ERROR_RAID_DISABLED (0x00010030)
/* Compatibility Error : Inquiry Command failed */
#define IR_LOGINFO_COMPAT_ERROR_INQUIRY_FAILED (0x00010031)
/* Compatibility Error : Device not direct access device */
#define IR_LOGINFO_COMPAT_ERROR_NOT_DIRECT_ACCESS (0x00010032)
/* Compatibility Error : Removable device found */
#define IR_LOGINFO_COMPAT_ERROR_REMOVABLE_FOUND (0x00010033)
/* Compatibility Error : Device SCSI Version not 2 or higher */
#define IR_LOGINFO_COMPAT_ERROR_NEED_SCSI_2_OR_HIGHER (0x00010034)
/* Compatibility Error : SATA device, 48 BIT LBA not supported */
#define IR_LOGINFO_COMPAT_ERROR_SATA_48BIT_LBA_NOT_SUPPORTED (0x00010035)
/* Compatibility Error : Device does not have 512 byte block sizes */
#define IR_LOGINFO_COMPAT_ERROR_DEVICE_NOT_512_BYTE_BLOCK (0x00010036)
/* Compatibility Error : Volume Type check failed */
#define IR_LOGINFO_COMPAT_ERROR_VOLUME_TYPE_CHECK_FAILED (0x00010037)
/* Compatibility Error : Volume Type is unsupported by FW */
#define IR_LOGINFO_COMPAT_ERROR_UNSUPPORTED_VOLUME_TYPE (0x00010038)
/* Compatibility Error : Disk drive too small for use in volume */
#define IR_LOGINFO_COMPAT_ERROR_DISK_TOO_SMALL (0x00010039)
/* Compatibility Error : Phys disk for Create Volume not found */
#define IR_LOGINFO_COMPAT_ERROR_PHYS_DISK_NOT_FOUND (0x0001003A)
/* Compatibility Error : membership count error, too many or too few disks for volume type */
#define IR_LOGINFO_COMPAT_ERROR_MEMBERSHIP_COUNT (0x0001003B)
/* Compatibility Error : Disk stripe sizes must be 64KB */
#define IR_LOGINFO_COMPAT_ERROR_NON_64K_STRIPE_SIZE (0x0001003C)
/* Compatibility Error : IME size limited to < 2TB */
#define IR_LOGINFO_COMPAT_ERROR_IME_VOL_NOT_CURRENTLY_SUPPORTED (0x0001003D)
/* Device Firmware Update: DFU can only be started once */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_DFU_IN_PROGRESS (0x00010050)
/* Device Firmware Update: Volume must be Optimal/Active/non-Quiesced */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_DEVICE_IN_INVALID_STATE (0x00010051)
/* Device Firmware Update: DFU Timeout cannot be zero */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_INVALID_TIMEOUT (0x00010052)
/* Device Firmware Update: CREATE TIMER FAILED */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_NO_TIMERS (0x00010053)
/* Device Firmware Update: Failed to read SAS_IO_UNIT_PG_1 */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_READING_CFG_PAGE (0x00010054)
/* Device Firmware Update: Invalid SAS_IO_UNIT_PG_1 value(s) */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_PORT_IO_TIMEOUTS_REQUIRED (0x00010055)
/* Device Firmware Update: Unable to allocate memory for page */
#define IR_LOGINFO_DEV_FW_UPDATE_ERR_ALLOC_CFG_PAGE (0x00010056)
/****************************************************************************/
/* Defines for convenience */
/****************************************************************************/
#define IOC_LOGINFO_PREFIX_IOP ((MPI_IOCLOGINFO_TYPE_SAS << MPI_IOCLOGINFO_TYPE_SHIFT) | IOC_LOGINFO_ORIGINATOR_IOP)
#define IOC_LOGINFO_PREFIX_PL ((MPI_IOCLOGINFO_TYPE_SAS << MPI_IOCLOGINFO_TYPE_SHIFT) | IOC_LOGINFO_ORIGINATOR_PL)
#define IOC_LOGINFO_PREFIX_IR ((MPI_IOCLOGINFO_TYPE_SAS << MPI_IOCLOGINFO_TYPE_SHIFT) | IOC_LOGINFO_ORIGINATOR_IR)
#endif /* end of file */

259
drivers/message/fusion/lsi/mpi_raid.h Normal file
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/*
* Copyright (c) 2001-2008 LSI Corporation.
*
*
* Name: mpi_raid.h
* Title: MPI RAID message and structures
* Creation Date: February 27, 2001
*
* mpi_raid.h Version: 01.05.05
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 02-27-01 01.01.01 Original release for this file.
* 03-27-01 01.01.02 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Major rework for MPI v1.2 Integrated RAID changes.
* 10-04-01 01.02.03 Added ActionData defines for
* MPI_RAID_ACTION_DELETE_VOLUME action.
* 11-01-01 01.02.04 Added define for MPI_RAID_ACTION_ADATA_DO_NOT_SYNC.
* 03-14-02 01.02.05 Added define for MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT.
* 05-07-02 01.02.06 Added define for MPI_RAID_ACTION_ACTIVATE_VOLUME,
* MPI_RAID_ACTION_INACTIVATE_VOLUME, and
* MPI_RAID_ACTION_ADATA_INACTIVATE_ALL.
* 07-12-02 01.02.07 Added structures for Mailbox request and reply.
* 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
* 04-01-03 01.02.09 New action data option flag for
* MPI_RAID_ACTION_DELETE_VOLUME.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 01-15-05 01.05.02 Added defines for the two new RAID Actions for
* _SET_RESYNC_RATE and _SET_DATA_SCRUB_RATE.
* 02-28-07 01.05.03 Added new RAID Action, Device FW Update Mode, and
* associated defines.
* 08-07-07 01.05.04 Added Disable Full Rebuild bit to the ActionDataWord
* for the RAID Action MPI_RAID_ACTION_DISABLE_VOLUME.
* 01-15-08 01.05.05 Added define for MPI_RAID_ACTION_SET_VOLUME_NAME.
* --------------------------------------------------------------------------
*/
#ifndef MPI_RAID_H
#define MPI_RAID_H
/******************************************************************************
*
* R A I D M e s s a g e s
*
*******************************************************************************/
/****************************************************************************/
/* RAID Action Request */
/****************************************************************************/
typedef struct _MSG_RAID_ACTION
{
U8 Action; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 VolumeID; /* 04h */
U8 VolumeBus; /* 05h */
U8 PhysDiskNum; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved2; /* 0Ch */
U32 ActionDataWord; /* 10h */
SGE_SIMPLE_UNION ActionDataSGE; /* 14h */
} MSG_RAID_ACTION_REQUEST, MPI_POINTER PTR_MSG_RAID_ACTION_REQUEST,
MpiRaidActionRequest_t , MPI_POINTER pMpiRaidActionRequest_t;
/* RAID Action request Action values */
#define MPI_RAID_ACTION_STATUS (0x00)
#define MPI_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI_RAID_ACTION_DISABLE_VOLUME (0x04)
#define MPI_RAID_ACTION_ENABLE_VOLUME (0x05)
#define MPI_RAID_ACTION_QUIESCE_PHYS_IO (0x06)
#define MPI_RAID_ACTION_ENABLE_PHYS_IO (0x07)
#define MPI_RAID_ACTION_CHANGE_VOLUME_SETTINGS (0x08)
#define MPI_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI_RAID_ACTION_CHANGE_PHYSDISK_SETTINGS (0x0C)
#define MPI_RAID_ACTION_CREATE_PHYSDISK (0x0D)
#define MPI_RAID_ACTION_DELETE_PHYSDISK (0x0E)
#define MPI_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI_RAID_ACTION_REPLACE_PHYSDISK (0x10)
#define MPI_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI_RAID_ACTION_INACTIVATE_VOLUME (0x12)
#define MPI_RAID_ACTION_SET_RESYNC_RATE (0x13)
#define MPI_RAID_ACTION_SET_DATA_SCRUB_RATE (0x14)
#define MPI_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI_RAID_ACTION_SET_VOLUME_NAME (0x16)
/* ActionDataWord defines for use with MPI_RAID_ACTION_CREATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_DO_NOT_SYNC (0x00000001)
#define MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT (0x00000002)
/* ActionDataWord defines for use with MPI_RAID_ACTION_DELETE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_KEEP_PHYS_DISKS (0x00000000)
#define MPI_RAID_ACTION_ADATA_DEL_PHYS_DISKS (0x00000001)
#define MPI_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000002)
/* ActionDataWord defines for use with MPI_RAID_ACTION_DISABLE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_DISABLE_FULL_REBUILD (0x00000001)
/* ActionDataWord defines for use with MPI_RAID_ACTION_ACTIVATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_INACTIVATE_ALL (0x00000001)
/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_RESYNC_RATE action */
#define MPI_RAID_ACTION_ADATA_RESYNC_RATE_MASK (0x000000FF)
/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_DATA_SCRUB_RATE action */
#define MPI_RAID_ACTION_ADATA_DATA_SCRUB_RATE_MASK (0x000000FF)
/* ActionDataWord defines for use with MPI_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x00000001)
#define MPI_RAID_ACTION_ADATA_MASK_FW_UPDATE_TIMEOUT (0x0000FF00)
#define MPI_RAID_ACTION_ADATA_SHIFT_FW_UPDATE_TIMEOUT (8)
/* RAID Action reply message */
typedef struct _MSG_RAID_ACTION_REPLY
{
U8 Action; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 VolumeID; /* 04h */
U8 VolumeBus; /* 05h */
U8 PhysDiskNum; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 ActionStatus; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 VolumeStatus; /* 14h */
U32 ActionData; /* 18h */
} MSG_RAID_ACTION_REPLY, MPI_POINTER PTR_MSG_RAID_ACTION_REPLY,
MpiRaidActionReply_t, MPI_POINTER pMpiRaidActionReply_t;
/* RAID Volume reply ActionStatus values */
#define MPI_RAID_ACTION_ASTATUS_SUCCESS (0x0000)
#define MPI_RAID_ACTION_ASTATUS_INVALID_ACTION (0x0001)
#define MPI_RAID_ACTION_ASTATUS_FAILURE (0x0002)
#define MPI_RAID_ACTION_ASTATUS_IN_PROGRESS (0x0003)
/* RAID Volume reply RAID Volume Indicator structure */
typedef struct _MPI_RAID_VOL_INDICATOR
{
U64 TotalBlocks; /* 00h */
U64 BlocksRemaining; /* 08h */
} MPI_RAID_VOL_INDICATOR, MPI_POINTER PTR_MPI_RAID_VOL_INDICATOR,
MpiRaidVolIndicator_t, MPI_POINTER pMpiRaidVolIndicator_t;
/****************************************************************************/
/* SCSI IO RAID Passthrough Request */
/****************************************************************************/
typedef struct _MSG_SCSI_IO_RAID_PT_REQUEST
{
U8 PhysDiskNum; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 LUN[8]; /* 0Ch */
U32 Control; /* 14h */
U8 CDB[16]; /* 18h */
U32 DataLength; /* 28h */
U32 SenseBufferLowAddr; /* 2Ch */
SGE_IO_UNION SGL; /* 30h */
} MSG_SCSI_IO_RAID_PT_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REQUEST,
SCSIIORaidPassthroughRequest_t, MPI_POINTER pSCSIIORaidPassthroughRequest_t;
/* SCSI IO RAID Passthrough reply structure */
typedef struct _MSG_SCSI_IO_RAID_PT_REPLY
{
U8 PhysDiskNum; /* 00h */
U8 Reserved1; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 CDBLength; /* 04h */
U8 SenseBufferLength; /* 05h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 SCSIStatus; /* 0Ch */
U8 SCSIState; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
} MSG_SCSI_IO_RAID_PT_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_RAID_PT_REPLY,
SCSIIORaidPassthroughReply_t, MPI_POINTER pSCSIIORaidPassthroughReply_t;
/****************************************************************************/
/* Mailbox reqeust structure */
/****************************************************************************/
typedef struct _MSG_MAILBOX_REQUEST
{
U16 Reserved1;
U8 ChainOffset;
U8 Function;
U16 Reserved2;
U8 Reserved3;
U8 MsgFlags;
U32 MsgContext;
U8 Command[10];
U16 Reserved4;
SGE_IO_UNION SGL;
} MSG_MAILBOX_REQUEST, MPI_POINTER PTR_MSG_MAILBOX_REQUEST,
MailboxRequest_t, MPI_POINTER pMailboxRequest_t;
/* Mailbox reply structure */
typedef struct _MSG_MAILBOX_REPLY
{
U16 Reserved1; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 MailboxStatus; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 Reserved4; /* 14h */
} MSG_MAILBOX_REPLY, MPI_POINTER PTR_MSG_MAILBOX_REPLY,
MailboxReply_t, MPI_POINTER pMailboxReply_t;
#endif

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/*
* Copyright (c) 2004-2008 LSI Corporation.
*
*
* Name: mpi_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: August 19, 2004
*
* mpi_sas.h Version: 01.05.05
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 08-19-04 01.05.01 Original release.
* 08-30-05 01.05.02 Added DeviceInfo bit for SEP.
* Added PrimFlags and Primitive field to SAS IO Unit
* Control request, and added a new operation code.
* 03-27-06 01.05.03 Added Force Full Discovery, Transmit Port Select Signal,
* and Remove Device operations to SAS IO Unit Control.
* Added DevHandle field to SAS IO Unit Control request and
* reply.
* 10-11-06 01.05.04 Fixed the name of a define for Operation field of SAS IO
* Unit Control request.
* 01-15-08 01.05.05 Added support for MPI_SAS_OP_SET_IOC_PARAMETER,
* including adding IOCParameter and IOCParameter value
* fields to SAS IO Unit Control Request.
* Added MPI_SAS_DEVICE_INFO_PRODUCT_SPECIFIC define.
* --------------------------------------------------------------------------
*/
#ifndef MPI_SAS_H
#define MPI_SAS_H
/*
* Values for SASStatus.
*/
#define MPI_SASSTATUS_SUCCESS (0x00)
#define MPI_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI_SASSTATUS_INVALID_FRAME (0x02)
#define MPI_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
* Values for the SAS DeviceInfo field used in SAS Device Status Change Event
* data and SAS IO Unit Configuration pages.
*/
#define MPI_SAS_DEVICE_INFO_PRODUCT_SPECIFIC (0xF0000000)
#define MPI_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* S e r i a l A t t a c h e d S C S I M e s s a g e s
*
*****************************************************************************/
/****************************************************************************/
/* Serial Management Protocol Passthrough Request */
/****************************************************************************/
typedef struct _MSG_SMP_PASSTHROUGH_REQUEST
{
U8 PassthroughFlags; /* 00h */
U8 PhysicalPort; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 RequestDataLength; /* 04h */
U8 ConnectionRate; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved1; /* 0Ch */
U64 SASAddress; /* 10h */
U32 Reserved2; /* 18h */
U32 Reserved3; /* 1Ch */
SGE_SIMPLE_UNION SGL; /* 20h */
} MSG_SMP_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REQUEST,
SmpPassthroughRequest_t, MPI_POINTER pSmpPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/* values for ConnectionRate field */
#define MPI_SMP_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
#define MPI_SMP_PT_REQ_CONNECT_RATE_1_5 (0x08)
#define MPI_SMP_PT_REQ_CONNECT_RATE_3_0 (0x09)
/* Serial Management Protocol Passthrough Reply */
typedef struct _MSG_SMP_PASSTHROUGH_REPLY
{
U8 PassthroughFlags; /* 00h */
U8 PhysicalPort; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 ResponseDataLength; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2; /* 0Ch */
U8 SASStatus; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 Reserved3; /* 14h */
U8 ResponseData[4]; /* 18h */
} MSG_SMP_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REPLY,
SmpPassthroughReply_t, MPI_POINTER pSmpPassthroughReply_t;
#define MPI_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/****************************************************************************/
/* SATA Passthrough Request */
/****************************************************************************/
typedef struct _MSG_SATA_PASSTHROUGH_REQUEST
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 PassthroughFlags; /* 04h */
U8 ConnectionRate; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved1; /* 0Ch */
U32 Reserved2; /* 10h */
U32 Reserved3; /* 14h */
U32 DataLength; /* 18h */
U8 CommandFIS[20]; /* 1Ch */
SGE_SIMPLE_UNION SGL; /* 30h */
} MSG_SATA_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REQUEST,
SataPassthroughRequest_t, MPI_POINTER pSataPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI_SATA_PT_REQ_PT_FLAGS_RESET_DEVICE (0x0200)
#define MPI_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI_SATA_PT_REQ_PT_FLAGS_DMA_QUEUED (0x0080)
#define MPI_SATA_PT_REQ_PT_FLAGS_PACKET_COMMAND (0x0040)
#define MPI_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/* values for ConnectionRate field */
#define MPI_SATA_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
#define MPI_SATA_PT_REQ_CONNECT_RATE_1_5 (0x08)
#define MPI_SATA_PT_REQ_CONNECT_RATE_3_0 (0x09)
/* SATA Passthrough Reply */
typedef struct _MSG_SATA_PASSTHROUGH_REPLY
{
U8 TargetID; /* 00h */
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 PassthroughFlags; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2; /* 0Ch */
U8 SASStatus; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U8 StatusFIS[20]; /* 14h */
U32 StatusControlRegisters; /* 28h */
U32 TransferCount; /* 2Ch */
} MSG_SATA_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REPLY,
SataPassthroughReply_t, MPI_POINTER pSataPassthroughReply_t;
/****************************************************************************/
/* SAS IO Unit Control Request */
/****************************************************************************/
typedef struct _MSG_SAS_IOUNIT_CONTROL_REQUEST
{
U8 Operation; /* 00h */
U8 Reserved1; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 DevHandle; /* 04h */
U8 IOCParameter; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 TargetID; /* 0Ch */
U8 Bus; /* 0Dh */
U8 PhyNum; /* 0Eh */
U8 PrimFlags; /* 0Fh */
U32 Primitive; /* 10h */
U64 SASAddress; /* 14h */
U32 IOCParameterValue; /* 1Ch */
} MSG_SAS_IOUNIT_CONTROL_REQUEST, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REQUEST,
SasIoUnitControlRequest_t, MPI_POINTER pSasIoUnitControlRequest_t;
/* values for the Operation field */
#define MPI_SAS_OP_CLEAR_NOT_PRESENT (0x01)
#define MPI_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI_SAS_OP_MAP_CURRENT (0x09)
#define MPI_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
#define MPI_SAS_OP_TRANSMIT_REMOVE_DEVICE (0x0D) /* obsolete name */
#define MPI_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI_SAS_OP_SET_IOC_PARAMETER (0x0E)
#define MPI_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI_SAS_PRIMFLAGS_REDUNDANT (0x01)
/* SAS IO Unit Control Reply */
typedef struct _MSG_SAS_IOUNIT_CONTROL_REPLY
{
U8 Operation; /* 00h */
U8 Reserved1; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 DevHandle; /* 04h */
U8 IOCParameter; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved4; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_SAS_IOUNIT_CONTROL_REPLY, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REPLY,
SasIoUnitControlReply_t, MPI_POINTER pSasIoUnitControlReply_t;
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: June 22, 2000
*
* mpi_targ.h Version: 01.05.06
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure.
* Corrected DECSRIPTOR typo to DESCRIPTOR.
* 11-02-00 01.01.01 Original release for post 1.0 work
* Modified target mode to use IoIndex instead of
* HostIndex and IocIndex. Added Alias.
* 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER
* and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER.
* 02-20-01 01.01.03 Started using MPI_POINTER.
* Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
* MPI_TARGET_FCP_CMD_BUFFER.
* 03-27-01 01.01.04 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
* Added PriorityReason field to some replies and
* defined more PriorityReason codes.
* Added some defines for to support previous version
* of MPI.
* 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
* 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
* 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
* byte ordering.
* 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
* one bit.
* Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
* 09-16-02 01.02.07 Added flags for confirmed completion.
* Added PRIORITY_REASON_TARGET_BUSY.
* 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
* 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Added new request message structures for
* MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
* MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
* MSG_TARGET_ASSIST_EXT_REQUEST.
* Added new structures for SAS SSP Command buffer, SSP
* Task buffer, and SSP Status IU.
* 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
* 02-22-05 01.05.03 Changed a comment.
* 03-11-05 01.05.04 Removed TargetAssistExtended Request.
* 06-24-05 01.05.05 Added TargetAssistExtended structures and defines.
* 03-27-06 01.05.06 Added a comment.
* --------------------------------------------------------------------------
*/
#ifndef MPI_TARG_H
#define MPI_TARG_H
/******************************************************************************
*
* S C S I T a r g e t M e s s a g e s
*
*******************************************************************************/
typedef struct _CMD_BUFFER_DESCRIPTOR
{
U16 IoIndex; /* 00h */
U16 Reserved; /* 02h */
union /* 04h */
{
U32 PhysicalAddress32;
U64 PhysicalAddress64;
} u;
} CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
/****************************************************************************/
/* Target Command Buffer Post Request */
/****************************************************************************/
typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
{
U8 BufferPostFlags; /* 00h */
U8 BufferCount; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 BufferLength; /* 04h */
U8 Reserved; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */
} MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
#define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01)
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80)
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0)
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1)
#define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80)
#define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF)
#define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */
typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
{
U8 BufferPostFlags; /* 00h */
U8 BufferCount; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U8 BufferLength; /* 04h */
U8 Reserved; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved2; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
/* the following structure is obsolete as of MPI v1.2 */
typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 PriorityReason; /* 0Ch */
U8 Reserved3; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ReplyWord; /* 14h */
} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 PriorityReason; /* 0Ch */
U8 Reserved3; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ReplyWord; /* 14h */
} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
#define PRIORITY_REASON_NO_DISCONNECT (0x00)
#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
#define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03)
#define PRIORITY_REASON_LQ_CRC_ERR (0x04)
#define PRIORITY_REASON_CMD_CRC_ERR (0x05)
#define PRIORITY_REASON_PROTOCOL_ERR (0x06)
#define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07)
#define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08)
#define PRIORITY_REASON_TARGET_BUSY (0x09)
#define PRIORITY_REASON_UNKNOWN (0xFF)
/****************************************************************************/
/* Target Command Buffer Post Base Request */
/****************************************************************************/
typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST
{
U8 BufferPostFlags; /* 00h */
U8 PortNumber; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 TotalCmdBuffers; /* 04h */
U8 Reserved; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved1; /* 0Ch */
U16 CmdBufferLength; /* 10h */
U16 NextCmdBufferOffset; /* 12h */
U32 BaseAddressLow; /* 14h */
U32 BaseAddressHigh; /* 18h */
} MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
TargetCmdBufferPostBaseRequest_t,
MPI_POINTER pTargetCmdBufferPostBaseRequest_t;
#define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
TargetCmdBufferPostBaseListReply_t,
MPI_POINTER pTargetCmdBufferPostBaseListReply_t;
/****************************************************************************/
/* Target Command Buffer Post List Request */
/****************************************************************************/
typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST
{
U8 Reserved; /* 00h */
U8 PortNumber; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 CmdBufferCount; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Reserved2; /* 0Ch */
U16 IoIndex[2]; /* 10h */
} MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
TargetCmdBufferPostListRequest_t,
MPI_POINTER pTargetCmdBufferPostListRequest_t;
/****************************************************************************/
/* Command Buffer Formats (with 16 byte CDB) */
/****************************************************************************/
typedef struct _MPI_TARGET_FCP_CMD_BUFFER
{
U8 FcpLun[8]; /* 00h */
U8 FcpCntl[4]; /* 08h */
U8 FcpCdb[16]; /* 0Ch */
U32 FcpDl; /* 1Ch */
U8 AliasIndex; /* 20h */
U8 Reserved1; /* 21h */
U16 OptionalOxid; /* 22h */
} MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
{
/* SPI L_Q information unit */
U8 L_QType; /* 00h */
U8 Reserved; /* 01h */
U16 Tag; /* 02h */
U8 LogicalUnitNumber[8]; /* 04h */
U32 DataLength; /* 0Ch */
/* SPI command information unit */
U8 ReservedFirstByteOfCommandIU; /* 10h */
U8 TaskAttribute; /* 11h */
U8 TaskManagementFlags; /* 12h */
U8 AdditionalCDBLength; /* 13h */
U8 CDB[16]; /* 14h */
/* Alias ID */
U8 AliasID; /* 24h */
U8 Reserved1; /* 25h */
U16 Reserved2; /* 26h */
} MPI_TARGET_SCSI_SPI_CMD_BUFFER,
MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
typedef struct _MPI_TARGET_SSP_CMD_BUFFER
{
U8 FrameType; /* 00h */
U8 Reserved1; /* 01h */
U16 Reserved2; /* 02h */
U16 InitiatorTag; /* 04h */
U16 DevHandle; /* 06h */
/* COMMAND information unit starts here */
U8 LogicalUnitNumber[8]; /* 08h */
U8 Reserved3; /* 10h */
U8 TaskAttribute; /* lower 3 bits */ /* 11h */
U8 Reserved4; /* 12h */
U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */
U8 CDB[16]; /* 14h */
/* Additional CDB bytes extend past the CDB field */
} MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER,
MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer;
typedef struct _MPI_TARGET_SSP_TASK_BUFFER
{
U8 FrameType; /* 00h */
U8 Reserved1; /* 01h */
U16 Reserved2; /* 02h */
U16 InitiatorTag; /* 04h */
U16 DevHandle; /* 06h */
/* TASK information unit starts here */
U8 LogicalUnitNumber[8]; /* 08h */
U8 Reserved3; /* 10h */
U8 Reserved4; /* 11h */
U8 TaskManagementFunction; /* 12h */
U8 Reserved5; /* 13h */
U16 ManagedTaskTag; /* 14h */
U16 Reserved6; /* 16h */
U32 Reserved7; /* 18h */
U32 Reserved8; /* 1Ch */
U32 Reserved9; /* 20h */
} MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER,
MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer;
/****************************************************************************/
/* Target Assist Request */
/****************************************************************************/
typedef struct _MSG_TARGET_ASSIST_REQUEST
{
U8 StatusCode; /* 00h */
U8 TargetAssistFlags; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 QueueTag; /* 04h */
U8 Reserved; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 ReplyWord; /* 0Ch */
U8 LUN[8]; /* 10h */
U32 RelativeOffset; /* 18h */
U32 DataLength; /* 1Ch */
SGE_IO_UNION SGL[1]; /* 20h */
} MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
#define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
#define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
#define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04)
#define TARGET_ASSIST_FLAGS_CONFIRMED (0x08)
#define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
/* Standard Target Mode Reply message */
typedef struct _MSG_TARGET_ERROR_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 PriorityReason; /* 0Ch */
U8 Reserved3; /* 0Dh */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 ReplyWord; /* 14h */
U32 TransferCount; /* 18h */
} MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
/****************************************************************************/
/* Target Assist Extended Request */
/****************************************************************************/
typedef struct _MSG_TARGET_ASSIST_EXT_REQUEST
{
U8 StatusCode; /* 00h */
U8 TargetAssistFlags; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 QueueTag; /* 04h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 ReplyWord; /* 0Ch */
U8 LUN[8]; /* 10h */
U32 RelativeOffset; /* 18h */
U32 Reserved2; /* 1Ch */
U32 Reserved3; /* 20h */
U32 PrimaryReferenceTag; /* 24h */
U16 PrimaryApplicationTag; /* 28h */
U16 PrimaryApplicationTagMask; /* 2Ah */
U32 Reserved4; /* 2Ch */
U32 DataLength; /* 30h */
U32 BidirectionalDataLength; /* 34h */
U32 SecondaryReferenceTag; /* 38h */
U16 SecondaryApplicationTag; /* 3Ch */
U16 Reserved5; /* 3Eh */
U16 EEDPFlags; /* 40h */
U16 ApplicationTagTranslationMask; /* 42h */
U32 EEDPBlockSize; /* 44h */
U8 SGLOffset0; /* 48h */
U8 SGLOffset1; /* 49h */
U8 SGLOffset2; /* 4Ah */
U8 SGLOffset3; /* 4Bh */
U32 Reserved6; /* 4Ch */
SGE_IO_UNION SGL[1]; /* 50h */
} MSG_TARGET_ASSIST_EXT_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_EXT_REQUEST,
TargetAssistExtRequest_t, MPI_POINTER pTargetAssistExtRequest_t;
/* see the defines after MSG_TARGET_ASSIST_REQUEST for TargetAssistFlags */
/* defines for the MsgFlags field */
#define TARGET_ASSIST_EXT_MSGFLAGS_BIDIRECTIONAL (0x20)
#define TARGET_ASSIST_EXT_MSGFLAGS_MULTICAST (0x10)
#define TARGET_ASSIST_EXT_MSGFLAGS_SGL_OFFSET_CHAINS (0x08)
/* defines for the EEDPFlags field */
#define TARGET_ASSIST_EXT_EEDP_MASK_OP (0x0007)
#define TARGET_ASSIST_EXT_EEDP_NOOP_OP (0x0000)
#define TARGET_ASSIST_EXT_EEDP_CHK_OP (0x0001)
#define TARGET_ASSIST_EXT_EEDP_STRIP_OP (0x0002)
#define TARGET_ASSIST_EXT_EEDP_CHKRM_OP (0x0003)
#define TARGET_ASSIST_EXT_EEDP_INSERT_OP (0x0004)
#define TARGET_ASSIST_EXT_EEDP_REPLACE_OP (0x0006)
#define TARGET_ASSIST_EXT_EEDP_CHKREGEN_OP (0x0007)
#define TARGET_ASSIST_EXT_EEDP_PASS_REF_TAG (0x0008)
#define TARGET_ASSIST_EXT_EEDP_T10_CHK_MASK (0x0700)
#define TARGET_ASSIST_EXT_EEDP_T10_CHK_GUARD (0x0100)
#define TARGET_ASSIST_EXT_EEDP_T10_CHK_APPTAG (0x0200)
#define TARGET_ASSIST_EXT_EEDP_T10_CHK_REFTAG (0x0400)
#define TARGET_ASSIST_EXT_EEDP_T10_CHK_SHIFT (8)
#define TARGET_ASSIST_EXT_EEDP_INC_SEC_APPTAG (0x1000)
#define TARGET_ASSIST_EXT_EEDP_INC_PRI_APPTAG (0x2000)
#define TARGET_ASSIST_EXT_EEDP_INC_SEC_REFTAG (0x4000)
#define TARGET_ASSIST_EXT_EEDP_INC_PRI_REFTAG (0x8000)
/****************************************************************************/
/* Target Status Send Request */
/****************************************************************************/
typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
{
U8 StatusCode; /* 00h */
U8 StatusFlags; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 QueueTag; /* 04h */
U8 Reserved; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 ReplyWord; /* 0Ch */
U8 LUN[8]; /* 10h */
SGE_SIMPLE_UNION StatusDataSGE; /* 18h */
} MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
#define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)
#define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)
#define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08)
#define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)
/*
* NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this
* structure properly orders the bytes.
*/
typedef struct _MPI_TARGET_FCP_RSP_BUFFER
{
U8 Reserved0[8]; /* 00h */
U8 Reserved1[2]; /* 08h */
U8 FcpFlags; /* 0Ah */
U8 FcpStatus; /* 0Bh */
U32 FcpResid; /* 0Ch */
U32 FcpSenseLength; /* 10h */
U32 FcpResponseLength; /* 14h */
U8 FcpResponseData[8]; /* 18h */
U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */
} MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
/*
* NOTE: The SPI status IU is big-endian. When used on a little-endian system,
* this structure properly orders the bytes.
*/
typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
{
U8 Reserved0; /* 00h */
U8 Reserved1; /* 01h */
U8 Valid; /* 02h */
U8 Status; /* 03h */
U32 SenseDataListLength; /* 04h */
U32 PktFailuresListLength; /* 08h */
U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */
} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
/*
* NOTE: The SSP status IU is big-endian. When used on a little-endian system,
* this structure properly orders the bytes.
*/
typedef struct _MPI_TARGET_SSP_RSP_IU
{
U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */
/* start of RESPONSE information unit */
U32 Reserved1; /* 18h */
U32 Reserved2; /* 1Ch */
U16 Reserved3; /* 20h */
U8 DataPres; /* lower 2 bits */ /* 22h */
U8 Status; /* 23h */
U32 Reserved4; /* 24h */
U32 SenseDataLength; /* 28h */
U32 ResponseDataLength; /* 2Ch */
U8 ResponseSenseData[4]; /* 30h */
} MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU,
MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t;
/****************************************************************************/
/* Target Mode Abort Request */
/****************************************************************************/
typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
{
U8 AbortType; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 ReplyWord; /* 0Ch */
U32 MsgContextToAbort; /* 10h */
} MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
#define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)
#define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)
#define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)
#define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)
/* Target Mode Abort Reply */
typedef struct _MSG_TARGET_MODE_ABORT_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 AbortCount; /* 14h */
} MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
/****************************************************************************/
/* Target Mode Context Reply */
/****************************************************************************/
#define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)
#define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)
#define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)
#define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
#define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000)
#define TARGET_MODE_REPLY_ALIAS_SHIFT (26)
#define TARGET_MODE_REPLY_PORT_MASK (0x10000000)
#define TARGET_MODE_REPLY_PORT_SHIFT (28)
#define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \
>> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
#define SET_IO_INDEX(t, i) \
((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \
(((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \
TARGET_MODE_REPLY_IO_INDEX_MASK))
#define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
>> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
#define SET_INITIATOR_INDEX(t, ii) \
((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \
(((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \
TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
#define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \
>> TARGET_MODE_REPLY_ALIAS_SHIFT)
#define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \
(((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \
TARGET_MODE_REPLY_ALIAS_MASK))
#define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \
>> TARGET_MODE_REPLY_PORT_SHIFT)
#define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \
(((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \
TARGET_MODE_REPLY_PORT_MASK))
/* the following obsolete values are for MPI v1.0 support */
#define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)
#define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)
#define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)
#define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)
#define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)
#define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)
#define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)
#define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
#define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
>> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
#define SET_HOST_INDEX_0100(t, hi) \
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \
(((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \
TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
#define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
>> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
#define SET_IOC_INDEX_0100(t, ii) \
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \
(((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \
TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
#define GET_INITIATOR_INDEX_0100(x) \
(((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \
>> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
#define SET_INITIATOR_INDEX_0100(t, ii) \
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \
(((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \
TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
#endif

354
drivers/message/fusion/lsi/mpi_tool.h Normal file
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@ -0,0 +1,354 @@
/*
* Copyright (c) 2001-2008 LSI Corporation.
*
*
* Name: mpi_tool.h
* Title: MPI Toolbox structures and definitions
* Creation Date: July 30, 2001
*
* mpi_tool.h Version: 01.05.03
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 08-08-01 01.02.01 Original release.
* 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
* 01-16-04 01.02.03 Added defines and structures for new tools
*. MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL and
* MPI_TOOLBOX_FC_MANAGEMENT_TOOL.
* 04-29-04 01.02.04 Added message structures for Diagnostic Buffer Post and
* Diagnostic Release requests and replies.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* 10-06-04 01.05.02 Added define for MPI_DIAG_BUF_TYPE_COUNT.
* 02-09-05 01.05.03 Added frame size option to FC management tool.
* Added Beacon tool to the Toolbox.
* --------------------------------------------------------------------------
*/
#ifndef MPI_TOOL_H
#define MPI_TOOL_H
#define MPI_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI_TOOLBOX_FC_MANAGEMENT_TOOL (0x04)
#define MPI_TOOLBOX_BEACON_TOOL (0x05)
/****************************************************************************/
/* Toolbox reply */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_REPLY
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_TOOLBOX_REPLY, MPI_POINTER PTR_MSG_TOOLBOX_REPLY,
ToolboxReply_t, MPI_POINTER pToolboxReply_t;
/****************************************************************************/
/* Toolbox Clean Tool request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_CLEAN_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Flags; /* 0Ch */
} MSG_TOOLBOX_CLEAN_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_CLEAN_REQUEST,
ToolboxCleanRequest_t, MPI_POINTER pToolboxCleanRequest_t;
#define MPI_TOOLBOX_CLEAN_NVSRAM (0x00000001)
#define MPI_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI_TOOLBOX_CLEAN_BOOTLOADER (0x04000000)
#define MPI_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
/****************************************************************************/
/* Toolbox Memory Move request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_MEM_MOVE_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
SGE_SIMPLE_UNION SGL; /* 0Ch */
} MSG_TOOLBOX_MEM_MOVE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_MEM_MOVE_REQUEST,
ToolboxMemMoveRequest_t, MPI_POINTER pToolboxMemMoveRequest_t;
/****************************************************************************/
/* Toolbox Diagnostic Data Upload request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 Flags; /* 0Ch */
U32 Reserved3; /* 10h */
SGE_SIMPLE_UNION SGL; /* 14h */
} MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
ToolboxDiagDataUploadRequest_t, MPI_POINTER pToolboxDiagDataUploadRequest_t;
typedef struct _DIAG_DATA_UPLOAD_HEADER
{
U32 DiagDataLength; /* 00h */
U8 FormatCode; /* 04h */
U8 Reserved; /* 05h */
U16 Reserved1; /* 06h */
} DIAG_DATA_UPLOAD_HEADER, MPI_POINTER PTR_DIAG_DATA_UPLOAD_HEADER,
DiagDataUploadHeader_t, MPI_POINTER pDiagDataUploadHeader_t;
#define MPI_TB_DIAG_FORMAT_SCSI_PRINTF_1 (0x01)
#define MPI_TB_DIAG_FORMAT_SCSI_2 (0x02)
#define MPI_TB_DIAG_FORMAT_SCSI_3 (0x03)
#define MPI_TB_DIAG_FORMAT_FC_TRACE_1 (0x04)
/****************************************************************************/
/* Toolbox ISTWI Read Write request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Flags; /* 0Ch */
U8 BusNum; /* 0Dh */
U16 Reserved3; /* 0Eh */
U8 NumAddressBytes; /* 10h */
U8 Reserved4; /* 11h */
U16 DataLength; /* 12h */
U8 DeviceAddr; /* 14h */
U8 Addr1; /* 15h */
U8 Addr2; /* 16h */
U8 Addr3; /* 17h */
U32 Reserved5; /* 18h */
SGE_SIMPLE_UNION SGL; /* 1Ch */
} MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
ToolboxIstwiReadWriteRequest_t, MPI_POINTER pToolboxIstwiReadWriteRequest_t;
#define MPI_TB_ISTWI_FLAGS_WRITE (0x00)
#define MPI_TB_ISTWI_FLAGS_READ (0x01)
/****************************************************************************/
/* Toolbox FC Management request */
/****************************************************************************/
/* ActionInfo for Bus and TargetId */
typedef struct _MPI_TB_FC_MANAGE_BUS_TID_AI
{
U16 Reserved; /* 00h */
U8 Bus; /* 02h */
U8 TargetId; /* 03h */
} MPI_TB_FC_MANAGE_BUS_TID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_BUS_TID_AI,
MpiTbFcManageBusTidAi_t, MPI_POINTER pMpiTbFcManageBusTidAi_t;
/* ActionInfo for port identifier */
typedef struct _MPI_TB_FC_MANAGE_PID_AI
{
U32 PortIdentifier; /* 00h */
} MPI_TB_FC_MANAGE_PID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_PID_AI,
MpiTbFcManagePidAi_t, MPI_POINTER pMpiTbFcManagePidAi_t;
/* ActionInfo for set max frame size */
typedef struct _MPI_TB_FC_MANAGE_FRAME_SIZE_AI
{
U16 FrameSize; /* 00h */
U8 PortNum; /* 02h */
U8 Reserved1; /* 03h */
} MPI_TB_FC_MANAGE_FRAME_SIZE_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_FRAME_SIZE_AI,
MpiTbFcManageFrameSizeAi_t, MPI_POINTER pMpiTbFcManageFrameSizeAi_t;
/* union of ActionInfo */
typedef union _MPI_TB_FC_MANAGE_AI_UNION
{
MPI_TB_FC_MANAGE_BUS_TID_AI BusTid;
MPI_TB_FC_MANAGE_PID_AI Port;
MPI_TB_FC_MANAGE_FRAME_SIZE_AI FrameSize;
} MPI_TB_FC_MANAGE_AI_UNION, MPI_POINTER PTR_MPI_TB_FC_MANAGE_AI_UNION,
MpiTbFcManageAiUnion_t, MPI_POINTER pMpiTbFcManageAiUnion_t;
typedef struct _MSG_TOOLBOX_FC_MANAGE_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Action; /* 0Ch */
U8 Reserved3; /* 0Dh */
U16 Reserved4; /* 0Eh */
MPI_TB_FC_MANAGE_AI_UNION ActionInfo; /* 10h */
} MSG_TOOLBOX_FC_MANAGE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_FC_MANAGE_REQUEST,
ToolboxFcManageRequest_t, MPI_POINTER pToolboxFcManageRequest_t;
/* defines for the Action field */
#define MPI_TB_FC_MANAGE_ACTION_DISC_ALL (0x00)
#define MPI_TB_FC_MANAGE_ACTION_DISC_PID (0x01)
#define MPI_TB_FC_MANAGE_ACTION_DISC_BUS_TID (0x02)
#define MPI_TB_FC_MANAGE_ACTION_SET_MAX_FRAME_SIZE (0x03)
/****************************************************************************/
/* Toolbox Beacon Tool request */
/****************************************************************************/
typedef struct _MSG_TOOLBOX_BEACON_REQUEST
{
U8 Tool; /* 00h */
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 ConnectNum; /* 0Ch */
U8 PortNum; /* 0Dh */
U8 Reserved3; /* 0Eh */
U8 Flags; /* 0Fh */
} MSG_TOOLBOX_BEACON_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_BEACON_REQUEST,
ToolboxBeaconRequest_t, MPI_POINTER pToolboxBeaconRequest_t;
#define MPI_TOOLBOX_FLAGS_BEACON_MODE_OFF (0x00)
#define MPI_TOOLBOX_FLAGS_BEACON_MODE_ON (0x01)
/****************************************************************************/
/* Diagnostic Buffer Post request */
/****************************************************************************/
typedef struct _MSG_DIAG_BUFFER_POST_REQUEST
{
U8 TraceLevel; /* 00h */
U8 BufferType; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved1; /* 04h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 ExtendedType; /* 0Ch */
U32 BufferLength; /* 10h */
U32 ProductSpecific[4]; /* 14h */
U32 Reserved3; /* 24h */
U64 BufferAddress; /* 28h */
} MSG_DIAG_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REQUEST,
DiagBufferPostRequest_t, MPI_POINTER pDiagBufferPostRequest_t;
#define MPI_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI_DIAG_BUF_TYPE_EXTENDED (0x02)
/* count of the number of buffer types */
#define MPI_DIAG_BUF_TYPE_COUNT (0x03)
#define MPI_DIAG_EXTENDED_QTAG (0x00000001)
/* Diagnostic Buffer Post reply */
typedef struct _MSG_DIAG_BUFFER_POST_REPLY
{
U8 Reserved1; /* 00h */
U8 BufferType; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved4; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 TransferLength; /* 14h */
} MSG_DIAG_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REPLY,
DiagBufferPostReply_t, MPI_POINTER pDiagBufferPostReply_t;
/****************************************************************************/
/* Diagnostic Release request */
/****************************************************************************/
typedef struct _MSG_DIAG_RELEASE_REQUEST
{
U8 Reserved1; /* 00h */
U8 BufferType; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
} MSG_DIAG_RELEASE_REQUEST, MPI_POINTER PTR_MSG_DIAG_RELEASE_REQUEST,
DiagReleaseRequest_t, MPI_POINTER pDiagReleaseRequest_t;
/* Diagnostic Release reply */
typedef struct _MSG_DIAG_RELEASE_REPLY
{
U8 Reserved1; /* 00h */
U8 BufferType; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
U16 Reserved2; /* 04h */
U8 Reserved3; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U16 Reserved4; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
} MSG_DIAG_RELEASE_REPLY, MPI_POINTER PTR_MSG_DIAG_RELEASE_REPLY,
DiagReleaseReply_t, MPI_POINTER pDiagReleaseReply_t;
#endif

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/*
* Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_type.h
* Title: MPI Basic type definitions
* Creation Date: June 6, 2000
*
* mpi_type.h Version: 01.05.02
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
* 08-08-01 01.02.01 Original release for v1.2 work.
* 05-11-04 01.03.01 Original release for MPI v1.3.
* 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
#ifndef MPI_TYPE_H
#define MPI_TYPE_H
/*******************************************************************************
* Define MPI_POINTER if it hasn't already been defined. By default MPI_POINTER
* is defined to be a near pointer. MPI_POINTER can be defined as a far pointer
* by defining MPI_POINTER as "far *" before this header file is included.
*/
#ifndef MPI_POINTER
#define MPI_POINTER *
#endif
/*****************************************************************************
*
* B a s i c T y p e s
*
*****************************************************************************/
typedef signed char S8;
typedef unsigned char U8;
typedef signed short S16;
typedef unsigned short U16;
typedef int32_t S32;
typedef u_int32_t U32;
typedef struct _S64
{
U32 Low;
S32 High;
} S64;
typedef struct _U64
{
U32 Low;
U32 High;
} U64;
/****************************************************************************/
/* Pointers */
/****************************************************************************/
typedef S8 *PS8;
typedef U8 *PU8;
typedef S16 *PS16;
typedef U16 *PU16;
typedef S32 *PS32;
typedef U32 *PU32;
typedef S64 *PS64;
typedef U64 *PU64;
#endif

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/*
* linux/drivers/message/fusion/mptioctl.h
* Fusion MPT misc device (ioctl) driver.
* For use with PCI chip/adapter(s):
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
* Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
NO WARRANTY
THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
solely responsible for determining the appropriateness of using and
distributing the Program and assumes all risks associated with its
exercise of rights under this Agreement, including but not limited to
the risks and costs of program errors, damage to or loss of data,
programs or equipment, and unavailability or interruption of operations.
DISCLAIMER OF LIABILITY
NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef MPTCTL_H_INCLUDED
#define MPTCTL_H_INCLUDED
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
*
*/
#define MPT_MISCDEV_BASENAME "mptctl"
#define MPT_MISCDEV_PATHNAME "/dev/" MPT_MISCDEV_BASENAME
#define MPT_PRODUCT_LENGTH 12
/*
* Generic MPT Control IOCTLs and structures
*/
#define MPT_MAGIC_NUMBER 'm'
#define MPTRWPERF _IOWR(MPT_MAGIC_NUMBER,0,struct mpt_raw_r_w)
#define MPTFWDOWNLOAD _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer)
#define MPTCOMMAND _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command)
#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
#define MPTFWDOWNLOAD32 _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer32)
#define MPTCOMMAND32 _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command32)
#endif
#define MPTIOCINFO _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo)
#define MPTIOCINFO1 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev0)
#define MPTIOCINFO2 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev1)
#define MPTTARGETINFO _IOWR(MPT_MAGIC_NUMBER,18,struct mpt_ioctl_targetinfo)
#define MPTTEST _IOWR(MPT_MAGIC_NUMBER,19,struct mpt_ioctl_test)
#define MPTEVENTQUERY _IOWR(MPT_MAGIC_NUMBER,21,struct mpt_ioctl_eventquery)
#define MPTEVENTENABLE _IOWR(MPT_MAGIC_NUMBER,22,struct mpt_ioctl_eventenable)
#define MPTEVENTREPORT _IOWR(MPT_MAGIC_NUMBER,23,struct mpt_ioctl_eventreport)
#define MPTHARDRESET _IOWR(MPT_MAGIC_NUMBER,24,struct mpt_ioctl_diag_reset)
#define MPTFWREPLACE _IOWR(MPT_MAGIC_NUMBER,25,struct mpt_ioctl_replace_fw)
/*
* SPARC PLATFORM REMARKS:
* IOCTL data structures that contain pointers
* will have different sizes in the driver and applications
* (as the app. will not use 8-byte pointers).
* Apps should use MPTFWDOWNLOAD and MPTCOMMAND.
* The driver will convert data from
* mpt_fw_xfer32 (mpt_ioctl_command32) to mpt_fw_xfer (mpt_ioctl_command)
* internally.
*
* If data structures change size, must handle as in IOCGETINFO.
*/
struct mpt_fw_xfer {
unsigned int iocnum; /* IOC unit number */
unsigned int fwlen;
void __user *bufp; /* Pointer to firmware buffer */
};
#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
struct mpt_fw_xfer32 {
unsigned int iocnum;
unsigned int fwlen;
u32 bufp;
};
#endif /*}*/
/*
* IOCTL header structure.
* iocnum - must be defined.
* port - must be defined for all IOCTL commands other than MPTIOCINFO
* maxDataSize - ignored on MPTCOMMAND commands
* - ignored on MPTFWREPLACE commands
* - on query commands, reports the maximum number of bytes to be returned
* to the host driver (count includes the header).
* That is, set to sizeof(struct mpt_ioctl_iocinfo) for fixed sized commands.
* Set to sizeof(struct mpt_ioctl_targetinfo) + datasize for variable
* sized commands. (MPTTARGETINFO, MPTEVENTREPORT)
*/
typedef struct _mpt_ioctl_header {
unsigned int iocnum; /* IOC unit number */
unsigned int port; /* IOC port number */
int maxDataSize; /* Maximum Num. bytes to transfer on read */
} mpt_ioctl_header;
/*
* Issue a diagnostic reset
*/
struct mpt_ioctl_diag_reset {
mpt_ioctl_header hdr;
};
/*
* PCI bus/device/function information structure.
*/
struct mpt_ioctl_pci_info {
union {
struct {
unsigned int deviceNumber : 5;
unsigned int functionNumber : 3;
unsigned int busNumber : 24;
} bits;
unsigned int asUlong;
} u;
};
struct mpt_ioctl_pci_info2 {
union {
struct {
unsigned int deviceNumber : 5;
unsigned int functionNumber : 3;
unsigned int busNumber : 24;
} bits;
unsigned int asUlong;
} u;
int segmentID;
};
/*
* Adapter Information Page
* Read only.
* Data starts at offset 0xC
*/
#define MPT_IOCTL_INTERFACE_SCSI (0x00)
#define MPT_IOCTL_INTERFACE_FC (0x01)
#define MPT_IOCTL_INTERFACE_FC_IP (0x02)
#define MPT_IOCTL_INTERFACE_SAS (0x03)
#define MPT_IOCTL_VERSION_LENGTH (32)
struct mpt_ioctl_iocinfo {
mpt_ioctl_header hdr;
int adapterType; /* SCSI or FCP */
int port; /* port number */
int pciId; /* PCI Id. */
int hwRev; /* hardware revision */
int subSystemDevice; /* PCI subsystem Device ID */
int subSystemVendor; /* PCI subsystem Vendor ID */
int numDevices; /* number of devices */
int FWVersion; /* FW Version (integer) */
int BIOSVersion; /* BIOS Version (integer) */
char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
char busChangeEvent;
char hostId;
char rsvd[2];
struct mpt_ioctl_pci_info2 pciInfo; /* Added Rev 2 */
};
struct mpt_ioctl_iocinfo_rev1 {
mpt_ioctl_header hdr;
int adapterType; /* SCSI or FCP */
int port; /* port number */
int pciId; /* PCI Id. */
int hwRev; /* hardware revision */
int subSystemDevice; /* PCI subsystem Device ID */
int subSystemVendor; /* PCI subsystem Vendor ID */
int numDevices; /* number of devices */
int FWVersion; /* FW Version (integer) */
int BIOSVersion; /* BIOS Version (integer) */
char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
char busChangeEvent;
char hostId;
char rsvd[2];
struct mpt_ioctl_pci_info pciInfo; /* Added Rev 1 */
};
/* Original structure, must always accept these
* IOCTLs. 4 byte pads can occur based on arch with
* above structure. Wish to re-align, but cannot.
*/
struct mpt_ioctl_iocinfo_rev0 {
mpt_ioctl_header hdr;
int adapterType; /* SCSI or FCP */
int port; /* port number */
int pciId; /* PCI Id. */
int hwRev; /* hardware revision */
int subSystemDevice; /* PCI subsystem Device ID */
int subSystemVendor; /* PCI subsystem Vendor ID */
int numDevices; /* number of devices */
int FWVersion; /* FW Version (integer) */
int BIOSVersion; /* BIOS Version (integer) */
char driverVersion[MPT_IOCTL_VERSION_LENGTH]; /* Driver Version (string) */
char busChangeEvent;
char hostId;
char rsvd[2];
};
/*
* Device Information Page
* Report the number of, and ids of, all targets
* on this IOC. The ids array is a packed structure
* of the known targetInfo.
* bits 31-24: reserved
* 23-16: LUN
* 15- 8: Bus Number
* 7- 0: Target ID
*/
struct mpt_ioctl_targetinfo {
mpt_ioctl_header hdr;
int numDevices; /* Num targets on this ioc */
int targetInfo[1];
};
/*
* Event reporting IOCTL's. These IOCTL's will
* use the following defines:
*/
struct mpt_ioctl_eventquery {
mpt_ioctl_header hdr;
unsigned short eventEntries;
unsigned short reserved;
unsigned int eventTypes;
};
struct mpt_ioctl_eventenable {
mpt_ioctl_header hdr;
unsigned int eventTypes;
};
#ifndef __KERNEL__
typedef struct {
uint event;
uint eventContext;
uint data[2];
} MPT_IOCTL_EVENTS;
#endif
struct mpt_ioctl_eventreport {
mpt_ioctl_header hdr;
MPT_IOCTL_EVENTS eventData[1];
};
#define MPT_MAX_NAME 32
struct mpt_ioctl_test {
mpt_ioctl_header hdr;
u8 name[MPT_MAX_NAME];
int chip_type;
u8 product [MPT_PRODUCT_LENGTH];
};
/* Replace the FW image cached in host driver memory
* newImageSize - image size in bytes
* newImage - first byte of the new image
*/
typedef struct mpt_ioctl_replace_fw {
mpt_ioctl_header hdr;
int newImageSize;
u8 newImage[1];
} mpt_ioctl_replace_fw_t;
/* General MPT Pass through data strucutre
*
* iocnum
* timeout - in seconds, command timeout. If 0, set by driver to
* default value.
* replyFrameBufPtr - reply location
* dataInBufPtr - destination for read
* dataOutBufPtr - data source for write
* senseDataPtr - sense data location
* maxReplyBytes - maximum number of reply bytes to be sent to app.
* dataInSize - num bytes for data transfer in (read)
* dataOutSize - num bytes for data transfer out (write)
* dataSgeOffset - offset in words from the start of the request message
* to the first SGL
* MF[1];
*
* Remark: Some config pages have bi-directional transfer,
* both a read and a write. The basic structure allows for
* a bidirectional set up. Normal messages will have one or
* both of these buffers NULL.
*/
struct mpt_ioctl_command {
mpt_ioctl_header hdr;
int timeout; /* optional (seconds) */
char __user *replyFrameBufPtr;
char __user *dataInBufPtr;
char __user *dataOutBufPtr;
char __user *senseDataPtr;
int maxReplyBytes;
int dataInSize;
int dataOutSize;
int maxSenseBytes;
int dataSgeOffset;
char MF[1];
};
/*
* SPARC PLATFORM: See earlier remark.
*/
#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
struct mpt_ioctl_command32 {
mpt_ioctl_header hdr;
int timeout;
u32 replyFrameBufPtr;
u32 dataInBufPtr;
u32 dataOutBufPtr;
u32 senseDataPtr;
int maxReplyBytes;
int dataInSize;
int dataOutSize;
int maxSenseBytes;
int dataSgeOffset;
char MF[1];
};
#endif /*}*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#define CPQFCTS_IOC_MAGIC 'Z'
#define HP_IOC_MAGIC 'Z'
#define HP_GETHOSTINFO _IOR(HP_IOC_MAGIC, 20, hp_host_info_t)
#define HP_GETHOSTINFO1 _IOR(HP_IOC_MAGIC, 20, hp_host_info_rev0_t)
#define HP_GETTARGETINFO _IOR(HP_IOC_MAGIC, 21, hp_target_info_t)
typedef struct _hp_header {
unsigned int iocnum;
unsigned int host;
unsigned int channel;
unsigned int id;
unsigned int lun;
} hp_header_t;
/*
* Header:
* iocnum required (input)
* host ignored
* channe ignored
* id ignored
* lun ignored
*/
typedef struct _hp_host_info {
hp_header_t hdr;
u16 vendor;
u16 device;
u16 subsystem_vendor;
u16 subsystem_id;
u8 devfn;
u8 bus;
ushort host_no; /* SCSI Host number, if scsi driver not loaded*/
u8 fw_version[16]; /* string */
u8 serial_number[24]; /* string */
u32 ioc_status;
u32 bus_phys_width;
u32 base_io_addr;
u32 rsvd;
unsigned int hard_resets; /* driver initiated resets */
unsigned int soft_resets; /* ioc, external resets */
unsigned int timeouts; /* num timeouts */
} hp_host_info_t;
/* replace ulongs with uints, need to preserve backwards
* compatibility.
*/
typedef struct _hp_host_info_rev0 {
hp_header_t hdr;
u16 vendor;
u16 device;
u16 subsystem_vendor;
u16 subsystem_id;
u8 devfn;
u8 bus;
ushort host_no; /* SCSI Host number, if scsi driver not loaded*/
u8 fw_version[16]; /* string */
u8 serial_number[24]; /* string */
u32 ioc_status;
u32 bus_phys_width;
u32 base_io_addr;
u32 rsvd;
unsigned long hard_resets; /* driver initiated resets */
unsigned long soft_resets; /* ioc, external resets */
unsigned long timeouts; /* num timeouts */
} hp_host_info_rev0_t;
/*
* Header:
* iocnum required (input)
* host required
* channel required (bus number)
* id required
* lun ignored
*
* All error values between 0 and 0xFFFF in size.
*/
typedef struct _hp_target_info {
hp_header_t hdr;
u32 parity_errors;
u32 phase_errors;
u32 select_timeouts;
u32 message_rejects;
u32 negotiated_speed;
u8 negotiated_width;
u8 rsvd[7]; /* 8 byte alignment */
} hp_target_info_t;
#define HP_STATUS_OTHER 1
#define HP_STATUS_OK 2
#define HP_STATUS_FAILED 3
#define HP_BUS_WIDTH_UNK 1
#define HP_BUS_WIDTH_8 2
#define HP_BUS_WIDTH_16 3
#define HP_BUS_WIDTH_32 4
#define HP_DEV_SPEED_ASYNC 2
#define HP_DEV_SPEED_FAST 3
#define HP_DEV_SPEED_ULTRA 4
#define HP_DEV_SPEED_ULTRA2 5
#define HP_DEV_SPEED_ULTRA160 6
#define HP_DEV_SPEED_SCSI1 7
#define HP_DEV_SPEED_ULTRA320 8
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#endif

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/*
* linux/drivers/message/fusion/mptdebug.h
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
* Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#ifndef MPTDEBUG_H_INCLUDED
#define MPTDEBUG_H_INCLUDED
/*
* debug level can be programmed on the fly via SysFS (hex values)
*
* Example: (programming for MPT_DEBUG_EVENTS on host 5)
*
* echo 8 > /sys/class/scsi_host/host5/debug_level
*
* --------------------------------------------------------
* mpt_debug_level - command line parameter
* this allow enabling debug at driver load time (for all iocs)
*
* Example (programming for MPT_DEBUG_EVENTS)
*
* insmod mptbase.ko mpt_debug_level=8
*
* --------------------------------------------------------
* CONFIG_FUSION_LOGGING - enables compiling debug into driver
* this can be enabled in the driver Makefile
*
*
* --------------------------------------------------------
* Please note most debug prints are set to logging priority = debug
* This is the lowest level, and most verbose. Please refer to manual
* pages for syslogd or syslogd-ng on how to configure this.
*/
#define MPT_DEBUG 0x00000001
#define MPT_DEBUG_MSG_FRAME 0x00000002
#define MPT_DEBUG_SG 0x00000004
#define MPT_DEBUG_EVENTS 0x00000008
#define MPT_DEBUG_VERBOSE_EVENTS 0x00000010
#define MPT_DEBUG_INIT 0x00000020
#define MPT_DEBUG_EXIT 0x00000040
#define MPT_DEBUG_FAIL 0x00000080
#define MPT_DEBUG_TM 0x00000100
#define MPT_DEBUG_DV 0x00000200
#define MPT_DEBUG_REPLY 0x00000400
#define MPT_DEBUG_HANDSHAKE 0x00000800
#define MPT_DEBUG_CONFIG 0x00001000
#define MPT_DEBUG_DL 0x00002000
#define MPT_DEBUG_RESET 0x00008000
#define MPT_DEBUG_SCSI 0x00010000
#define MPT_DEBUG_IOCTL 0x00020000
#define MPT_DEBUG_FC 0x00080000
#define MPT_DEBUG_SAS 0x00100000
#define MPT_DEBUG_SAS_WIDE 0x00200000
#define MPT_DEBUG_36GB_MEM 0x00400000
/*
* CONFIG_FUSION_LOGGING - enabled in Kconfig
*/
#ifdef CONFIG_FUSION_LOGGING
#define MPT_CHECK_LOGGING(IOC, CMD, BITS) \
{ \
if (IOC->debug_level & BITS) \
CMD; \
}
#else
#define MPT_CHECK_LOGGING(IOC, CMD, BITS)
#endif
/*
* debug macros
*/
#define dprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG)
#define dsgprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SG)
#define devtprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENTS)
#define devtverboseprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_VERBOSE_EVENTS)
#define dinitprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_INIT)
#define dexitprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EXIT)
#define dfailprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_FAIL)
#define dtmprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TM)
#define ddvprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_DV)
#define dreplyprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_REPLY)
#define dhsprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_HANDSHAKE)
#define dcprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_CONFIG)
#define ddlprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_DL)
#define drsprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_RESET)
#define dsprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SCSI)
#define dctlprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_IOCTL)
#define dfcprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_FC)
#define dsasprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS)
#define dsaswideprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS_WIDE)
#define d36memprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_36GB_MEM)
/*
* Verbose logging
*/
#if defined(MPT_DEBUG_VERBOSE) && defined(CONFIG_FUSION_LOGGING)
static inline void
DBG_DUMP_FW_DOWNLOAD(MPT_ADAPTER *ioc, u32 *mfp, int numfrags)
{
int i;
if (!(ioc->debug_level & MPT_DEBUG))
return;
printk(KERN_DEBUG "F/W download request:\n");
for (i=0; i < 7+numfrags*2; i++)
printk(" %08x", le32_to_cpu(mfp[i]));
printk("\n");
}
static inline void
DBG_DUMP_PUT_MSG_FRAME(MPT_ADAPTER *ioc, u32 *mfp)
{
int ii, n;
if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME))
return;
printk(KERN_DEBUG "%s: About to Put msg frame @ %p:\n",
ioc->name, mfp);
n = ioc->req_sz/4 - 1;
while (mfp[n] == 0)
n--;
for (ii=0; ii<=n; ii++) {
if (ii && ((ii%8)==0))
printk("\n");
printk(" %08x", le32_to_cpu(mfp[ii]));
}
printk("\n");
}
static inline void
DBG_DUMP_FW_REQUEST_FRAME(MPT_ADAPTER *ioc, u32 *mfp)
{
int i, n;
if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME))
return;
n = 10;
printk(KERN_INFO " ");
for (i = 0; i < n; i++)
printk(" %08x", le32_to_cpu(mfp[i]));
printk("\n");
}
static inline void
DBG_DUMP_REQUEST_FRAME(MPT_ADAPTER *ioc, u32 *mfp)
{
int i, n;
if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME))
return;
n = 24;
for (i=0; i<n; i++) {
if (i && ((i%8)==0))
printk("\n");
printk("%08x ", le32_to_cpu(mfp[i]));
}
printk("\n");
}
static inline void
DBG_DUMP_REPLY_FRAME(MPT_ADAPTER *ioc, u32 *mfp)
{
int i, n;
if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME))
return;
n = (le32_to_cpu(mfp[0]) & 0x00FF0000) >> 16;
printk(KERN_INFO " ");
for (i=0; i<n; i++)
printk(" %08x", le32_to_cpu(mfp[i]));
printk("\n");
}
static inline void
DBG_DUMP_REQUEST_FRAME_HDR(MPT_ADAPTER *ioc, u32 *mfp)
{
int i, n;
if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME))
return;
n = 3;
printk(KERN_INFO " ");
for (i=0; i<n; i++)
printk(" %08x", le32_to_cpu(mfp[i]));
printk("\n");
}
static inline void
DBG_DUMP_TM_REQUEST_FRAME(MPT_ADAPTER *ioc, u32 *mfp)
{
int i, n;
if (!(ioc->debug_level & MPT_DEBUG_TM))
return;
n = 13;
printk(KERN_DEBUG "TM_REQUEST:\n");
for (i=0; i<n; i++) {
if (i && ((i%8)==0))
printk("\n");
printk("%08x ", le32_to_cpu(mfp[i]));
}
printk("\n");
}
static inline void
DBG_DUMP_TM_REPLY_FRAME(MPT_ADAPTER *ioc, u32 *mfp)
{
int i, n;
if (!(ioc->debug_level & MPT_DEBUG_TM))
return;
n = (le32_to_cpu(mfp[0]) & 0x00FF0000) >> 16;
printk(KERN_DEBUG "TM_REPLY MessageLength=%d:\n", n);
for (i=0; i<n; i++) {
if (i && ((i%8)==0))
printk("\n");
printk(" %08x", le32_to_cpu(mfp[i]));
}
printk("\n");
}
#define dmfprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_MSG_FRAME)
# else /* ifdef MPT_DEBUG_MF */
#define DBG_DUMP_FW_DOWNLOAD(IOC, mfp, numfrags)
#define DBG_DUMP_PUT_MSG_FRAME(IOC, mfp)
#define DBG_DUMP_FW_REQUEST_FRAME(IOC, mfp)
#define DBG_DUMP_REQUEST_FRAME(IOC, mfp)
#define DBG_DUMP_REPLY_FRAME(IOC, mfp)
#define DBG_DUMP_REQUEST_FRAME_HDR(IOC, mfp)
#define DBG_DUMP_TM_REQUEST_FRAME(IOC, mfp)
#define DBG_DUMP_TM_REPLY_FRAME(IOC, mfp)
#define dmfprintk(IOC, CMD) \
MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_MSG_FRAME)
#endif /* defined(MPT_DEBUG_VERBOSE) && defined(CONFIG_FUSION_LOGGING) */
#endif /* ifndef MPTDEBUG_H_INCLUDED */

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/*
* linux/drivers/message/fusion/mptlan.h
* IP Over Fibre Channel device driver.
* For use with LSI Fibre Channel PCI chip/adapters
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
* Copyright (c) 2000-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
NO WARRANTY
THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
solely responsible for determining the appropriateness of using and
distributing the Program and assumes all risks associated with its
exercise of rights under this Agreement, including but not limited to
the risks and costs of program errors, damage to or loss of data,
programs or equipment, and unavailability or interruption of operations.
DISCLAIMER OF LIABILITY
NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/* mptlan.h */
#ifndef LINUX_MPTLAN_H_INCLUDED
#define LINUX_MPTLAN_H_INCLUDED
/*****************************************************************************/
#if !defined(__GENKSYMS__)
#include <linux/module.h>
#endif
#include <linux/netdevice.h>
#include <linux/errno.h>
// #include <linux/etherdevice.h>
#include <linux/fcdevice.h>
// #include <linux/fddidevice.h>
#include <linux/skbuff.h>
#include <linux/if_arp.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/miscdevice.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
#include <asm/io.h>
/* Override mptbase.h by pre-defining these! */
#define MODULEAUTHOR "LSI Corporation"
#include "mptbase.h"
/*****************************************************************************/
#define LANAME "Fusion MPT LAN driver"
#define LANVER MPT_LINUX_VERSION_COMMON
#ifdef MODULE
MODULE_AUTHOR(MODULEAUTHOR);
MODULE_DESCRIPTION(LANAME);
#endif
/*****************************************************************************/
#define MPT_LAN_MAX_BUCKETS_OUT 256
#define MPT_LAN_BUCKET_THRESH 18 /* 9 buckets in one message */
#define MPT_LAN_BUCKETS_REMAIN_MISMATCH_THRESH 10
#define MPT_LAN_RX_COPYBREAK 200
#define MPT_LAN_TX_TIMEOUT (1*HZ)
#define MPT_TX_MAX_OUT_LIM 127
#define MPT_LAN_MIN_MTU 96 /* RFC2625 */
#define MPT_LAN_MAX_MTU 65280 /* RFC2625 */
#define MPT_LAN_MTU 13312 /* Max perf range + lower mem
usage than 16128 */
#define MPT_LAN_NAA_RFC2625 0x1
#define MPT_LAN_NAA_QLOGIC 0x2
/* MPT LAN Reset and Suspend Resource Flags Defines */
#define MPT_LAN_RESOURCE_FLAG_RETURN_POSTED_BUCKETS 0x01
#define MPT_LAN_RESOURCE_FLAG_RETURN_PEND_TRANSMITS 0x02
/*****************************************************************************/
#ifdef MPT_LAN_IO_DEBUG
#define dioprintk(x) printk x
#else
#define dioprintk(x)
#endif
#ifdef MPT_LAN_DEBUG
#define dlprintk(x) printk x
#else
#define dlprintk(x)
#endif
#define NETDEV_TO_LANPRIV_PTR(d) ((struct mpt_lan_priv *)netdev_priv(d))
#define NETDEV_PTR_TO_IOC_NAME_s(d) (NETDEV_TO_LANPRIV_PTR(d)->mpt_dev->name)
#define IOC_AND_NETDEV_NAMES_s_s(d) NETDEV_PTR_TO_IOC_NAME_s(d), (d)->name
/*****************************************************************************/
#endif

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/*
* linux/drivers/message/fusion/mptsas.h
* High performance SCSI + LAN / Fibre Channel device drivers.
* For use with PCI chip/adapter(s):
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI MPT (Message Passing Technology) firmware.
*
* Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
NO WARRANTY
THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
solely responsible for determining the appropriateness of using and
distributing the Program and assumes all risks associated with its
exercise of rights under this Agreement, including but not limited to
the risks and costs of program errors, damage to or loss of data,
programs or equipment, and unavailability or interruption of operations.
DISCLAIMER OF LIABILITY
NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef MPTSAS_H_INCLUDED
#define MPTSAS_H_INCLUDED
/*{-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
struct mptsas_target_reset_event {
struct list_head list;
EVENT_DATA_SAS_DEVICE_STATUS_CHANGE sas_event_data;
u8 target_reset_issued;
unsigned long time_count;
};
enum mptsas_hotplug_action {
MPTSAS_ADD_DEVICE,
MPTSAS_DEL_DEVICE,
MPTSAS_ADD_RAID,
MPTSAS_DEL_RAID,
MPTSAS_ADD_PHYSDISK,
MPTSAS_ADD_PHYSDISK_REPROBE,
MPTSAS_DEL_PHYSDISK,
MPTSAS_DEL_PHYSDISK_REPROBE,
MPTSAS_ADD_INACTIVE_VOLUME,
MPTSAS_IGNORE_EVENT,
};
struct mptsas_mapping{
u8 id;
u8 channel;
};
struct mptsas_device_info {
struct list_head list;
struct mptsas_mapping os; /* operating system mapping*/
struct mptsas_mapping fw; /* firmware mapping */
u64 sas_address;
u32 device_info; /* specific bits for devices */
u16 slot; /* enclosure slot id */
u64 enclosure_logical_id; /*enclosure address */
u8 is_logical_volume; /* is this logical volume */
/* this belongs to volume */
u8 is_hidden_raid_component;
/* this valid when is_hidden_raid_component set */
u8 volume_id;
/* cached data for a removed device */
u8 is_cached;
};
struct mptsas_hotplug_event {
MPT_ADAPTER *ioc;
enum mptsas_hotplug_action event_type;
u64 sas_address;
u8 channel;
u8 id;
u32 device_info;
u16 handle;
u8 phy_id;
u8 phys_disk_num; /* hrc - unique index*/
struct scsi_device *sdev;
};
struct fw_event_work {
struct list_head list;
struct delayed_work work;
MPT_ADAPTER *ioc;
u32 event;
u8 retries;
char event_data[0] __aligned(4);
};
struct mptsas_discovery_event {
struct work_struct work;
MPT_ADAPTER *ioc;
};
/*
* SAS topology structures
*
* The MPT Fusion firmware interface spreads information about the
* SAS topology over many manufacture pages, thus we need some data
* structure to collect it and process it for the SAS transport class.
*/
struct mptsas_devinfo {
u16 handle; /* unique id to address this device */
u16 handle_parent; /* unique id to address parent device */
u16 handle_enclosure; /* enclosure identifier of the enclosure */
u16 slot; /* physical slot in enclosure */
u8 phy_id; /* phy number of parent device */
u8 port_id; /* sas physical port this device
is assoc'd with */
u8 id; /* logical target id of this device */
u32 phys_disk_num; /* phys disk id, for csmi-ioctls */
u8 channel; /* logical bus number of this device */
u64 sas_address; /* WWN of this device,
SATA is assigned by HBA,expander */
u32 device_info; /* bitfield detailed info about this device */
u16 flags; /* sas device pg0 flags */
};
/*
* Specific details on ports, wide/narrow
*/
struct mptsas_portinfo_details{
u16 num_phys; /* number of phys belong to this port */
u64 phy_bitmask; /* TODO, extend support for 255 phys */
struct sas_rphy *rphy; /* transport layer rphy object */
struct sas_port *port; /* transport layer port object */
struct scsi_target *starget;
struct mptsas_portinfo *port_info;
};
struct mptsas_phyinfo {
u16 handle; /* unique id to address this */
u8 phy_id; /* phy index */
u8 port_id; /* firmware port identifier */
u8 negotiated_link_rate; /* nego'd link rate for this phy */
u8 hw_link_rate; /* hardware max/min phys link rate */
u8 programmed_link_rate; /* programmed max/min phy link rate */
u8 sas_port_add_phy; /* flag to request sas_port_add_phy*/
struct mptsas_devinfo identify; /* point to phy device info */
struct mptsas_devinfo attached; /* point to attached device info */
struct sas_phy *phy; /* transport layer phy object */
struct mptsas_portinfo *portinfo;
struct mptsas_portinfo_details * port_details;
};
struct mptsas_portinfo {
struct list_head list;
u16 num_phys; /* number of phys */
struct mptsas_phyinfo *phy_info;
};
struct mptsas_enclosure {
u64 enclosure_logical_id; /* The WWN for the enclosure */
u16 enclosure_handle; /* unique id to address this */
u16 flags; /* details enclosure management */
u16 num_slot; /* num slots */
u16 start_slot; /* first slot */
u8 start_id; /* starting logical target id */
u8 start_channel; /* starting logical channel id */
u8 sep_id; /* SEP device logical target id */
u8 sep_channel; /* SEP channel logical channel id */
};
/*}-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#endif

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/*
* linux/drivers/message/fusion/mptscsih.h
* High performance SCSI / Fibre Channel SCSI Host device driver.
* For use with PCI chip/adapter(s):
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
* Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
NO WARRANTY
THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
solely responsible for determining the appropriateness of using and
distributing the Program and assumes all risks associated with its
exercise of rights under this Agreement, including but not limited to
the risks and costs of program errors, damage to or loss of data,
programs or equipment, and unavailability or interruption of operations.
DISCLAIMER OF LIABILITY
NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef SCSIHOST_H_INCLUDED
#define SCSIHOST_H_INCLUDED
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
/*
* SCSI Public stuff...
*/
#define MPT_SCANDV_GOOD (0x00000000) /* must be 0 */
#define MPT_SCANDV_DID_RESET (0x00000001)
#define MPT_SCANDV_SENSE (0x00000002)
#define MPT_SCANDV_SOME_ERROR (0x00000004)
#define MPT_SCANDV_SELECTION_TIMEOUT (0x00000008)
#define MPT_SCANDV_ISSUE_SENSE (0x00000010)
#define MPT_SCANDV_FALLBACK (0x00000020)
#define MPT_SCANDV_BUSY (0x00000040)
#define MPT_SCANDV_MAX_RETRIES (10)
#define MPT_ICFLAG_BUF_CAP 0x01 /* ReadBuffer Read Capacity format */
#define MPT_ICFLAG_ECHO 0x02 /* ReadBuffer Echo buffer format */
#define MPT_ICFLAG_EBOS 0x04 /* ReadBuffer Echo buffer has EBOS */
#define MPT_ICFLAG_PHYS_DISK 0x08 /* Any SCSI IO but do Phys Disk Format */
#define MPT_ICFLAG_TAGGED_CMD 0x10 /* Do tagged IO */
#define MPT_ICFLAG_DID_RESET 0x20 /* Bus Reset occurred with this command */
#define MPT_ICFLAG_RESERVED 0x40 /* Reserved has been issued */
#define MPT_SCSI_CMD_PER_DEV_HIGH 64
#define MPT_SCSI_CMD_PER_DEV_LOW 32
#define MPT_SCSI_CMD_PER_LUN 7
#define MPT_SCSI_MAX_SECTORS 8192
/* SCSI driver setup structure. Settings can be overridden
* by command line options.
*/
#define MPTSCSIH_DOMAIN_VALIDATION 1
#define MPTSCSIH_MAX_WIDTH 1
#define MPTSCSIH_MIN_SYNC 0x08
#define MPTSCSIH_SAF_TE 0
#define MPTSCSIH_PT_CLEAR 0
#endif
typedef struct _internal_cmd {
char *data; /* data pointer */
dma_addr_t data_dma; /* data dma address */
int size; /* transfer size */
u8 cmd; /* SCSI Op Code */
u8 channel; /* bus number */
u8 id; /* SCSI ID (virtual) */
u64 lun;
u8 flags; /* Bit Field - See above */
u8 physDiskNum; /* Phys disk number, -1 else */
u8 rsvd2;
u8 rsvd;
} INTERNAL_CMD;
extern void mptscsih_remove(struct pci_dev *);
extern void mptscsih_shutdown(struct pci_dev *);
#ifdef CONFIG_PM
extern int mptscsih_suspend(struct pci_dev *pdev, pm_message_t state);
extern int mptscsih_resume(struct pci_dev *pdev);
#endif
extern int mptscsih_show_info(struct seq_file *, struct Scsi_Host *);
extern const char * mptscsih_info(struct Scsi_Host *SChost);
extern int mptscsih_qcmd(struct scsi_cmnd *SCpnt);
extern int mptscsih_IssueTaskMgmt(MPT_SCSI_HOST *hd, u8 type, u8 channel,
u8 id, u64 lun, int ctx2abort, ulong timeout);
extern void mptscsih_slave_destroy(struct scsi_device *device);
extern int mptscsih_slave_configure(struct scsi_device *device);
extern int mptscsih_abort(struct scsi_cmnd * SCpnt);
extern int mptscsih_dev_reset(struct scsi_cmnd * SCpnt);
extern int mptscsih_bus_reset(struct scsi_cmnd * SCpnt);
extern int mptscsih_host_reset(struct scsi_cmnd *SCpnt);
extern int mptscsih_bios_param(struct scsi_device * sdev, struct block_device *bdev, sector_t capacity, int geom[]);
extern int mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r);
extern int mptscsih_taskmgmt_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r);
extern int mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *r);
extern int mptscsih_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply);
extern int mptscsih_ioc_reset(MPT_ADAPTER *ioc, int post_reset);
extern int mptscsih_change_queue_depth(struct scsi_device *sdev, int qdepth,
int reason);
extern u8 mptscsih_raid_id_to_num(MPT_ADAPTER *ioc, u8 channel, u8 id);
extern int mptscsih_is_phys_disk(MPT_ADAPTER *ioc, u8 channel, u8 id);
extern struct device_attribute *mptscsih_host_attrs[];
extern struct scsi_cmnd *mptscsih_get_scsi_lookup(MPT_ADAPTER *ioc, int i);
extern void mptscsih_taskmgmt_response_code(MPT_ADAPTER *ioc, u8 response_code);
extern void mptscsih_flush_running_cmds(MPT_SCSI_HOST *hd);

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menuconfig I2O
tristate "I2O device support"
depends on PCI
---help---
The Intelligent Input/Output (I2O) architecture allows hardware
drivers to be split into two parts: an operating system specific
module called the OSM and an hardware specific module called the
HDM. The OSM can talk to a whole range of HDM's, and ideally the
HDM's are not OS dependent. This allows for the same HDM driver to
be used under different operating systems if the relevant OSM is in
place. In order for this to work, you need to have an I2O interface
adapter card in your computer. This card contains a special I/O
processor (IOP), thus allowing high speeds since the CPU does not
have to deal with I/O.
If you say Y here, you will get a choice of interface adapter
drivers and OSM's with the following questions.
To compile this support as a module, choose M here: the
modules will be called i2o_core.
If unsure, say N.
if I2O
config I2O_LCT_NOTIFY_ON_CHANGES
bool "Enable LCT notification"
default y
---help---
Only say N here if you have a I2O controller from SUN. The SUN
firmware doesn't support LCT notification on changes. If this option
is enabled on such a controller the driver will hang up in a endless
loop. On all other controllers say Y.
If unsure, say Y.
config I2O_EXT_ADAPTEC
bool "Enable Adaptec extensions"
default y
---help---
Say Y for support of raidutils for Adaptec I2O controllers. You also
have to say Y to "I2O Configuration support", "I2O SCSI OSM" below
and to "SCSI generic support" under "SCSI device configuration".
config I2O_EXT_ADAPTEC_DMA64
bool "Enable 64-bit DMA"
depends on I2O_EXT_ADAPTEC && ( 64BIT || HIGHMEM64G )
default y
---help---
Say Y for support of 64-bit DMA transfer mode on Adaptec I2O
controllers.
Note: You need at least firmware version 3709.
config I2O_CONFIG
tristate "I2O Configuration support"
depends on VIRT_TO_BUS
---help---
Say Y for support of the configuration interface for the I2O adapters.
If you have a RAID controller from Adaptec and you want to use the
raidutils to manage your RAID array, you have to say Y here.
To compile this support as a module, choose M here: the
module will be called i2o_config.
Note: If you want to use the new API you have to download the
i2o_config patch from http://i2o.shadowconnect.com/
config I2O_CONFIG_OLD_IOCTL
bool "Enable ioctls (OBSOLETE)"
depends on I2O_CONFIG
default y
---help---
Enables old ioctls.
config I2O_BUS
tristate "I2O Bus Adapter OSM"
---help---
Include support for the I2O Bus Adapter OSM. The Bus Adapter OSM
provides access to the busses on the I2O controller. The main purpose
is to rescan the bus to find new devices.
To compile this support as a module, choose M here: the
module will be called i2o_bus.
config I2O_BLOCK
tristate "I2O Block OSM"
depends on BLOCK
---help---
Include support for the I2O Block OSM. The Block OSM presents disk
and other structured block devices to the operating system. If you
are using an RAID controller, you could access the array only by
the Block OSM driver. But it is possible to access the single disks
by the SCSI OSM driver, for example to monitor the disks.
To compile this support as a module, choose M here: the
module will be called i2o_block.
config I2O_SCSI
tristate "I2O SCSI OSM"
depends on SCSI
---help---
Allows direct SCSI access to SCSI devices on a SCSI or FibreChannel
I2O controller. You can use both the SCSI and Block OSM together if
you wish. To access a RAID array, you must use the Block OSM driver.
But you could use the SCSI OSM driver to monitor the single disks.
To compile this support as a module, choose M here: the
module will be called i2o_scsi.
config I2O_PROC
tristate "I2O /proc support"
---help---
If you say Y here and to "/proc file system support", you will be
able to read I2O related information from the virtual directory
/proc/i2o.
To compile this support as a module, choose M here: the
module will be called i2o_proc.
endif # I2O

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#
# Makefile for the kernel I2O OSM.
#
# Note : at this point, these files are compiled on all systems.
# In the future, some of these should be built conditionally.
#
i2o_core-y += iop.o driver.o device.o debug.o pci.o exec-osm.o memory.o
i2o_bus-y += bus-osm.o
i2o_config-y += config-osm.o
obj-$(CONFIG_I2O) += i2o_core.o
obj-$(CONFIG_I2O_CONFIG)+= i2o_config.o
obj-$(CONFIG_I2O_BUS) += i2o_bus.o
obj-$(CONFIG_I2O_BLOCK) += i2o_block.o
obj-$(CONFIG_I2O_SCSI) += i2o_scsi.o
obj-$(CONFIG_I2O_PROC) += i2o_proc.o

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Linux I2O Support (c) Copyright 1999 Red Hat Software
and others.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
as published by the Free Software Foundation; either version
2 of the License, or (at your option) any later version.
AUTHORS (so far)
Alan Cox, Building Number Three Ltd.
Core code, SCSI and Block OSMs
Steve Ralston, LSI Logic Corp.
Debugging SCSI and Block OSM
Deepak Saxena, Intel Corp.
Various core/block extensions
/proc interface, bug fixes
Ioctl interfaces for control
Debugging LAN OSM
Philip Rumpf
Fixed assorted dumb SMP locking bugs
Juha Sievanen, University of Helsinki Finland
LAN OSM code
/proc interface to LAN class
Bug fixes
Core code extensions
Auvo Häkkinen, University of Helsinki Finland
LAN OSM code
/Proc interface to LAN class
Bug fixes
Core code extensions
Taneli Vähäkangas, University of Helsinki Finland
Fixes to i2o_config
CREDITS
This work was made possible by
Red Hat Software
Funding for the Building #3 part of the project
Symbios Logic (Now LSI)
Host adapters, hints, known to work platforms when I hit
compatibility problems
BoxHill Corporation
Loan of initial FibreChannel disk array used for development work.
European Commission
Funding the work done by the University of Helsinki
SysKonnect
Loan of FDDI and Gigabit Ethernet cards
ASUSTeK
Loan of I2O motherboard
STATUS:
o The core setup works within limits.
o The scsi layer seems to almost work.
I'm still chasing down the hang bug.
o The block OSM is mostly functional
o LAN OSM works with FDDI and Ethernet cards.
TO DO:
General:
o Provide hidden address space if asked
o Long term message flow control
o PCI IOP's without interrupts are not supported yet
o Push FAIL handling into the core
o DDM control interfaces for module load etc
o Add I2O 2.0 support (Deffered to 2.5 kernel)
Block:
o Multiple major numbers
o Read ahead and cache handling stuff. Talk to Ingo and people
o Power management
o Finish Media changers
SCSI:
o Find the right way to associate drives/luns/busses
Lan:
o Performance tuning
o Test Fibre Channel code
Tape:
o Anyone seen anything implementing this ?
(D.S: Will attempt to do so if spare cycles permit)

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Linux I2O User Space Interface
rev 0.3 - 04/20/99
=============================================================================
Originally written by Deepak Saxena(deepak@plexity.net)
Currently maintained by Deepak Saxena(deepak@plexity.net)
=============================================================================
I. Introduction
The Linux I2O subsystem provides a set of ioctl() commands that can be
utilized by user space applications to communicate with IOPs and devices
on individual IOPs. This document defines the specific ioctl() commands
that are available to the user and provides examples of their uses.
This document assumes the reader is familiar with or has access to the
I2O specification as no I2O message parameters are outlined. For information
on the specification, see http://www.i2osig.org
This document and the I2O user space interface are currently maintained
by Deepak Saxena. Please send all comments, errata, and bug fixes to
deepak@csociety.purdue.edu
II. IOP Access
Access to the I2O subsystem is provided through the device file named
/dev/i2o/ctl. This file is a character file with major number 10 and minor
number 166. It can be created through the following command:
mknod /dev/i2o/ctl c 10 166
III. Determining the IOP Count
SYNOPSIS
ioctl(fd, I2OGETIOPS, int *count);
u8 count[MAX_I2O_CONTROLLERS];
DESCRIPTION
This function returns the system's active IOP table. count should
point to a buffer containing MAX_I2O_CONTROLLERS entries. Upon
returning, each entry will contain a non-zero value if the given
IOP unit is active, and NULL if it is inactive or non-existent.
RETURN VALUE.
Returns 0 if no errors occur, and -1 otherwise. If an error occurs,
errno is set appropriately:
EFAULT Invalid user space pointer was passed
IV. Getting Hardware Resource Table
SYNOPSIS
ioctl(fd, I2OHRTGET, struct i2o_cmd_hrt *hrt);
struct i2o_cmd_hrtlct
{
u32 iop; /* IOP unit number */
void *resbuf; /* Buffer for result */
u32 *reslen; /* Buffer length in bytes */
};
DESCRIPTION
This function returns the Hardware Resource Table of the IOP specified
by hrt->iop in the buffer pointed to by hrt->resbuf. The actual size of
the data is written into *(hrt->reslen).
RETURNS
This function returns 0 if no errors occur. If an error occurs, -1
is returned and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ENOBUFS Buffer not large enough. If this occurs, the required
buffer length is written into *(hrt->reslen)
V. Getting Logical Configuration Table
SYNOPSIS
ioctl(fd, I2OLCTGET, struct i2o_cmd_lct *lct);
struct i2o_cmd_hrtlct
{
u32 iop; /* IOP unit number */
void *resbuf; /* Buffer for result */
u32 *reslen; /* Buffer length in bytes */
};
DESCRIPTION
This function returns the Logical Configuration Table of the IOP specified
by lct->iop in the buffer pointed to by lct->resbuf. The actual size of
the data is written into *(lct->reslen).
RETURNS
This function returns 0 if no errors occur. If an error occurs, -1
is returned and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ENOBUFS Buffer not large enough. If this occurs, the required
buffer length is written into *(lct->reslen)
VI. Setting Parameters
SYNOPSIS
ioctl(fd, I2OPARMSET, struct i2o_parm_setget *ops);
struct i2o_cmd_psetget
{
u32 iop; /* IOP unit number */
u32 tid; /* Target device TID */
void *opbuf; /* Operation List buffer */
u32 oplen; /* Operation List buffer length in bytes */
void *resbuf; /* Result List buffer */
u32 *reslen; /* Result List buffer length in bytes */
};
DESCRIPTION
This function posts a UtilParamsSet message to the device identified
by ops->iop and ops->tid. The operation list for the message is
sent through the ops->opbuf buffer, and the result list is written
into the buffer pointed to by ops->resbuf. The number of bytes
written is placed into *(ops->reslen).
RETURNS
The return value is the size in bytes of the data written into
ops->resbuf if no errors occur. If an error occurs, -1 is returned
and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ENOBUFS Buffer not large enough. If this occurs, the required
buffer length is written into *(ops->reslen)
ETIMEDOUT Timeout waiting for reply message
ENOMEM Kernel memory allocation error
A return value of 0 does not mean that the value was actually
changed properly on the IOP. The user should check the result
list to determine the specific status of the transaction.
VII. Getting Parameters
SYNOPSIS
ioctl(fd, I2OPARMGET, struct i2o_parm_setget *ops);
struct i2o_parm_setget
{
u32 iop; /* IOP unit number */
u32 tid; /* Target device TID */
void *opbuf; /* Operation List buffer */
u32 oplen; /* Operation List buffer length in bytes */
void *resbuf; /* Result List buffer */
u32 *reslen; /* Result List buffer length in bytes */
};
DESCRIPTION
This function posts a UtilParamsGet message to the device identified
by ops->iop and ops->tid. The operation list for the message is
sent through the ops->opbuf buffer, and the result list is written
into the buffer pointed to by ops->resbuf. The actual size of data
written is placed into *(ops->reslen).
RETURNS
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ENOBUFS Buffer not large enough. If this occurs, the required
buffer length is written into *(ops->reslen)
ETIMEDOUT Timeout waiting for reply message
ENOMEM Kernel memory allocation error
A return value of 0 does not mean that the value was actually
properly retrieved. The user should check the result list
to determine the specific status of the transaction.
VIII. Downloading Software
SYNOPSIS
ioctl(fd, I2OSWDL, struct i2o_sw_xfer *sw);
struct i2o_sw_xfer
{
u32 iop; /* IOP unit number */
u8 flags; /* DownloadFlags field */
u8 sw_type; /* Software type */
u32 sw_id; /* Software ID */
void *buf; /* Pointer to software buffer */
u32 *swlen; /* Length of software buffer */
u32 *maxfrag; /* Number of fragments */
u32 *curfrag; /* Current fragment number */
};
DESCRIPTION
This function downloads a software fragment pointed by sw->buf
to the iop identified by sw->iop. The DownloadFlags, SwID, SwType
and SwSize fields of the ExecSwDownload message are filled in with
the values of sw->flags, sw->sw_id, sw->sw_type and *(sw->swlen).
The fragments _must_ be sent in order and be 8K in size. The last
fragment _may_ be shorter, however. The kernel will compute its
size based on information in the sw->swlen field.
Please note that SW transfers can take a long time.
RETURNS
This function returns 0 no errors occur. If an error occurs, -1
is returned and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ETIMEDOUT Timeout waiting for reply message
ENOMEM Kernel memory allocation error
IX. Uploading Software
SYNOPSIS
ioctl(fd, I2OSWUL, struct i2o_sw_xfer *sw);
struct i2o_sw_xfer
{
u32 iop; /* IOP unit number */
u8 flags; /* UploadFlags */
u8 sw_type; /* Software type */
u32 sw_id; /* Software ID */
void *buf; /* Pointer to software buffer */
u32 *swlen; /* Length of software buffer */
u32 *maxfrag; /* Number of fragments */
u32 *curfrag; /* Current fragment number */
};
DESCRIPTION
This function uploads a software fragment from the IOP identified
by sw->iop, sw->sw_type, sw->sw_id and optionally sw->swlen fields.
The UploadFlags, SwID, SwType and SwSize fields of the ExecSwUpload
message are filled in with the values of sw->flags, sw->sw_id,
sw->sw_type and *(sw->swlen).
The fragments _must_ be requested in order and be 8K in size. The
user is responsible for allocating memory pointed by sw->buf. The
last fragment _may_ be shorter.
Please note that SW transfers can take a long time.
RETURNS
This function returns 0 if no errors occur. If an error occurs, -1
is returned and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ETIMEDOUT Timeout waiting for reply message
ENOMEM Kernel memory allocation error
X. Removing Software
SYNOPSIS
ioctl(fd, I2OSWDEL, struct i2o_sw_xfer *sw);
struct i2o_sw_xfer
{
u32 iop; /* IOP unit number */
u8 flags; /* RemoveFlags */
u8 sw_type; /* Software type */
u32 sw_id; /* Software ID */
void *buf; /* Unused */
u32 *swlen; /* Length of the software data */
u32 *maxfrag; /* Unused */
u32 *curfrag; /* Unused */
};
DESCRIPTION
This function removes software from the IOP identified by sw->iop.
The RemoveFlags, SwID, SwType and SwSize fields of the ExecSwRemove message
are filled in with the values of sw->flags, sw->sw_id, sw->sw_type and
*(sw->swlen). Give zero in *(sw->len) if the value is unknown. IOP uses
*(sw->swlen) value to verify correct identication of the module to remove.
The actual size of the module is written into *(sw->swlen).
RETURNS
This function returns 0 if no errors occur. If an error occurs, -1
is returned and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ETIMEDOUT Timeout waiting for reply message
ENOMEM Kernel memory allocation error
X. Validating Configuration
SYNOPSIS
ioctl(fd, I2OVALIDATE, int *iop);
u32 iop;
DESCRIPTION
This function posts an ExecConfigValidate message to the controller
identified by iop. This message indicates that the current
configuration is accepted. The iop changes the status of suspect drivers
to valid and may delete old drivers from its store.
RETURNS
This function returns 0 if no erro occur. If an error occurs, -1 is
returned and errno is set appropriately:
ETIMEDOUT Timeout waiting for reply message
ENXIO Invalid IOP number
XI. Configuration Dialog
SYNOPSIS
ioctl(fd, I2OHTML, struct i2o_html *htquery);
struct i2o_html
{
u32 iop; /* IOP unit number */
u32 tid; /* Target device ID */
u32 page; /* HTML page */
void *resbuf; /* Buffer for reply HTML page */
u32 *reslen; /* Length in bytes of reply buffer */
void *qbuf; /* Pointer to HTTP query string */
u32 qlen; /* Length in bytes of query string buffer */
};
DESCRIPTION
This function posts an UtilConfigDialog message to the device identified
by htquery->iop and htquery->tid. The requested HTML page number is
provided by the htquery->page field, and the resultant data is stored
in the buffer pointed to by htquery->resbuf. If there is an HTTP query
string that is to be sent to the device, it should be sent in the buffer
pointed to by htquery->qbuf. If there is no query string, this field
should be set to NULL. The actual size of the reply received is written
into *(htquery->reslen).
RETURNS
This function returns 0 if no error occur. If an error occurs, -1
is returned and errno is set appropriately:
EFAULT Invalid user space pointer was passed
ENXIO Invalid IOP number
ENOBUFS Buffer not large enough. If this occurs, the required
buffer length is written into *(ops->reslen)
ETIMEDOUT Timeout waiting for reply message
ENOMEM Kernel memory allocation error
XII. Events
In the process of determining this. Current idea is to have use
the select() interface to allow user apps to periodically poll
the /dev/i2o/ctl device for events. When select() notifies the user
that an event is available, the user would call read() to retrieve
a list of all the events that are pending for the specific device.
=============================================================================
Revision History
=============================================================================
Rev 0.1 - 04/01/99
- Initial revision
Rev 0.2 - 04/06/99
- Changed return values to match UNIX ioctl() standard. Only return values
are 0 and -1. All errors are reported through errno.
- Added summary of proposed possible event interfaces
Rev 0.3 - 04/20/99
- Changed all ioctls() to use pointers to user data instead of actual data
- Updated error values to match the code

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/*
* Bus Adapter OSM
*
* Copyright (C) 2005 Markus Lidel <Markus.Lidel@shadowconnect.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Fixes/additions:
* Markus Lidel <Markus.Lidel@shadowconnect.com>
* initial version.
*/
#include <linux/module.h>
#include <linux/i2o.h>
#define OSM_NAME "bus-osm"
#define OSM_VERSION "1.317"
#define OSM_DESCRIPTION "I2O Bus Adapter OSM"
static struct i2o_driver i2o_bus_driver;
/* Bus OSM class handling definition */
static struct i2o_class_id i2o_bus_class_id[] = {
{I2O_CLASS_BUS_ADAPTER},
{I2O_CLASS_END}
};
/**
* i2o_bus_scan - Scan the bus for new devices
* @dev: I2O device of the bus, which should be scanned
*
* Scans the bus dev for new / removed devices. After the scan a new LCT
* will be fetched automatically.
*
* Returns 0 on success or negative error code on failure.
*/
static int i2o_bus_scan(struct i2o_device *dev)
{
struct i2o_message *msg;
msg = i2o_msg_get_wait(dev->iop, I2O_TIMEOUT_MESSAGE_GET);
if (IS_ERR(msg))
return -ETIMEDOUT;
msg->u.head[0] = cpu_to_le32(FIVE_WORD_MSG_SIZE | SGL_OFFSET_0);
msg->u.head[1] =
cpu_to_le32(I2O_CMD_BUS_SCAN << 24 | HOST_TID << 12 | dev->lct_data.
tid);
return i2o_msg_post_wait(dev->iop, msg, 60);
};
/**
* i2o_bus_store_scan - Scan the I2O Bus Adapter
* @d: device which should be scanned
* @attr: device_attribute
* @buf: output buffer
* @count: buffer size
*
* Returns count.
*/
static ssize_t i2o_bus_store_scan(struct device *d,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct i2o_device *i2o_dev = to_i2o_device(d);
int rc;
if ((rc = i2o_bus_scan(i2o_dev)))
osm_warn("bus scan failed %d\n", rc);
return count;
}
/* Bus Adapter OSM device attributes */
static DEVICE_ATTR(scan, S_IWUSR, NULL, i2o_bus_store_scan);
/**
* i2o_bus_probe - verify if dev is a I2O Bus Adapter device and install it
* @dev: device to verify if it is a I2O Bus Adapter device
*
* Because we want all Bus Adapters always return 0.
* Except when we fail. Then we are sad.
*
* Returns 0, except when we fail to excel.
*/
static int i2o_bus_probe(struct device *dev)
{
struct i2o_device *i2o_dev = to_i2o_device(get_device(dev));
int rc;
rc = device_create_file(dev, &dev_attr_scan);
if (rc)
goto err_out;
osm_info("device added (TID: %03x)\n", i2o_dev->lct_data.tid);
return 0;
err_out:
put_device(dev);
return rc;
};
/**
* i2o_bus_remove - remove the I2O Bus Adapter device from the system again
* @dev: I2O Bus Adapter device which should be removed
*
* Always returns 0.
*/
static int i2o_bus_remove(struct device *dev)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
device_remove_file(dev, &dev_attr_scan);
put_device(dev);
osm_info("device removed (TID: %03x)\n", i2o_dev->lct_data.tid);
return 0;
};
/* Bus Adapter OSM driver struct */
static struct i2o_driver i2o_bus_driver = {
.name = OSM_NAME,
.classes = i2o_bus_class_id,
.driver = {
.probe = i2o_bus_probe,
.remove = i2o_bus_remove,
},
};
/**
* i2o_bus_init - Bus Adapter OSM initialization function
*
* Only register the Bus Adapter OSM in the I2O core.
*
* Returns 0 on success or negative error code on failure.
*/
static int __init i2o_bus_init(void)
{
int rc;
printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n");
/* Register Bus Adapter OSM into I2O core */
rc = i2o_driver_register(&i2o_bus_driver);
if (rc) {
osm_err("Could not register Bus Adapter OSM\n");
return rc;
}
return 0;
};
/**
* i2o_bus_exit - Bus Adapter OSM exit function
*
* Unregisters Bus Adapter OSM from I2O core.
*/
static void __exit i2o_bus_exit(void)
{
i2o_driver_unregister(&i2o_bus_driver);
};
MODULE_AUTHOR("Markus Lidel <Markus.Lidel@shadowconnect.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION(OSM_DESCRIPTION);
MODULE_VERSION(OSM_VERSION);
module_init(i2o_bus_init);
module_exit(i2o_bus_exit);

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/*
* Configuration OSM
*
* Copyright (C) 2005 Markus Lidel <Markus.Lidel@shadowconnect.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Fixes/additions:
* Markus Lidel <Markus.Lidel@shadowconnect.com>
* initial version.
*/
#include <linux/module.h>
#include <linux/i2o.h>
#include <linux/dcache.h>
#include <linux/namei.h>
#include <linux/fs.h>
#include <asm/uaccess.h>
#define OSM_NAME "config-osm"
#define OSM_VERSION "1.323"
#define OSM_DESCRIPTION "I2O Configuration OSM"
/* access mode user rw */
#define S_IWRSR (S_IRUSR | S_IWUSR)
static struct i2o_driver i2o_config_driver;
/* Config OSM driver struct */
static struct i2o_driver i2o_config_driver = {
.name = OSM_NAME,
};
#ifdef CONFIG_I2O_CONFIG_OLD_IOCTL
#include "i2o_config.c"
#endif
/**
* i2o_config_init - Configuration OSM initialization function
*
* Registers Configuration OSM in the I2O core and if old ioctl's are
* compiled in initialize them.
*
* Returns 0 on success or negative error code on failure.
*/
static int __init i2o_config_init(void)
{
printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n");
if (i2o_driver_register(&i2o_config_driver)) {
osm_err("handler register failed.\n");
return -EBUSY;
}
#ifdef CONFIG_I2O_CONFIG_OLD_IOCTL
if (i2o_config_old_init()) {
osm_err("old config handler initialization failed\n");
i2o_driver_unregister(&i2o_config_driver);
return -EBUSY;
}
#endif
return 0;
}
/**
* i2o_config_exit - Configuration OSM exit function
*
* If old ioctl's are compiled in exit remove them and unregisters
* Configuration OSM from I2O core.
*/
static void i2o_config_exit(void)
{
#ifdef CONFIG_I2O_CONFIG_OLD_IOCTL
i2o_config_old_exit();
#endif
i2o_driver_unregister(&i2o_config_driver);
}
MODULE_AUTHOR("Markus Lidel <Markus.Lidel@shadowconnect.com>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION(OSM_DESCRIPTION);
MODULE_VERSION(OSM_VERSION);
module_init(i2o_config_init);
module_exit(i2o_config_exit);

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/*
* I2O core internal declarations
*
* Copyright (C) 2005 Markus Lidel <Markus.Lidel@shadowconnect.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Fixes/additions:
* Markus Lidel <Markus.Lidel@shadowconnect.com>
* initial version.
*/
/* Exec-OSM */
extern struct i2o_driver i2o_exec_driver;
extern int i2o_exec_lct_get(struct i2o_controller *);
extern int __init i2o_exec_init(void);
extern void i2o_exec_exit(void);
/* driver */
extern struct bus_type i2o_bus_type;
extern int i2o_driver_dispatch(struct i2o_controller *, u32);
extern int __init i2o_driver_init(void);
extern void i2o_driver_exit(void);
/* PCI */
extern int __init i2o_pci_init(void);
extern void __exit i2o_pci_exit(void);
/* device */
extern const struct attribute_group *i2o_device_groups[];
extern void i2o_device_remove(struct i2o_device *);
extern int i2o_device_parse_lct(struct i2o_controller *);
int i2o_parm_issue(struct i2o_device *i2o_dev, int cmd, void *oplist,
int oplen, void *reslist, int reslen);
/* IOP */
extern struct i2o_controller *i2o_iop_alloc(void);
/**
* i2o_iop_free - Free the i2o_controller struct
* @c: I2O controller to free
*/
static inline void i2o_iop_free(struct i2o_controller *c)
{
i2o_pool_free(&c->in_msg);
kfree(c);
}
extern int i2o_iop_add(struct i2o_controller *);
extern void i2o_iop_remove(struct i2o_controller *);
/* control registers relative to c->base */
#define I2O_IRQ_STATUS 0x30
#define I2O_IRQ_MASK 0x34
#define I2O_IN_PORT 0x40
#define I2O_OUT_PORT 0x44
/* Motorola/Freescale specific register offset */
#define I2O_MOTOROLA_PORT_OFFSET 0x10400
#define I2O_IRQ_OUTBOUND_POST 0x00000008

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#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/i2o.h>
static void i2o_report_util_cmd(u8 cmd);
static void i2o_report_exec_cmd(u8 cmd);
static void i2o_report_fail_status(u8 req_status, u32 * msg);
static void i2o_report_common_status(u8 req_status);
static void i2o_report_common_dsc(u16 detailed_status);
/*
* Used for error reporting/debugging purposes.
* Report Cmd name, Request status, Detailed Status.
*/
void i2o_report_status(const char *severity, const char *str,
struct i2o_message *m)
{
u32 *msg = (u32 *) m;
u8 cmd = (msg[1] >> 24) & 0xFF;
u8 req_status = (msg[4] >> 24) & 0xFF;
u16 detailed_status = msg[4] & 0xFFFF;
if (cmd == I2O_CMD_UTIL_EVT_REGISTER)
return; // No status in this reply
printk("%s%s: ", severity, str);
if (cmd < 0x1F) // Utility cmd
i2o_report_util_cmd(cmd);
else if (cmd >= 0xA0 && cmd <= 0xEF) // Executive cmd
i2o_report_exec_cmd(cmd);
else
printk("Cmd = %0#2x, ", cmd); // Other cmds
if (msg[0] & MSG_FAIL) {
i2o_report_fail_status(req_status, msg);
return;
}
i2o_report_common_status(req_status);
if (cmd < 0x1F || (cmd >= 0xA0 && cmd <= 0xEF))
i2o_report_common_dsc(detailed_status);
else
printk(" / DetailedStatus = %0#4x.\n",
detailed_status);
}
/* Used to dump a message to syslog during debugging */
void i2o_dump_message(struct i2o_message *m)
{
#ifdef DEBUG
u32 *msg = (u32 *) m;
int i;
printk(KERN_INFO "Dumping I2O message size %d @ %p\n",
msg[0] >> 16 & 0xffff, msg);
for (i = 0; i < ((msg[0] >> 16) & 0xffff); i++)
printk(KERN_INFO " msg[%d] = %0#10x\n", i, msg[i]);
#endif
}
/*
* Used for error reporting/debugging purposes.
* Following fail status are common to all classes.
* The preserved message must be handled in the reply handler.
*/
static void i2o_report_fail_status(u8 req_status, u32 * msg)
{
static char *FAIL_STATUS[] = {
"0x80", /* not used */
"SERVICE_SUSPENDED", /* 0x81 */
"SERVICE_TERMINATED", /* 0x82 */
"CONGESTION",
"FAILURE",
"STATE_ERROR",
"TIME_OUT",
"ROUTING_FAILURE",
"INVALID_VERSION",
"INVALID_OFFSET",
"INVALID_MSG_FLAGS",
"FRAME_TOO_SMALL",
"FRAME_TOO_LARGE",
"INVALID_TARGET_ID",
"INVALID_INITIATOR_ID",
"INVALID_INITIATOR_CONTEX", /* 0x8F */
"UNKNOWN_FAILURE" /* 0xFF */
};
if (req_status == I2O_FSC_TRANSPORT_UNKNOWN_FAILURE)
printk("TRANSPORT_UNKNOWN_FAILURE (%0#2x).\n",
req_status);
else
printk("TRANSPORT_%s.\n",
FAIL_STATUS[req_status & 0x0F]);
/* Dump some details */
printk(KERN_ERR " InitiatorId = %d, TargetId = %d\n",
(msg[1] >> 12) & 0xFFF, msg[1] & 0xFFF);
printk(KERN_ERR " LowestVersion = 0x%02X, HighestVersion = 0x%02X\n",
(msg[4] >> 8) & 0xFF, msg[4] & 0xFF);
printk(KERN_ERR " FailingHostUnit = 0x%04X, FailingIOP = 0x%03X\n",
msg[5] >> 16, msg[5] & 0xFFF);
printk(KERN_ERR " Severity: 0x%02X\n", (msg[4] >> 16) & 0xFF);
if (msg[4] & (1 << 16))
printk(KERN_DEBUG "(FormatError), "
"this msg can never be delivered/processed.\n");
if (msg[4] & (1 << 17))
printk(KERN_DEBUG "(PathError), "
"this msg can no longer be delivered/processed.\n");
if (msg[4] & (1 << 18))
printk(KERN_DEBUG "(PathState), "
"the system state does not allow delivery.\n");
if (msg[4] & (1 << 19))
printk(KERN_DEBUG
"(Congestion), resources temporarily not available;"
"do not retry immediately.\n");
}
/*
* Used for error reporting/debugging purposes.
* Following reply status are common to all classes.
*/
static void i2o_report_common_status(u8 req_status)
{
static char *REPLY_STATUS[] = {
"SUCCESS",
"ABORT_DIRTY",
"ABORT_NO_DATA_TRANSFER",
"ABORT_PARTIAL_TRANSFER",
"ERROR_DIRTY",
"ERROR_NO_DATA_TRANSFER",
"ERROR_PARTIAL_TRANSFER",
"PROCESS_ABORT_DIRTY",
"PROCESS_ABORT_NO_DATA_TRANSFER",
"PROCESS_ABORT_PARTIAL_TRANSFER",
"TRANSACTION_ERROR",
"PROGRESS_REPORT"
};
if (req_status >= ARRAY_SIZE(REPLY_STATUS))
printk("RequestStatus = %0#2x", req_status);
else
printk("%s", REPLY_STATUS[req_status]);
}
/*
* Used for error reporting/debugging purposes.
* Following detailed status are valid for executive class,
* utility class, DDM class and for transaction error replies.
*/
static void i2o_report_common_dsc(u16 detailed_status)
{
static char *COMMON_DSC[] = {
"SUCCESS",
"0x01", // not used
"BAD_KEY",
"TCL_ERROR",
"REPLY_BUFFER_FULL",
"NO_SUCH_PAGE",
"INSUFFICIENT_RESOURCE_SOFT",
"INSUFFICIENT_RESOURCE_HARD",
"0x08", // not used
"CHAIN_BUFFER_TOO_LARGE",
"UNSUPPORTED_FUNCTION",
"DEVICE_LOCKED",
"DEVICE_RESET",
"INAPPROPRIATE_FUNCTION",
"INVALID_INITIATOR_ADDRESS",
"INVALID_MESSAGE_FLAGS",
"INVALID_OFFSET",
"INVALID_PARAMETER",
"INVALID_REQUEST",
"INVALID_TARGET_ADDRESS",
"MESSAGE_TOO_LARGE",
"MESSAGE_TOO_SMALL",
"MISSING_PARAMETER",
"TIMEOUT",
"UNKNOWN_ERROR",
"UNKNOWN_FUNCTION",
"UNSUPPORTED_VERSION",
"DEVICE_BUSY",
"DEVICE_NOT_AVAILABLE"
};
if (detailed_status > I2O_DSC_DEVICE_NOT_AVAILABLE)
printk(" / DetailedStatus = %0#4x.\n",
detailed_status);
else
printk(" / %s.\n", COMMON_DSC[detailed_status]);
}
/*
* Used for error reporting/debugging purposes
*/
static void i2o_report_util_cmd(u8 cmd)
{
switch (cmd) {
case I2O_CMD_UTIL_NOP:
printk("UTIL_NOP, ");
break;
case I2O_CMD_UTIL_ABORT:
printk("UTIL_ABORT, ");
break;
case I2O_CMD_UTIL_CLAIM:
printk("UTIL_CLAIM, ");
break;
case I2O_CMD_UTIL_RELEASE:
printk("UTIL_CLAIM_RELEASE, ");
break;
case I2O_CMD_UTIL_CONFIG_DIALOG:
printk("UTIL_CONFIG_DIALOG, ");
break;
case I2O_CMD_UTIL_DEVICE_RESERVE:
printk("UTIL_DEVICE_RESERVE, ");
break;
case I2O_CMD_UTIL_DEVICE_RELEASE:
printk("UTIL_DEVICE_RELEASE, ");
break;
case I2O_CMD_UTIL_EVT_ACK:
printk("UTIL_EVENT_ACKNOWLEDGE, ");
break;
case I2O_CMD_UTIL_EVT_REGISTER:
printk("UTIL_EVENT_REGISTER, ");
break;
case I2O_CMD_UTIL_LOCK:
printk("UTIL_LOCK, ");
break;
case I2O_CMD_UTIL_LOCK_RELEASE:
printk("UTIL_LOCK_RELEASE, ");
break;
case I2O_CMD_UTIL_PARAMS_GET:
printk("UTIL_PARAMS_GET, ");
break;
case I2O_CMD_UTIL_PARAMS_SET:
printk("UTIL_PARAMS_SET, ");
break;
case I2O_CMD_UTIL_REPLY_FAULT_NOTIFY:
printk("UTIL_REPLY_FAULT_NOTIFY, ");
break;
default:
printk("Cmd = %0#2x, ", cmd);
}
}
/*
* Used for error reporting/debugging purposes
*/
static void i2o_report_exec_cmd(u8 cmd)
{
switch (cmd) {
case I2O_CMD_ADAPTER_ASSIGN:
printk("EXEC_ADAPTER_ASSIGN, ");
break;
case I2O_CMD_ADAPTER_READ:
printk("EXEC_ADAPTER_READ, ");
break;
case I2O_CMD_ADAPTER_RELEASE:
printk("EXEC_ADAPTER_RELEASE, ");
break;
case I2O_CMD_BIOS_INFO_SET:
printk("EXEC_BIOS_INFO_SET, ");
break;
case I2O_CMD_BOOT_DEVICE_SET:
printk("EXEC_BOOT_DEVICE_SET, ");
break;
case I2O_CMD_CONFIG_VALIDATE:
printk("EXEC_CONFIG_VALIDATE, ");
break;
case I2O_CMD_CONN_SETUP:
printk("EXEC_CONN_SETUP, ");
break;
case I2O_CMD_DDM_DESTROY:
printk("EXEC_DDM_DESTROY, ");
break;
case I2O_CMD_DDM_ENABLE:
printk("EXEC_DDM_ENABLE, ");
break;
case I2O_CMD_DDM_QUIESCE:
printk("EXEC_DDM_QUIESCE, ");
break;
case I2O_CMD_DDM_RESET:
printk("EXEC_DDM_RESET, ");
break;
case I2O_CMD_DDM_SUSPEND:
printk("EXEC_DDM_SUSPEND, ");
break;
case I2O_CMD_DEVICE_ASSIGN:
printk("EXEC_DEVICE_ASSIGN, ");
break;
case I2O_CMD_DEVICE_RELEASE:
printk("EXEC_DEVICE_RELEASE, ");
break;
case I2O_CMD_HRT_GET:
printk("EXEC_HRT_GET, ");
break;
case I2O_CMD_ADAPTER_CLEAR:
printk("EXEC_IOP_CLEAR, ");
break;
case I2O_CMD_ADAPTER_CONNECT:
printk("EXEC_IOP_CONNECT, ");
break;
case I2O_CMD_ADAPTER_RESET:
printk("EXEC_IOP_RESET, ");
break;
case I2O_CMD_LCT_NOTIFY:
printk("EXEC_LCT_NOTIFY, ");
break;
case I2O_CMD_OUTBOUND_INIT:
printk("EXEC_OUTBOUND_INIT, ");
break;
case I2O_CMD_PATH_ENABLE:
printk("EXEC_PATH_ENABLE, ");
break;
case I2O_CMD_PATH_QUIESCE:
printk("EXEC_PATH_QUIESCE, ");
break;
case I2O_CMD_PATH_RESET:
printk("EXEC_PATH_RESET, ");
break;
case I2O_CMD_STATIC_MF_CREATE:
printk("EXEC_STATIC_MF_CREATE, ");
break;
case I2O_CMD_STATIC_MF_RELEASE:
printk("EXEC_STATIC_MF_RELEASE, ");
break;
case I2O_CMD_STATUS_GET:
printk("EXEC_STATUS_GET, ");
break;
case I2O_CMD_SW_DOWNLOAD:
printk("EXEC_SW_DOWNLOAD, ");
break;
case I2O_CMD_SW_UPLOAD:
printk("EXEC_SW_UPLOAD, ");
break;
case I2O_CMD_SW_REMOVE:
printk("EXEC_SW_REMOVE, ");
break;
case I2O_CMD_SYS_ENABLE:
printk("EXEC_SYS_ENABLE, ");
break;
case I2O_CMD_SYS_MODIFY:
printk("EXEC_SYS_MODIFY, ");
break;
case I2O_CMD_SYS_QUIESCE:
printk("EXEC_SYS_QUIESCE, ");
break;
case I2O_CMD_SYS_TAB_SET:
printk("EXEC_SYS_TAB_SET, ");
break;
default:
printk("Cmd = %#02x, ", cmd);
}
}
void i2o_debug_state(struct i2o_controller *c)
{
printk(KERN_INFO "%s: State = ", c->name);
switch (((i2o_status_block *) c->status_block.virt)->iop_state) {
case 0x01:
printk("INIT\n");
break;
case 0x02:
printk("RESET\n");
break;
case 0x04:
printk("HOLD\n");
break;
case 0x05:
printk("READY\n");
break;
case 0x08:
printk("OPERATIONAL\n");
break;
case 0x10:
printk("FAILED\n");
break;
case 0x11:
printk("FAULTED\n");
break;
default:
printk("%x (unknown !!)\n",
((i2o_status_block *) c->status_block.virt)->iop_state);
}
};
void i2o_dump_hrt(struct i2o_controller *c)
{
u32 *rows = (u32 *) c->hrt.virt;
u8 *p = (u8 *) c->hrt.virt;
u8 *d;
int count;
int length;
int i;
int state;
if (p[3] != 0) {
printk(KERN_ERR
"%s: HRT table for controller is too new a version.\n",
c->name);
return;
}
count = p[0] | (p[1] << 8);
length = p[2];
printk(KERN_INFO "%s: HRT has %d entries of %d bytes each.\n",
c->name, count, length << 2);
rows += 2;
for (i = 0; i < count; i++) {
printk(KERN_INFO "Adapter %08X: ", rows[0]);
p = (u8 *) (rows + 1);
d = (u8 *) (rows + 2);
state = p[1] << 8 | p[0];
printk("TID %04X:[", state & 0xFFF);
state >>= 12;
if (state & (1 << 0))
printk("H"); /* Hidden */
if (state & (1 << 2)) {
printk("P"); /* Present */
if (state & (1 << 1))
printk("C"); /* Controlled */
}
if (state > 9)
printk("*"); /* Hard */
printk("]:");
switch (p[3] & 0xFFFF) {
case 0:
/* Adapter private bus - easy */
printk("Local bus %d: I/O at 0x%04X Mem 0x%08X", p[2],
d[1] << 8 | d[0], *(u32 *) (d + 4));
break;
case 1:
/* ISA bus */
printk("ISA %d: CSN %d I/O at 0x%04X Mem 0x%08X", p[2],
d[2], d[1] << 8 | d[0], *(u32 *) (d + 4));
break;
case 2: /* EISA bus */
printk("EISA %d: Slot %d I/O at 0x%04X Mem 0x%08X",
p[2], d[3], d[1] << 8 | d[0], *(u32 *) (d + 4));
break;
case 3: /* MCA bus */
printk("MCA %d: Slot %d I/O at 0x%04X Mem 0x%08X", p[2],
d[3], d[1] << 8 | d[0], *(u32 *) (d + 4));
break;
case 4: /* PCI bus */
printk("PCI %d: Bus %d Device %d Function %d", p[2],
d[2], d[1], d[0]);
break;
case 0x80: /* Other */
default:
printk("Unsupported bus type.");
break;
}
printk("\n");
rows += length;
}
}
EXPORT_SYMBOL(i2o_dump_message);

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/*
* Functions to handle I2O devices
*
* Copyright (C) 2004 Markus Lidel <Markus.Lidel@shadowconnect.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Fixes/additions:
* Markus Lidel <Markus.Lidel@shadowconnect.com>
* initial version.
*/
#include <linux/module.h>
#include <linux/i2o.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "core.h"
/**
* i2o_device_issue_claim - claim or release a device
* @dev: I2O device to claim or release
* @cmd: claim or release command
* @type: type of claim
*
* Issue I2O UTIL_CLAIM or UTIL_RELEASE messages. The message to be sent
* is set by cmd. dev is the I2O device which should be claim or
* released and the type is the claim type (see the I2O spec).
*
* Returs 0 on success or negative error code on failure.
*/
static inline int i2o_device_issue_claim(struct i2o_device *dev, u32 cmd,
u32 type)
{
struct i2o_message *msg;
msg = i2o_msg_get_wait(dev->iop, I2O_TIMEOUT_MESSAGE_GET);
if (IS_ERR(msg))
return PTR_ERR(msg);
msg->u.head[0] = cpu_to_le32(FIVE_WORD_MSG_SIZE | SGL_OFFSET_0);
msg->u.head[1] =
cpu_to_le32(cmd << 24 | HOST_TID << 12 | dev->lct_data.tid);
msg->body[0] = cpu_to_le32(type);
return i2o_msg_post_wait(dev->iop, msg, 60);
}
/**
* i2o_device_claim - claim a device for use by an OSM
* @dev: I2O device to claim
*
* Do the leg work to assign a device to a given OSM. If the claim succeeds,
* the owner is the primary. If the attempt fails a negative errno code
* is returned. On success zero is returned.
*/
int i2o_device_claim(struct i2o_device *dev)
{
int rc = 0;
mutex_lock(&dev->lock);
rc = i2o_device_issue_claim(dev, I2O_CMD_UTIL_CLAIM, I2O_CLAIM_PRIMARY);
if (!rc)
pr_debug("i2o: claim of device %d succeeded\n",
dev->lct_data.tid);
else
pr_debug("i2o: claim of device %d failed %d\n",
dev->lct_data.tid, rc);
mutex_unlock(&dev->lock);
return rc;
}
/**
* i2o_device_claim_release - release a device that the OSM is using
* @dev: device to release
*
* Drop a claim by an OSM on a given I2O device.
*
* AC - some devices seem to want to refuse an unclaim until they have
* finished internal processing. It makes sense since you don't want a
* new device to go reconfiguring the entire system until you are done.
* Thus we are prepared to wait briefly.
*
* Returns 0 on success or negative error code on failure.
*/
int i2o_device_claim_release(struct i2o_device *dev)
{
int tries;
int rc = 0;
mutex_lock(&dev->lock);
/*
* If the controller takes a nonblocking approach to
* releases we have to sleep/poll for a few times.
*/
for (tries = 0; tries < 10; tries++) {
rc = i2o_device_issue_claim(dev, I2O_CMD_UTIL_RELEASE,
I2O_CLAIM_PRIMARY);
if (!rc)
break;
ssleep(1);
}
if (!rc)
pr_debug("i2o: claim release of device %d succeeded\n",
dev->lct_data.tid);
else
pr_debug("i2o: claim release of device %d failed %d\n",
dev->lct_data.tid, rc);
mutex_unlock(&dev->lock);
return rc;
}
/**
* i2o_device_release - release the memory for a I2O device
* @dev: I2O device which should be released
*
* Release the allocated memory. This function is called if refcount of
* device reaches 0 automatically.
*/
static void i2o_device_release(struct device *dev)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
pr_debug("i2o: device %s released\n", dev_name(dev));
kfree(i2o_dev);
}
/**
* class_id_show - Displays class id of I2O device
* @dev: device of which the class id should be displayed
* @attr: pointer to device attribute
* @buf: buffer into which the class id should be printed
*
* Returns the number of bytes which are printed into the buffer.
*/
static ssize_t class_id_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
sprintf(buf, "0x%03x\n", i2o_dev->lct_data.class_id);
return strlen(buf) + 1;
}
static DEVICE_ATTR_RO(class_id);
/**
* tid_show - Displays TID of I2O device
* @dev: device of which the TID should be displayed
* @attr: pointer to device attribute
* @buf: buffer into which the TID should be printed
*
* Returns the number of bytes which are printed into the buffer.
*/
static ssize_t tid_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
sprintf(buf, "0x%03x\n", i2o_dev->lct_data.tid);
return strlen(buf) + 1;
}
static DEVICE_ATTR_RO(tid);
/* I2O device attributes */
static struct attribute *i2o_device_attrs[] = {
&dev_attr_class_id.attr,
&dev_attr_tid.attr,
NULL,
};
static const struct attribute_group i2o_device_group = {
.attrs = i2o_device_attrs,
};
const struct attribute_group *i2o_device_groups[] = {
&i2o_device_group,
NULL,
};
/**
* i2o_device_alloc - Allocate a I2O device and initialize it
*
* Allocate the memory for a I2O device and initialize locks and lists
*
* Returns the allocated I2O device or a negative error code if the device
* could not be allocated.
*/
static struct i2o_device *i2o_device_alloc(void)
{
struct i2o_device *dev;
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev)
return ERR_PTR(-ENOMEM);
INIT_LIST_HEAD(&dev->list);
mutex_init(&dev->lock);
dev->device.bus = &i2o_bus_type;
dev->device.release = &i2o_device_release;
return dev;
}
/**
* i2o_device_add - allocate a new I2O device and add it to the IOP
* @c: I2O controller that the device is on
* @entry: LCT entry of the I2O device
*
* Allocate a new I2O device and initialize it with the LCT entry. The
* device is appended to the device list of the controller.
*
* Returns zero on success, or a -ve errno.
*/
static int i2o_device_add(struct i2o_controller *c, i2o_lct_entry *entry)
{
struct i2o_device *i2o_dev, *tmp;
int rc;
i2o_dev = i2o_device_alloc();
if (IS_ERR(i2o_dev)) {
printk(KERN_ERR "i2o: unable to allocate i2o device\n");
return PTR_ERR(i2o_dev);
}
i2o_dev->lct_data = *entry;
dev_set_name(&i2o_dev->device, "%d:%03x", c->unit,
i2o_dev->lct_data.tid);
i2o_dev->iop = c;
i2o_dev->device.parent = &c->device;
rc = device_register(&i2o_dev->device);
if (rc)
goto err;
list_add_tail(&i2o_dev->list, &c->devices);
/* create user entries for this device */
tmp = i2o_iop_find_device(i2o_dev->iop, i2o_dev->lct_data.user_tid);
if (tmp && (tmp != i2o_dev)) {
rc = sysfs_create_link(&i2o_dev->device.kobj,
&tmp->device.kobj, "user");
if (rc)
goto unreg_dev;
}
/* create user entries referring to this device */
list_for_each_entry(tmp, &c->devices, list)
if ((tmp->lct_data.user_tid == i2o_dev->lct_data.tid)
&& (tmp != i2o_dev)) {
rc = sysfs_create_link(&tmp->device.kobj,
&i2o_dev->device.kobj, "user");
if (rc)
goto rmlink1;
}
/* create parent entries for this device */
tmp = i2o_iop_find_device(i2o_dev->iop, i2o_dev->lct_data.parent_tid);
if (tmp && (tmp != i2o_dev)) {
rc = sysfs_create_link(&i2o_dev->device.kobj,
&tmp->device.kobj, "parent");
if (rc)
goto rmlink1;
}
/* create parent entries referring to this device */
list_for_each_entry(tmp, &c->devices, list)
if ((tmp->lct_data.parent_tid == i2o_dev->lct_data.tid)
&& (tmp != i2o_dev)) {
rc = sysfs_create_link(&tmp->device.kobj,
&i2o_dev->device.kobj, "parent");
if (rc)
goto rmlink2;
}
i2o_driver_notify_device_add_all(i2o_dev);
pr_debug("i2o: device %s added\n", dev_name(&i2o_dev->device));
return 0;
rmlink2:
/* If link creating failed halfway, we loop whole list to cleanup.
* And we don't care wrong removing of link, because sysfs_remove_link
* will take care of it.
*/
list_for_each_entry(tmp, &c->devices, list) {
if (tmp->lct_data.parent_tid == i2o_dev->lct_data.tid)
sysfs_remove_link(&tmp->device.kobj, "parent");
}
sysfs_remove_link(&i2o_dev->device.kobj, "parent");
rmlink1:
list_for_each_entry(tmp, &c->devices, list)
if (tmp->lct_data.user_tid == i2o_dev->lct_data.tid)
sysfs_remove_link(&tmp->device.kobj, "user");
sysfs_remove_link(&i2o_dev->device.kobj, "user");
unreg_dev:
list_del(&i2o_dev->list);
device_unregister(&i2o_dev->device);
err:
kfree(i2o_dev);
return rc;
}
/**
* i2o_device_remove - remove an I2O device from the I2O core
* @i2o_dev: I2O device which should be released
*
* Is used on I2O controller removal or LCT modification, when the device
* is removed from the system. Note that the device could still hang
* around until the refcount reaches 0.
*/
void i2o_device_remove(struct i2o_device *i2o_dev)
{
struct i2o_device *tmp;
struct i2o_controller *c = i2o_dev->iop;
i2o_driver_notify_device_remove_all(i2o_dev);
sysfs_remove_link(&i2o_dev->device.kobj, "parent");
sysfs_remove_link(&i2o_dev->device.kobj, "user");
list_for_each_entry(tmp, &c->devices, list) {
if (tmp->lct_data.parent_tid == i2o_dev->lct_data.tid)
sysfs_remove_link(&tmp->device.kobj, "parent");
if (tmp->lct_data.user_tid == i2o_dev->lct_data.tid)
sysfs_remove_link(&tmp->device.kobj, "user");
}
list_del(&i2o_dev->list);
device_unregister(&i2o_dev->device);
}
/**
* i2o_device_parse_lct - Parse a previously fetched LCT and create devices
* @c: I2O controller from which the LCT should be parsed.
*
* The Logical Configuration Table tells us what we can talk to on the
* board. For every entry we create an I2O device, which is registered in
* the I2O core.
*
* Returns 0 on success or negative error code on failure.
*/
int i2o_device_parse_lct(struct i2o_controller *c)
{
struct i2o_device *dev, *tmp;
i2o_lct *lct;
u32 *dlct = c->dlct.virt;
int max = 0, i = 0;
u16 table_size;
u32 buf;
mutex_lock(&c->lct_lock);
kfree(c->lct);
buf = le32_to_cpu(*dlct++);
table_size = buf & 0xffff;
lct = c->lct = kmalloc(table_size * 4, GFP_KERNEL);
if (!lct) {
mutex_unlock(&c->lct_lock);
return -ENOMEM;
}
lct->lct_ver = buf >> 28;
lct->boot_tid = buf >> 16 & 0xfff;
lct->table_size = table_size;
lct->change_ind = le32_to_cpu(*dlct++);
lct->iop_flags = le32_to_cpu(*dlct++);
table_size -= 3;
pr_debug("%s: LCT has %d entries (LCT size: %d)\n", c->name, max,
lct->table_size);
while (table_size > 0) {
i2o_lct_entry *entry = &lct->lct_entry[max];
int found = 0;
buf = le32_to_cpu(*dlct++);
entry->entry_size = buf & 0xffff;
entry->tid = buf >> 16 & 0xfff;
entry->change_ind = le32_to_cpu(*dlct++);
entry->device_flags = le32_to_cpu(*dlct++);
buf = le32_to_cpu(*dlct++);
entry->class_id = buf & 0xfff;
entry->version = buf >> 12 & 0xf;
entry->vendor_id = buf >> 16;
entry->sub_class = le32_to_cpu(*dlct++);
buf = le32_to_cpu(*dlct++);
entry->user_tid = buf & 0xfff;
entry->parent_tid = buf >> 12 & 0xfff;
entry->bios_info = buf >> 24;
memcpy(&entry->identity_tag, dlct, 8);
dlct += 2;
entry->event_capabilities = le32_to_cpu(*dlct++);
/* add new devices, which are new in the LCT */
list_for_each_entry_safe(dev, tmp, &c->devices, list) {
if (entry->tid == dev->lct_data.tid) {
found = 1;
break;
}
}
if (!found)
i2o_device_add(c, entry);
table_size -= 9;
max++;
}
/* remove devices, which are not in the LCT anymore */
list_for_each_entry_safe(dev, tmp, &c->devices, list) {
int found = 0;
for (i = 0; i < max; i++) {
if (lct->lct_entry[i].tid == dev->lct_data.tid) {
found = 1;
break;
}
}
if (!found)
i2o_device_remove(dev);
}
mutex_unlock(&c->lct_lock);
return 0;
}
/*
* Run time support routines
*/
/* Issue UTIL_PARAMS_GET or UTIL_PARAMS_SET
*
* This function can be used for all UtilParamsGet/Set operations.
* The OperationList is given in oplist-buffer,
* and results are returned in reslist-buffer.
* Note that the minimum sized reslist is 8 bytes and contains
* ResultCount, ErrorInfoSize, BlockStatus and BlockSize.
*/
int i2o_parm_issue(struct i2o_device *i2o_dev, int cmd, void *oplist,
int oplen, void *reslist, int reslen)
{
struct i2o_message *msg;
int i = 0;
int rc;
struct i2o_dma res;
struct i2o_controller *c = i2o_dev->iop;
struct device *dev = &c->pdev->dev;
res.virt = NULL;
if (i2o_dma_alloc(dev, &res, reslen))
return -ENOMEM;
msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET);
if (IS_ERR(msg)) {
i2o_dma_free(dev, &res);
return PTR_ERR(msg);
}
i = 0;
msg->u.head[1] =
cpu_to_le32(cmd << 24 | HOST_TID << 12 | i2o_dev->lct_data.tid);
msg->body[i++] = cpu_to_le32(0x00000000);
msg->body[i++] = cpu_to_le32(0x4C000000 | oplen); /* OperationList */
memcpy(&msg->body[i], oplist, oplen);
i += (oplen / 4 + (oplen % 4 ? 1 : 0));
msg->body[i++] = cpu_to_le32(0xD0000000 | res.len); /* ResultList */
msg->body[i++] = cpu_to_le32(res.phys);
msg->u.head[0] =
cpu_to_le32(I2O_MESSAGE_SIZE(i + sizeof(struct i2o_message) / 4) |
SGL_OFFSET_5);
rc = i2o_msg_post_wait_mem(c, msg, 10, &res);
/* This only looks like a memory leak - don't "fix" it. */
if (rc == -ETIMEDOUT)
return rc;
memcpy(reslist, res.virt, res.len);
i2o_dma_free(dev, &res);
return rc;
}
/*
* Query one field group value or a whole scalar group.
*/
int i2o_parm_field_get(struct i2o_device *i2o_dev, int group, int field,
void *buf, int buflen)
{
u32 opblk[] = { cpu_to_le32(0x00000001),
cpu_to_le32((u16) group << 16 | I2O_PARAMS_FIELD_GET),
cpu_to_le32((s16) field << 16 | 0x00000001)
};
u8 *resblk; /* 8 bytes for header */
int rc;
resblk = kmalloc(buflen + 8, GFP_KERNEL);
if (!resblk)
return -ENOMEM;
rc = i2o_parm_issue(i2o_dev, I2O_CMD_UTIL_PARAMS_GET, opblk,
sizeof(opblk), resblk, buflen + 8);
memcpy(buf, resblk + 8, buflen); /* cut off header */
kfree(resblk);
return rc;
}
/*
* if oper == I2O_PARAMS_TABLE_GET, get from all rows
* if fieldcount == -1 return all fields
* ibuf and ibuflen are unused (use NULL, 0)
* else return specific fields
* ibuf contains fieldindexes
*
* if oper == I2O_PARAMS_LIST_GET, get from specific rows
* if fieldcount == -1 return all fields
* ibuf contains rowcount, keyvalues
* else return specific fields
* fieldcount is # of fieldindexes
* ibuf contains fieldindexes, rowcount, keyvalues
*
* You could also use directly function i2o_issue_params().
*/
int i2o_parm_table_get(struct i2o_device *dev, int oper, int group,
int fieldcount, void *ibuf, int ibuflen, void *resblk,
int reslen)
{
u16 *opblk;
int size;
size = 10 + ibuflen;
if (size % 4)
size += 4 - size % 4;
opblk = kmalloc(size, GFP_KERNEL);
if (opblk == NULL) {
printk(KERN_ERR "i2o: no memory for query buffer.\n");
return -ENOMEM;
}
opblk[0] = 1; /* operation count */
opblk[1] = 0; /* pad */
opblk[2] = oper;
opblk[3] = group;
opblk[4] = fieldcount;
memcpy(opblk + 5, ibuf, ibuflen); /* other params */
size = i2o_parm_issue(dev, I2O_CMD_UTIL_PARAMS_GET, opblk,
size, resblk, reslen);
kfree(opblk);
if (size > reslen)
return reslen;
return size;
}
EXPORT_SYMBOL(i2o_device_claim);
EXPORT_SYMBOL(i2o_device_claim_release);
EXPORT_SYMBOL(i2o_parm_field_get);
EXPORT_SYMBOL(i2o_parm_table_get);
EXPORT_SYMBOL(i2o_parm_issue);

382
drivers/message/i2o/driver.c Normal file
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@ -0,0 +1,382 @@
/*
* Functions to handle I2O drivers (OSMs) and I2O bus type for sysfs
*
* Copyright (C) 2004 Markus Lidel <Markus.Lidel@shadowconnect.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Fixes/additions:
* Markus Lidel <Markus.Lidel@shadowconnect.com>
* initial version.
*/
#include <linux/device.h>
#include <linux/module.h>
#include <linux/rwsem.h>
#include <linux/i2o.h>
#include <linux/workqueue.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "core.h"
#define OSM_NAME "i2o"
/* max_drivers - Maximum I2O drivers (OSMs) which could be registered */
static unsigned int i2o_max_drivers = I2O_MAX_DRIVERS;
module_param_named(max_drivers, i2o_max_drivers, uint, 0);
MODULE_PARM_DESC(max_drivers, "maximum number of OSM's to support");
/* I2O drivers lock and array */
static spinlock_t i2o_drivers_lock;
static struct i2o_driver **i2o_drivers;
/**
* i2o_bus_match - Tell if I2O device class id matches the class ids of the I2O driver (OSM)
* @dev: device which should be verified
* @drv: the driver to match against
*
* Used by the bus to check if the driver wants to handle the device.
*
* Returns 1 if the class ids of the driver match the class id of the
* device, otherwise 0.
*/
static int i2o_bus_match(struct device *dev, struct device_driver *drv)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
struct i2o_driver *i2o_drv = to_i2o_driver(drv);
struct i2o_class_id *ids = i2o_drv->classes;
if (ids)
while (ids->class_id != I2O_CLASS_END) {
if (ids->class_id == i2o_dev->lct_data.class_id)
return 1;
ids++;
}
return 0;
};
/* I2O bus type */
struct bus_type i2o_bus_type = {
.name = "i2o",
.match = i2o_bus_match,
.dev_groups = i2o_device_groups,
};
/**
* i2o_driver_register - Register a I2O driver (OSM) in the I2O core
* @drv: I2O driver which should be registered
*
* Registers the OSM drv in the I2O core and creates an event queues if
* necessary.
*
* Returns 0 on success or negative error code on failure.
*/
int i2o_driver_register(struct i2o_driver *drv)
{
struct i2o_controller *c;
int i;
int rc = 0;
unsigned long flags;
osm_debug("Register driver %s\n", drv->name);
if (drv->event) {
drv->event_queue = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1,
drv->name);
if (!drv->event_queue) {
osm_err("Could not initialize event queue for driver "
"%s\n", drv->name);
return -EFAULT;
}
osm_debug("Event queue initialized for driver %s\n", drv->name);
} else
drv->event_queue = NULL;
drv->driver.name = drv->name;
drv->driver.bus = &i2o_bus_type;
spin_lock_irqsave(&i2o_drivers_lock, flags);
for (i = 0; i2o_drivers[i]; i++)
if (i >= i2o_max_drivers) {
osm_err("too many drivers registered, increase "
"max_drivers\n");
spin_unlock_irqrestore(&i2o_drivers_lock, flags);
rc = -EFAULT;
goto out;
}
drv->context = i;
i2o_drivers[i] = drv;
spin_unlock_irqrestore(&i2o_drivers_lock, flags);
osm_debug("driver %s gets context id %d\n", drv->name, drv->context);
list_for_each_entry(c, &i2o_controllers, list) {
struct i2o_device *i2o_dev;
i2o_driver_notify_controller_add(drv, c);
list_for_each_entry(i2o_dev, &c->devices, list)
i2o_driver_notify_device_add(drv, i2o_dev);
}
rc = driver_register(&drv->driver);
if (rc)
goto out;
return 0;
out:
if (drv->event_queue) {
destroy_workqueue(drv->event_queue);
drv->event_queue = NULL;
}
return rc;
};
/**
* i2o_driver_unregister - Unregister a I2O driver (OSM) from the I2O core
* @drv: I2O driver which should be unregistered
*
* Unregisters the OSM drv from the I2O core and cleanup event queues if
* necessary.
*/
void i2o_driver_unregister(struct i2o_driver *drv)
{
struct i2o_controller *c;
unsigned long flags;
osm_debug("unregister driver %s\n", drv->name);
driver_unregister(&drv->driver);
list_for_each_entry(c, &i2o_controllers, list) {
struct i2o_device *i2o_dev;
list_for_each_entry(i2o_dev, &c->devices, list)
i2o_driver_notify_device_remove(drv, i2o_dev);
i2o_driver_notify_controller_remove(drv, c);
}
spin_lock_irqsave(&i2o_drivers_lock, flags);
i2o_drivers[drv->context] = NULL;
spin_unlock_irqrestore(&i2o_drivers_lock, flags);
if (drv->event_queue) {
destroy_workqueue(drv->event_queue);
drv->event_queue = NULL;
osm_debug("event queue removed for %s\n", drv->name);
}
};
/**
* i2o_driver_dispatch - dispatch an I2O reply message
* @c: I2O controller of the message
* @m: I2O message number
*
* The reply is delivered to the driver from which the original message
* was. This function is only called from interrupt context.
*
* Returns 0 on success and the message should not be flushed. Returns > 0
* on success and if the message should be flushed afterwords. Returns
* negative error code on failure (the message will be flushed too).
*/
int i2o_driver_dispatch(struct i2o_controller *c, u32 m)
{
struct i2o_driver *drv;
struct i2o_message *msg = i2o_msg_out_to_virt(c, m);
u32 context = le32_to_cpu(msg->u.s.icntxt);
unsigned long flags;
if (unlikely(context >= i2o_max_drivers)) {
osm_warn("%s: Spurious reply to unknown driver %d\n", c->name,
context);
return -EIO;
}
spin_lock_irqsave(&i2o_drivers_lock, flags);
drv = i2o_drivers[context];
spin_unlock_irqrestore(&i2o_drivers_lock, flags);
if (unlikely(!drv)) {
osm_warn("%s: Spurious reply to unknown driver %d\n", c->name,
context);
return -EIO;
}
if ((le32_to_cpu(msg->u.head[1]) >> 24) == I2O_CMD_UTIL_EVT_REGISTER) {
struct i2o_device *dev, *tmp;
struct i2o_event *evt;
u16 size;
u16 tid = le32_to_cpu(msg->u.head[1]) & 0xfff;
osm_debug("event received from device %d\n", tid);
if (!drv->event)
return -EIO;
/* cut of header from message size (in 32-bit words) */
size = (le32_to_cpu(msg->u.head[0]) >> 16) - 5;
evt = kzalloc(size * 4 + sizeof(*evt), GFP_ATOMIC);
if (!evt)
return -ENOMEM;
evt->size = size;
evt->tcntxt = le32_to_cpu(msg->u.s.tcntxt);
evt->event_indicator = le32_to_cpu(msg->body[0]);
memcpy(&evt->data, &msg->body[1], size * 4);
list_for_each_entry_safe(dev, tmp, &c->devices, list)
if (dev->lct_data.tid == tid) {
evt->i2o_dev = dev;
break;
}
INIT_WORK(&evt->work, drv->event);
queue_work(drv->event_queue, &evt->work);
return 1;
}
if (unlikely(!drv->reply)) {
osm_debug("%s: Reply to driver %s, but no reply function"
" defined!\n", c->name, drv->name);
return -EIO;
}
return drv->reply(c, m, msg);
}
/**
* i2o_driver_notify_controller_add_all - Send notify of added controller
* @c: newly added controller
*
* Send notifications to all registered drivers that a new controller was
* added.
*/
void i2o_driver_notify_controller_add_all(struct i2o_controller *c)
{
int i;
struct i2o_driver *drv;
for (i = 0; i < i2o_max_drivers; i++) {
drv = i2o_drivers[i];
if (drv)
i2o_driver_notify_controller_add(drv, c);
}
}
/**
* i2o_driver_notify_controller_remove_all - Send notify of removed controller
* @c: controller that is being removed
*
* Send notifications to all registered drivers that a controller was
* removed.
*/
void i2o_driver_notify_controller_remove_all(struct i2o_controller *c)
{
int i;
struct i2o_driver *drv;
for (i = 0; i < i2o_max_drivers; i++) {
drv = i2o_drivers[i];
if (drv)
i2o_driver_notify_controller_remove(drv, c);
}
}
/**
* i2o_driver_notify_device_add_all - Send notify of added device
* @i2o_dev: newly added I2O device
*
* Send notifications to all registered drivers that a device was added.
*/
void i2o_driver_notify_device_add_all(struct i2o_device *i2o_dev)
{
int i;
struct i2o_driver *drv;
for (i = 0; i < i2o_max_drivers; i++) {
drv = i2o_drivers[i];
if (drv)
i2o_driver_notify_device_add(drv, i2o_dev);
}
}
/**
* i2o_driver_notify_device_remove_all - Send notify of removed device
* @i2o_dev: device that is being removed
*
* Send notifications to all registered drivers that a device was removed.
*/
void i2o_driver_notify_device_remove_all(struct i2o_device *i2o_dev)
{
int i;
struct i2o_driver *drv;
for (i = 0; i < i2o_max_drivers; i++) {
drv = i2o_drivers[i];
if (drv)
i2o_driver_notify_device_remove(drv, i2o_dev);
}
}
/**
* i2o_driver_init - initialize I2O drivers (OSMs)
*
* Registers the I2O bus and allocate memory for the array of OSMs.
*
* Returns 0 on success or negative error code on failure.
*/
int __init i2o_driver_init(void)
{
int rc = 0;
spin_lock_init(&i2o_drivers_lock);
if ((i2o_max_drivers < 2) || (i2o_max_drivers > 64)) {
osm_warn("max_drivers set to %d, but must be >=2 and <= 64\n",
i2o_max_drivers);
i2o_max_drivers = I2O_MAX_DRIVERS;
}
osm_info("max drivers = %d\n", i2o_max_drivers);
i2o_drivers =
kcalloc(i2o_max_drivers, sizeof(*i2o_drivers), GFP_KERNEL);
if (!i2o_drivers)
return -ENOMEM;
rc = bus_register(&i2o_bus_type);
if (rc < 0)
kfree(i2o_drivers);
return rc;
};
/**
* i2o_driver_exit - clean up I2O drivers (OSMs)
*
* Unregisters the I2O bus and frees driver array.
*/
void i2o_driver_exit(void)
{
bus_unregister(&i2o_bus_type);
kfree(i2o_drivers);
};
EXPORT_SYMBOL(i2o_driver_register);
EXPORT_SYMBOL(i2o_driver_unregister);
EXPORT_SYMBOL(i2o_driver_notify_controller_add_all);
EXPORT_SYMBOL(i2o_driver_notify_controller_remove_all);
EXPORT_SYMBOL(i2o_driver_notify_device_add_all);
EXPORT_SYMBOL(i2o_driver_notify_device_remove_all);

612
drivers/message/i2o/exec-osm.c Normal file
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@ -0,0 +1,612 @@
/*
* Executive OSM
*
* Copyright (C) 1999-2002 Red Hat Software
*
* Written by Alan Cox, Building Number Three Ltd
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* A lot of the I2O message side code from this is taken from the Red
* Creek RCPCI45 adapter driver by Red Creek Communications
*
* Fixes/additions:
* Philipp Rumpf
* Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
* Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
* Deepak Saxena <deepak@plexity.net>
* Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
* Alan Cox <alan@lxorguk.ukuu.org.uk>:
* Ported to Linux 2.5.
* Markus Lidel <Markus.Lidel@shadowconnect.com>:
* Minor fixes for 2.6.
* Markus Lidel <Markus.Lidel@shadowconnect.com>:
* Support for sysfs included.
*/
#include <linux/module.h>
#include <linux/i2o.h>
#include <linux/delay.h>
#include <linux/workqueue.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/sched.h> /* wait_event_interruptible_timeout() needs this */
#include <asm/param.h> /* HZ */
#include "core.h"
#define OSM_NAME "exec-osm"
struct i2o_driver i2o_exec_driver;
/* global wait list for POST WAIT */
static LIST_HEAD(i2o_exec_wait_list);
/* Wait struct needed for POST WAIT */
struct i2o_exec_wait {
wait_queue_head_t *wq; /* Pointer to Wait queue */
struct i2o_dma dma; /* DMA buffers to free on failure */
u32 tcntxt; /* transaction context from reply */
int complete; /* 1 if reply received otherwise 0 */
u32 m; /* message id */
struct i2o_message *msg; /* pointer to the reply message */
struct list_head list; /* node in global wait list */
spinlock_t lock; /* lock before modifying */
};
/* Work struct needed to handle LCT NOTIFY replies */
struct i2o_exec_lct_notify_work {
struct work_struct work; /* work struct */
struct i2o_controller *c; /* controller on which the LCT NOTIFY
was received */
};
/* Exec OSM class handling definition */
static struct i2o_class_id i2o_exec_class_id[] = {
{I2O_CLASS_EXECUTIVE},
{I2O_CLASS_END}
};
/**
* i2o_exec_wait_alloc - Allocate a i2o_exec_wait struct an initialize it
*
* Allocate the i2o_exec_wait struct and initialize the wait.
*
* Returns i2o_exec_wait pointer on success or negative error code on
* failure.
*/
static struct i2o_exec_wait *i2o_exec_wait_alloc(void)
{
struct i2o_exec_wait *wait;
wait = kzalloc(sizeof(*wait), GFP_KERNEL);
if (!wait)
return NULL;
INIT_LIST_HEAD(&wait->list);
spin_lock_init(&wait->lock);
return wait;
};
/**
* i2o_exec_wait_free - Free an i2o_exec_wait struct
* @wait: I2O wait data which should be cleaned up
*/
static void i2o_exec_wait_free(struct i2o_exec_wait *wait)
{
kfree(wait);
};
/**
* i2o_msg_post_wait_mem - Post and wait a message with DMA buffers
* @c: controller
* @msg: message to post
* @timeout: time in seconds to wait
* @dma: i2o_dma struct of the DMA buffer to free on failure
*
* This API allows an OSM to post a message and then be told whether or
* not the system received a successful reply. If the message times out
* then the value '-ETIMEDOUT' is returned. This is a special case. In
* this situation the message may (should) complete at an indefinite time
* in the future. When it completes it will use the memory buffer
* attached to the request. If -ETIMEDOUT is returned then the memory
* buffer must not be freed. Instead the event completion will free them
* for you. In all other cases the buffer are your problem.
*
* Returns 0 on success, negative error code on timeout or positive error
* code from reply.
*/
int i2o_msg_post_wait_mem(struct i2o_controller *c, struct i2o_message *msg,
unsigned long timeout, struct i2o_dma *dma)
{
DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq);
struct i2o_exec_wait *wait;
static u32 tcntxt = 0x80000000;
unsigned long flags;
int rc = 0;
wait = i2o_exec_wait_alloc();
if (!wait) {
i2o_msg_nop(c, msg);
return -ENOMEM;
}
if (tcntxt == 0xffffffff)
tcntxt = 0x80000000;
if (dma)
wait->dma = *dma;
/*
* Fill in the message initiator context and transaction context.
* We will only use transaction contexts >= 0x80000000 for POST WAIT,
* so we could find a POST WAIT reply easier in the reply handler.
*/
msg->u.s.icntxt = cpu_to_le32(i2o_exec_driver.context);
wait->tcntxt = tcntxt++;
msg->u.s.tcntxt = cpu_to_le32(wait->tcntxt);
wait->wq = &wq;
/*
* we add elements to the head, because if a entry in the list will
* never be removed, we have to iterate over it every time
*/
list_add(&wait->list, &i2o_exec_wait_list);
/*
* Post the message to the controller. At some point later it will
* return. If we time out before it returns then complete will be zero.
*/
i2o_msg_post(c, msg);
wait_event_interruptible_timeout(wq, wait->complete, timeout * HZ);
spin_lock_irqsave(&wait->lock, flags);
wait->wq = NULL;
if (wait->complete)
rc = le32_to_cpu(wait->msg->body[0]) >> 24;
else {
/*
* We cannot remove it now. This is important. When it does
* terminate (which it must do if the controller has not
* died...) then it will otherwise scribble on stuff.
*
* FIXME: try abort message
*/
if (dma)
dma->virt = NULL;
rc = -ETIMEDOUT;
}
spin_unlock_irqrestore(&wait->lock, flags);
if (rc != -ETIMEDOUT) {
i2o_flush_reply(c, wait->m);
i2o_exec_wait_free(wait);
}
return rc;
};
/**
* i2o_msg_post_wait_complete - Reply to a i2o_msg_post request from IOP
* @c: I2O controller which answers
* @m: message id
* @msg: pointer to the I2O reply message
* @context: transaction context of request
*
* This function is called in interrupt context only. If the reply reached
* before the timeout, the i2o_exec_wait struct is filled with the message
* and the task will be waked up. The task is now responsible for returning
* the message m back to the controller! If the message reaches us after
* the timeout clean up the i2o_exec_wait struct (including allocated
* DMA buffer).
*
* Return 0 on success and if the message m should not be given back to the
* I2O controller, or >0 on success and if the message should be given back
* afterwords. Returns negative error code on failure. In this case the
* message must also be given back to the controller.
*/
static int i2o_msg_post_wait_complete(struct i2o_controller *c, u32 m,
struct i2o_message *msg, u32 context)
{
struct i2o_exec_wait *wait, *tmp;
unsigned long flags;
int rc = 1;
/*
* We need to search through the i2o_exec_wait_list to see if the given
* message is still outstanding. If not, it means that the IOP took
* longer to respond to the message than we had allowed and timer has
* already expired. Not much we can do about that except log it for
* debug purposes, increase timeout, and recompile.
*/
list_for_each_entry_safe(wait, tmp, &i2o_exec_wait_list, list) {
if (wait->tcntxt == context) {
spin_lock_irqsave(&wait->lock, flags);
list_del(&wait->list);
wait->m = m;
wait->msg = msg;
wait->complete = 1;
if (wait->wq)
rc = 0;
else
rc = -1;
spin_unlock_irqrestore(&wait->lock, flags);
if (rc) {
struct device *dev;
dev = &c->pdev->dev;
pr_debug("%s: timedout reply received!\n",
c->name);
i2o_dma_free(dev, &wait->dma);
i2o_exec_wait_free(wait);
} else
wake_up_interruptible(wait->wq);
return rc;
}
}
osm_warn("%s: Bogus reply in POST WAIT (tr-context: %08x)!\n", c->name,
context);
return -1;
};
/**
* i2o_exec_show_vendor_id - Displays Vendor ID of controller
* @d: device of which the Vendor ID should be displayed
* @attr: device_attribute to display
* @buf: buffer into which the Vendor ID should be printed
*
* Returns number of bytes printed into buffer.
*/
static ssize_t i2o_exec_show_vendor_id(struct device *d,
struct device_attribute *attr, char *buf)
{
struct i2o_device *dev = to_i2o_device(d);
u16 id;
if (!i2o_parm_field_get(dev, 0x0000, 0, &id, 2)) {
sprintf(buf, "0x%04x", le16_to_cpu(id));
return strlen(buf) + 1;
}
return 0;
};
/**
* i2o_exec_show_product_id - Displays Product ID of controller
* @d: device of which the Product ID should be displayed
* @attr: device_attribute to display
* @buf: buffer into which the Product ID should be printed
*
* Returns number of bytes printed into buffer.
*/
static ssize_t i2o_exec_show_product_id(struct device *d,
struct device_attribute *attr,
char *buf)
{
struct i2o_device *dev = to_i2o_device(d);
u16 id;
if (!i2o_parm_field_get(dev, 0x0000, 1, &id, 2)) {
sprintf(buf, "0x%04x", le16_to_cpu(id));
return strlen(buf) + 1;
}
return 0;
};
/* Exec-OSM device attributes */
static DEVICE_ATTR(vendor_id, S_IRUGO, i2o_exec_show_vendor_id, NULL);
static DEVICE_ATTR(product_id, S_IRUGO, i2o_exec_show_product_id, NULL);
/**
* i2o_exec_probe - Called if a new I2O device (executive class) appears
* @dev: I2O device which should be probed
*
* Registers event notification for every event from Executive device. The
* return is always 0, because we want all devices of class Executive.
*
* Returns 0 on success.
*/
static int i2o_exec_probe(struct device *dev)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
int rc;
rc = i2o_event_register(i2o_dev, &i2o_exec_driver, 0, 0xffffffff);
if (rc) goto err_out;
rc = device_create_file(dev, &dev_attr_vendor_id);
if (rc) goto err_evtreg;
rc = device_create_file(dev, &dev_attr_product_id);
if (rc) goto err_vid;
i2o_dev->iop->exec = i2o_dev;
return 0;
err_vid:
device_remove_file(dev, &dev_attr_vendor_id);
err_evtreg:
i2o_event_register(to_i2o_device(dev), &i2o_exec_driver, 0, 0);
err_out:
return rc;
};
/**
* i2o_exec_remove - Called on I2O device removal
* @dev: I2O device which was removed
*
* Unregisters event notification from Executive I2O device.
*
* Returns 0 on success.
*/
static int i2o_exec_remove(struct device *dev)
{
device_remove_file(dev, &dev_attr_product_id);
device_remove_file(dev, &dev_attr_vendor_id);
i2o_event_register(to_i2o_device(dev), &i2o_exec_driver, 0, 0);
return 0;
};
#ifdef CONFIG_I2O_LCT_NOTIFY_ON_CHANGES
/**
* i2o_exec_lct_notify - Send a asynchronus LCT NOTIFY request
* @c: I2O controller to which the request should be send
* @change_ind: change indicator
*
* This function sends a LCT NOTIFY request to the I2O controller with
* the change indicator change_ind. If the change_ind == 0 the controller
* replies immediately after the request. If change_ind > 0 the reply is
* send after change indicator of the LCT is > change_ind.
*/
static int i2o_exec_lct_notify(struct i2o_controller *c, u32 change_ind)
{
i2o_status_block *sb = c->status_block.virt;
struct device *dev;
struct i2o_message *msg;
mutex_lock(&c->lct_lock);
dev = &c->pdev->dev;
if (i2o_dma_realloc(dev, &c->dlct,
le32_to_cpu(sb->expected_lct_size))) {
mutex_unlock(&c->lct_lock);
return -ENOMEM;
}
msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET);
if (IS_ERR(msg)) {
mutex_unlock(&c->lct_lock);
return PTR_ERR(msg);
}
msg->u.head[0] = cpu_to_le32(EIGHT_WORD_MSG_SIZE | SGL_OFFSET_6);
msg->u.head[1] = cpu_to_le32(I2O_CMD_LCT_NOTIFY << 24 | HOST_TID << 12 |
ADAPTER_TID);
msg->u.s.icntxt = cpu_to_le32(i2o_exec_driver.context);
msg->u.s.tcntxt = cpu_to_le32(0x00000000);
msg->body[0] = cpu_to_le32(0xffffffff);
msg->body[1] = cpu_to_le32(change_ind);
msg->body[2] = cpu_to_le32(0xd0000000 | c->dlct.len);
msg->body[3] = cpu_to_le32(c->dlct.phys);
i2o_msg_post(c, msg);
mutex_unlock(&c->lct_lock);
return 0;
}
#endif
/**
* i2o_exec_lct_modified - Called on LCT NOTIFY reply
* @_work: work struct for a specific controller
*
* This function handles asynchronus LCT NOTIFY replies. It parses the
* new LCT and if the buffer for the LCT was to small sends a LCT NOTIFY
* again, otherwise send LCT NOTIFY to get informed on next LCT change.
*/
static void i2o_exec_lct_modified(struct work_struct *_work)
{
struct i2o_exec_lct_notify_work *work =
container_of(_work, struct i2o_exec_lct_notify_work, work);
u32 change_ind = 0;
struct i2o_controller *c = work->c;
kfree(work);
if (i2o_device_parse_lct(c) != -EAGAIN)
change_ind = c->lct->change_ind + 1;
#ifdef CONFIG_I2O_LCT_NOTIFY_ON_CHANGES
i2o_exec_lct_notify(c, change_ind);
#endif
};
/**
* i2o_exec_reply - I2O Executive reply handler
* @c: I2O controller from which the reply comes
* @m: message id
* @msg: pointer to the I2O reply message
*
* This function is always called from interrupt context. If a POST WAIT
* reply was received, pass it to the complete function. If a LCT NOTIFY
* reply was received, a new event is created to handle the update.
*
* Returns 0 on success and if the reply should not be flushed or > 0
* on success and if the reply should be flushed. Returns negative error
* code on failure and if the reply should be flushed.
*/
static int i2o_exec_reply(struct i2o_controller *c, u32 m,
struct i2o_message *msg)
{
u32 context;
if (le32_to_cpu(msg->u.head[0]) & MSG_FAIL) {
struct i2o_message __iomem *pmsg;
u32 pm;
/*
* If Fail bit is set we must take the transaction context of
* the preserved message to find the right request again.
*/
pm = le32_to_cpu(msg->body[3]);
pmsg = i2o_msg_in_to_virt(c, pm);
context = readl(&pmsg->u.s.tcntxt);
i2o_report_status(KERN_INFO, "i2o_core", msg);
/* Release the preserved msg */
i2o_msg_nop_mfa(c, pm);
} else
context = le32_to_cpu(msg->u.s.tcntxt);
if (context & 0x80000000)
return i2o_msg_post_wait_complete(c, m, msg, context);
if ((le32_to_cpu(msg->u.head[1]) >> 24) == I2O_CMD_LCT_NOTIFY) {
struct i2o_exec_lct_notify_work *work;
pr_debug("%s: LCT notify received\n", c->name);
work = kmalloc(sizeof(*work), GFP_ATOMIC);
if (!work)
return -ENOMEM;
work->c = c;
INIT_WORK(&work->work, i2o_exec_lct_modified);
queue_work(i2o_exec_driver.event_queue, &work->work);
return 1;
}
/*
* If this happens, we want to dump the message to the syslog so
* it can be sent back to the card manufacturer by the end user
* to aid in debugging.
*
*/
printk(KERN_WARNING "%s: Unsolicited message reply sent to core!"
"Message dumped to syslog\n", c->name);
i2o_dump_message(msg);
return -EFAULT;
}
/**
* i2o_exec_event - Event handling function
* @work: Work item in occurring event
*
* Handles events send by the Executive device. At the moment does not do
* anything useful.
*/
static void i2o_exec_event(struct work_struct *work)
{
struct i2o_event *evt = container_of(work, struct i2o_event, work);
if (likely(evt->i2o_dev))
osm_debug("Event received from device: %d\n",
evt->i2o_dev->lct_data.tid);
kfree(evt);
};
/**
* i2o_exec_lct_get - Get the IOP's Logical Configuration Table
* @c: I2O controller from which the LCT should be fetched
*
* Send a LCT NOTIFY request to the controller, and wait
* I2O_TIMEOUT_LCT_GET seconds until arrival of response. If the LCT is
* to large, retry it.
*
* Returns 0 on success or negative error code on failure.
*/
int i2o_exec_lct_get(struct i2o_controller *c)
{
struct i2o_message *msg;
int i = 0;
int rc = -EAGAIN;
for (i = 1; i <= I2O_LCT_GET_TRIES; i++) {
msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET);
if (IS_ERR(msg))
return PTR_ERR(msg);
msg->u.head[0] =
cpu_to_le32(EIGHT_WORD_MSG_SIZE | SGL_OFFSET_6);
msg->u.head[1] =
cpu_to_le32(I2O_CMD_LCT_NOTIFY << 24 | HOST_TID << 12 |
ADAPTER_TID);
msg->body[0] = cpu_to_le32(0xffffffff);
msg->body[1] = cpu_to_le32(0x00000000);
msg->body[2] = cpu_to_le32(0xd0000000 | c->dlct.len);
msg->body[3] = cpu_to_le32(c->dlct.phys);
rc = i2o_msg_post_wait(c, msg, I2O_TIMEOUT_LCT_GET);
if (rc < 0)
break;
rc = i2o_device_parse_lct(c);
if (rc != -EAGAIN)
break;
}
return rc;
}
/* Exec OSM driver struct */
struct i2o_driver i2o_exec_driver = {
.name = OSM_NAME,
.reply = i2o_exec_reply,
.event = i2o_exec_event,
.classes = i2o_exec_class_id,
.driver = {
.probe = i2o_exec_probe,
.remove = i2o_exec_remove,
},
};
/**
* i2o_exec_init - Registers the Exec OSM
*
* Registers the Exec OSM in the I2O core.
*
* Returns 0 on success or negative error code on failure.
*/
int __init i2o_exec_init(void)
{
return i2o_driver_register(&i2o_exec_driver);
};
/**
* i2o_exec_exit - Removes the Exec OSM
*
* Unregisters the Exec OSM from the I2O core.
*/
void i2o_exec_exit(void)
{
i2o_driver_unregister(&i2o_exec_driver);
};
EXPORT_SYMBOL(i2o_msg_post_wait_mem);
EXPORT_SYMBOL(i2o_exec_lct_get);

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/*
* Block OSM structures/API
*
* Copyright (C) 1999-2002 Red Hat Software
*
* Written by Alan Cox, Building Number Three Ltd
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* For the purpose of avoiding doubt the preferred form of the work
* for making modifications shall be a standards compliant form such
* gzipped tar and not one requiring a proprietary or patent encumbered
* tool to unpack.
*
* Fixes/additions:
* Steve Ralston:
* Multiple device handling error fixes,
* Added a queue depth.
* Alan Cox:
* FC920 has an rmw bug. Dont or in the end marker.
* Removed queue walk, fixed for 64bitness.
* Rewrote much of the code over time
* Added indirect block lists
* Handle 64K limits on many controllers
* Don't use indirects on the Promise (breaks)
* Heavily chop down the queue depths
* Deepak Saxena:
* Independent queues per IOP
* Support for dynamic device creation/deletion
* Code cleanup
* Support for larger I/Os through merge* functions
* (taken from DAC960 driver)
* Boji T Kannanthanam:
* Set the I2O Block devices to be detected in increasing
* order of TIDs during boot.
* Search and set the I2O block device that we boot off
* from as the first device to be claimed (as /dev/i2o/hda)
* Properly attach/detach I2O gendisk structure from the
* system gendisk list. The I2O block devices now appear in
* /proc/partitions.
* Markus Lidel <Markus.Lidel@shadowconnect.com>:
* Minor bugfixes for 2.6.
*/
#ifndef I2O_BLOCK_OSM_H
#define I2O_BLOCK_OSM_H
#define I2O_BLOCK_RETRY_TIME HZ/4
#define I2O_BLOCK_MAX_OPEN_REQUESTS 50
/* request queue sizes */
#define I2O_BLOCK_REQ_MEMPOOL_SIZE 32
#define KERNEL_SECTOR_SHIFT 9
#define KERNEL_SECTOR_SIZE (1 << KERNEL_SECTOR_SHIFT)
/* I2O Block OSM mempool struct */
struct i2o_block_mempool {
struct kmem_cache *slab;
mempool_t *pool;
};
/* I2O Block device descriptor */
struct i2o_block_device {
struct i2o_device *i2o_dev; /* pointer to I2O device */
struct gendisk *gd;
spinlock_t lock; /* queue lock */
struct list_head open_queue; /* list of transferred, but unfinished
requests */
unsigned int open_queue_depth; /* number of requests in the queue */
int rcache; /* read cache flags */
int wcache; /* write cache flags */
int flags;
u16 power; /* power state */
int media_change_flag; /* media changed flag */
};
/* I2O Block device request */
struct i2o_block_request {
struct list_head queue;
struct request *req; /* corresponding request */
struct i2o_block_device *i2o_blk_dev; /* I2O block device */
struct device *dev; /* device used for DMA */
int sg_nents; /* number of SG elements */
struct scatterlist sg_table[I2O_MAX_PHYS_SEGMENTS]; /* SG table */
};
/* I2O Block device delayed request */
struct i2o_block_delayed_request {
struct delayed_work work;
struct request_queue *queue;
};
#endif

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/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2, or (at your option) any
* later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* For the avoidance of doubt the "preferred form" of this code is one which
* is in an open non patent encumbered format. Where cryptographic key signing
* forms part of the process of creating an executable the information
* including keys needed to generate an equivalently functional executable
* are deemed to be part of the source code.
*
* Complications for I2O scsi
*
* o Each (bus,lun) is a logical device in I2O. We keep a map
* table. We spoof failed selection for unmapped units
* o Request sense buffers can come back for free.
* o Scatter gather is a bit dynamic. We have to investigate at
* setup time.
* o Some of our resources are dynamically shared. The i2o core
* needs a message reservation protocol to avoid swap v net
* deadlocking. We need to back off queue requests.
*
* In general the firmware wants to help. Where its help isn't performance
* useful we just ignore the aid. Its not worth the code in truth.
*
* Fixes/additions:
* Steve Ralston:
* Scatter gather now works
* Markus Lidel <Markus.Lidel@shadowconnect.com>:
* Minor fixes for 2.6.
*
* To Do:
* 64bit cleanups
* Fix the resource management problems.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/ioport.h>
#include <linux/jiffies.h>
#include <linux/interrupt.h>
#include <linux/timer.h>
#include <linux/delay.h>
#include <linux/proc_fs.h>
#include <linux/prefetch.h>
#include <linux/pci.h>
#include <linux/blkdev.h>
#include <linux/i2o.h>
#include <linux/scatterlist.h>
#include <asm/dma.h>
#include <asm/io.h>
#include <linux/atomic.h>
#include <scsi/scsi.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/sg.h>
#define OSM_NAME "scsi-osm"
#define OSM_VERSION "1.316"
#define OSM_DESCRIPTION "I2O SCSI Peripheral OSM"
static struct i2o_driver i2o_scsi_driver;
static unsigned int i2o_scsi_max_id = 16;
static unsigned int i2o_scsi_max_lun = 255;
struct i2o_scsi_host {
struct Scsi_Host *scsi_host; /* pointer to the SCSI host */
struct i2o_controller *iop; /* pointer to the I2O controller */
u64 lun; /* lun's used for block devices */
struct i2o_device *channel[0]; /* channel->i2o_dev mapping table */
};
static struct scsi_host_template i2o_scsi_host_template;
#define I2O_SCSI_CAN_QUEUE 4
/* SCSI OSM class handling definition */
static struct i2o_class_id i2o_scsi_class_id[] = {
{I2O_CLASS_SCSI_PERIPHERAL},
{I2O_CLASS_END}
};
static struct i2o_scsi_host *i2o_scsi_host_alloc(struct i2o_controller *c)
{
struct i2o_scsi_host *i2o_shost;
struct i2o_device *i2o_dev;
struct Scsi_Host *scsi_host;
int max_channel = 0;
u8 type;
int i;
size_t size;
u16 body_size = 6;
#ifdef CONFIG_I2O_EXT_ADAPTEC
if (c->adaptec)
body_size = 8;
#endif
list_for_each_entry(i2o_dev, &c->devices, list)
if (i2o_dev->lct_data.class_id == I2O_CLASS_BUS_ADAPTER) {
if (!i2o_parm_field_get(i2o_dev, 0x0000, 0, &type, 1)
&& (type == 0x01)) /* SCSI bus */
max_channel++;
}
if (!max_channel) {
osm_warn("no channels found on %s\n", c->name);
return ERR_PTR(-EFAULT);
}
size = max_channel * sizeof(struct i2o_device *)
+ sizeof(struct i2o_scsi_host);
scsi_host = scsi_host_alloc(&i2o_scsi_host_template, size);
if (!scsi_host) {
osm_warn("Could not allocate SCSI host\n");
return ERR_PTR(-ENOMEM);
}
scsi_host->max_channel = max_channel - 1;
scsi_host->max_id = i2o_scsi_max_id;
scsi_host->max_lun = i2o_scsi_max_lun;
scsi_host->this_id = c->unit;
scsi_host->sg_tablesize = i2o_sg_tablesize(c, body_size);
i2o_shost = (struct i2o_scsi_host *)scsi_host->hostdata;
i2o_shost->scsi_host = scsi_host;
i2o_shost->iop = c;
i2o_shost->lun = 1;
i = 0;
list_for_each_entry(i2o_dev, &c->devices, list)
if (i2o_dev->lct_data.class_id == I2O_CLASS_BUS_ADAPTER) {
if (!i2o_parm_field_get(i2o_dev, 0x0000, 0, &type, 1)
&& (type == 0x01)) /* only SCSI bus */
i2o_shost->channel[i++] = i2o_dev;
if (i >= max_channel)
break;
}
return i2o_shost;
};
/**
* i2o_scsi_get_host - Get an I2O SCSI host
* @c: I2O controller to for which to get the SCSI host
*
* If the I2O controller already exists as SCSI host, the SCSI host
* is returned, otherwise the I2O controller is added to the SCSI
* core.
*
* Returns pointer to the I2O SCSI host on success or NULL on failure.
*/
static struct i2o_scsi_host *i2o_scsi_get_host(struct i2o_controller *c)
{
return c->driver_data[i2o_scsi_driver.context];
};
/**
* i2o_scsi_remove - Remove I2O device from SCSI core
* @dev: device which should be removed
*
* Removes the I2O device from the SCSI core again.
*
* Returns 0 on success.
*/
static int i2o_scsi_remove(struct device *dev)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
struct i2o_controller *c = i2o_dev->iop;
struct i2o_scsi_host *i2o_shost;
struct scsi_device *scsi_dev;
osm_info("device removed (TID: %03x)\n", i2o_dev->lct_data.tid);
i2o_shost = i2o_scsi_get_host(c);
shost_for_each_device(scsi_dev, i2o_shost->scsi_host)
if (scsi_dev->hostdata == i2o_dev) {
sysfs_remove_link(&i2o_dev->device.kobj, "scsi");
scsi_remove_device(scsi_dev);
scsi_device_put(scsi_dev);
break;
}
return 0;
};
/**
* i2o_scsi_probe - verify if dev is a I2O SCSI device and install it
* @dev: device to verify if it is a I2O SCSI device
*
* Retrieve channel, id and lun for I2O device. If everything goes well
* register the I2O device as SCSI device on the I2O SCSI controller.
*
* Returns 0 on success or negative error code on failure.
*/
static int i2o_scsi_probe(struct device *dev)
{
struct i2o_device *i2o_dev = to_i2o_device(dev);
struct i2o_controller *c = i2o_dev->iop;
struct i2o_scsi_host *i2o_shost;
struct Scsi_Host *scsi_host;
struct i2o_device *parent;
struct scsi_device *scsi_dev;
u32 id = -1;
u64 lun = -1;
int channel = -1;
int i, rc;
i2o_shost = i2o_scsi_get_host(c);
if (!i2o_shost)
return -EFAULT;
scsi_host = i2o_shost->scsi_host;
switch (i2o_dev->lct_data.class_id) {
case I2O_CLASS_RANDOM_BLOCK_STORAGE:
case I2O_CLASS_EXECUTIVE:
#ifdef CONFIG_I2O_EXT_ADAPTEC
if (c->adaptec) {
u8 type;
struct i2o_device *d = i2o_shost->channel[0];
if (!i2o_parm_field_get(d, 0x0000, 0, &type, 1)
&& (type == 0x01)) /* SCSI bus */
if (!i2o_parm_field_get(d, 0x0200, 4, &id, 4)) {
channel = 0;
if (i2o_dev->lct_data.class_id ==
I2O_CLASS_RANDOM_BLOCK_STORAGE)
lun =
cpu_to_le64(i2o_shost->
lun++);
else
lun = 0;
}
}
#endif
break;
case I2O_CLASS_SCSI_PERIPHERAL:
if (i2o_parm_field_get(i2o_dev, 0x0000, 3, &id, 4))
return -EFAULT;
if (i2o_parm_field_get(i2o_dev, 0x0000, 4, &lun, 8))
return -EFAULT;
parent = i2o_iop_find_device(c, i2o_dev->lct_data.parent_tid);
if (!parent) {
osm_warn("can not find parent of device %03x\n",
i2o_dev->lct_data.tid);
return -EFAULT;
}
for (i = 0; i <= i2o_shost->scsi_host->max_channel; i++)
if (i2o_shost->channel[i] == parent)
channel = i;
break;
default:
return -EFAULT;
}
if (channel == -1) {
osm_warn("can not find channel of device %03x\n",
i2o_dev->lct_data.tid);
return -EFAULT;
}
if (le32_to_cpu(id) >= scsi_host->max_id) {
osm_warn("SCSI device id (%d) >= max_id of I2O host (%d)",
le32_to_cpu(id), scsi_host->max_id);
return -EFAULT;
}
if (le64_to_cpu(lun) >= scsi_host->max_lun) {
osm_warn("SCSI device lun (%llu) >= max_lun of I2O host (%llu)",
le64_to_cpu(lun), scsi_host->max_lun);
return -EFAULT;
}
scsi_dev =
__scsi_add_device(i2o_shost->scsi_host, channel, le32_to_cpu(id),
le64_to_cpu(lun), i2o_dev);
if (IS_ERR(scsi_dev)) {
osm_warn("can not add SCSI device %03x\n",
i2o_dev->lct_data.tid);
return PTR_ERR(scsi_dev);
}
rc = sysfs_create_link(&i2o_dev->device.kobj,
&scsi_dev->sdev_gendev.kobj, "scsi");
if (rc)
goto err;
osm_info("device added (TID: %03x) channel: %d, id: %d, lun: %llu\n",
i2o_dev->lct_data.tid, channel, le32_to_cpu(id),
le64_to_cpu(lun));
return 0;
err:
scsi_remove_device(scsi_dev);
return rc;
};
static const char *i2o_scsi_info(struct Scsi_Host *SChost)
{
struct i2o_scsi_host *hostdata;
hostdata = (struct i2o_scsi_host *)SChost->hostdata;
return hostdata->iop->name;
}
/**
* i2o_scsi_reply - SCSI OSM message reply handler
* @c: controller issuing the reply
* @m: message id for flushing
* @msg: the message from the controller
*
* Process reply messages (interrupts in normal scsi controller think).
* We can get a variety of messages to process. The normal path is
* scsi command completions. We must also deal with IOP failures,
* the reply to a bus reset and the reply to a LUN query.
*
* Returns 0 on success and if the reply should not be flushed or > 0
* on success and if the reply should be flushed. Returns negative error
* code on failure and if the reply should be flushed.
*/
static int i2o_scsi_reply(struct i2o_controller *c, u32 m,
struct i2o_message *msg)
{
struct scsi_cmnd *cmd;
u32 error;
struct device *dev;
cmd = i2o_cntxt_list_get(c, le32_to_cpu(msg->u.s.tcntxt));
if (unlikely(!cmd)) {
osm_err("NULL reply received!\n");
return -1;
}
/*
* Low byte is device status, next is adapter status,
* (then one byte reserved), then request status.
*/
error = le32_to_cpu(msg->body[0]);
osm_debug("Completed %0x%p\n", cmd);
cmd->result = error & 0xff;
/*
* if DeviceStatus is not SCSI_SUCCESS copy over the sense data and let
* the SCSI layer handle the error
*/
if (cmd->result)
memcpy(cmd->sense_buffer, &msg->body[3],
min(SCSI_SENSE_BUFFERSIZE, 40));
/* only output error code if AdapterStatus is not HBA_SUCCESS */
if ((error >> 8) & 0xff)
osm_err("SCSI error %08x\n", error);
dev = &c->pdev->dev;
scsi_dma_unmap(cmd);
cmd->scsi_done(cmd);
return 1;
};
/**
* i2o_scsi_notify_device_add - Retrieve notifications of added devices
* @i2o_dev: the I2O device which was added
*
* If a I2O device is added we catch the notification, because I2O classes
* other than SCSI peripheral will not be received through
* i2o_scsi_probe().
*/
static void i2o_scsi_notify_device_add(struct i2o_device *i2o_dev)
{
switch (i2o_dev->lct_data.class_id) {
case I2O_CLASS_EXECUTIVE:
case I2O_CLASS_RANDOM_BLOCK_STORAGE:
i2o_scsi_probe(&i2o_dev->device);
break;
default:
break;
}
};
/**
* i2o_scsi_notify_device_remove - Retrieve notifications of removed devices
* @i2o_dev: the I2O device which was removed
*
* If a I2O device is removed, we catch the notification to remove the
* corresponding SCSI device.
*/
static void i2o_scsi_notify_device_remove(struct i2o_device *i2o_dev)
{
switch (i2o_dev->lct_data.class_id) {
case I2O_CLASS_EXECUTIVE:
case I2O_CLASS_RANDOM_BLOCK_STORAGE:
i2o_scsi_remove(&i2o_dev->device);
break;
default:
break;
}
};
/**
* i2o_scsi_notify_controller_add - Retrieve notifications of added controllers
* @c: the controller which was added
*
* If a I2O controller is added, we catch the notification to add a
* corresponding Scsi_Host.
*/
static void i2o_scsi_notify_controller_add(struct i2o_controller *c)
{
struct i2o_scsi_host *i2o_shost;
int rc;
i2o_shost = i2o_scsi_host_alloc(c);
if (IS_ERR(i2o_shost)) {
osm_err("Could not initialize SCSI host\n");
return;
}
rc = scsi_add_host(i2o_shost->scsi_host, &c->device);
if (rc) {
osm_err("Could not add SCSI host\n");
scsi_host_put(i2o_shost->scsi_host);
return;
}
c->driver_data[i2o_scsi_driver.context] = i2o_shost;
osm_debug("new I2O SCSI host added\n");
};
/**
* i2o_scsi_notify_controller_remove - Retrieve notifications of removed controllers
* @c: the controller which was removed
*
* If a I2O controller is removed, we catch the notification to remove the
* corresponding Scsi_Host.
*/
static void i2o_scsi_notify_controller_remove(struct i2o_controller *c)
{
struct i2o_scsi_host *i2o_shost;
i2o_shost = i2o_scsi_get_host(c);
if (!i2o_shost)
return;
c->driver_data[i2o_scsi_driver.context] = NULL;
scsi_remove_host(i2o_shost->scsi_host);
scsi_host_put(i2o_shost->scsi_host);
osm_debug("I2O SCSI host removed\n");
};
/* SCSI OSM driver struct */
static struct i2o_driver i2o_scsi_driver = {
.name = OSM_NAME,
.reply = i2o_scsi_reply,
.classes = i2o_scsi_class_id,
.notify_device_add = i2o_scsi_notify_device_add,
.notify_device_remove = i2o_scsi_notify_device_remove,
.notify_controller_add = i2o_scsi_notify_controller_add,
.notify_controller_remove = i2o_scsi_notify_controller_remove,
.driver = {
.probe = i2o_scsi_probe,
.remove = i2o_scsi_remove,
},
};
/**
* i2o_scsi_queuecommand - queue a SCSI command
* @SCpnt: scsi command pointer
* @done: callback for completion
*
* Issue a scsi command asynchronously. Return 0 on success or 1 if
* we hit an error (normally message queue congestion). The only
* minor complication here is that I2O deals with the device addressing
* so we have to map the bus/dev/lun back to an I2O handle as well
* as faking absent devices ourself.
*
* Locks: takes the controller lock on error path only
*/
static int i2o_scsi_queuecommand_lck(struct scsi_cmnd *SCpnt,
void (*done) (struct scsi_cmnd *))
{
struct i2o_controller *c;
struct i2o_device *i2o_dev;
int tid;
struct i2o_message *msg;
/*
* ENABLE_DISCONNECT
* SIMPLE_TAG
* RETURN_SENSE_DATA_IN_REPLY_MESSAGE_FRAME
*/
u32 scsi_flags = 0x20a00000;
u32 sgl_offset;
u32 *mptr;
u32 cmd = I2O_CMD_SCSI_EXEC << 24;
int rc = 0;
/*
* Do the incoming paperwork
*/
i2o_dev = SCpnt->device->hostdata;
SCpnt->scsi_done = done;
if (unlikely(!i2o_dev)) {
osm_warn("no I2O device in request\n");
SCpnt->result = DID_NO_CONNECT << 16;
done(SCpnt);
goto exit;
}
c = i2o_dev->iop;
tid = i2o_dev->lct_data.tid;
osm_debug("qcmd: Tid = %03x\n", tid);
osm_debug("Real scsi messages.\n");
/*
* Put together a scsi execscb message
*/
switch (SCpnt->sc_data_direction) {
case PCI_DMA_NONE:
/* DATA NO XFER */
sgl_offset = SGL_OFFSET_0;
break;
case PCI_DMA_TODEVICE:
/* DATA OUT (iop-->dev) */
scsi_flags |= 0x80000000;
sgl_offset = SGL_OFFSET_10;
break;
case PCI_DMA_FROMDEVICE:
/* DATA IN (iop<--dev) */
scsi_flags |= 0x40000000;
sgl_offset = SGL_OFFSET_10;
break;
default:
/* Unknown - kill the command */
SCpnt->result = DID_NO_CONNECT << 16;
done(SCpnt);
goto exit;
}
/*
* Obtain an I2O message. If there are none free then
* throw it back to the scsi layer
*/
msg = i2o_msg_get(c);
if (IS_ERR(msg)) {
rc = SCSI_MLQUEUE_HOST_BUSY;
goto exit;
}
mptr = &msg->body[0];
#if 0 /* this code can't work */
#ifdef CONFIG_I2O_EXT_ADAPTEC
if (c->adaptec) {
u32 adpt_flags = 0;
if (SCpnt->sc_request && SCpnt->sc_request->upper_private_data) {
i2o_sg_io_hdr_t __user *usr_ptr =
((Sg_request *) (SCpnt->sc_request->
upper_private_data))->header.
usr_ptr;
if (usr_ptr)
get_user(adpt_flags, &usr_ptr->flags);
}
switch (i2o_dev->lct_data.class_id) {
case I2O_CLASS_EXECUTIVE:
case I2O_CLASS_RANDOM_BLOCK_STORAGE:
/* interpret flag has to be set for executive */
adpt_flags ^= I2O_DPT_SG_FLAG_INTERPRET;
break;
default:
break;
}
/*
* for Adaptec controllers we use the PRIVATE command, because
* the normal SCSI EXEC doesn't support all SCSI commands on
* all controllers (for example READ CAPACITY).
*/
if (sgl_offset == SGL_OFFSET_10)
sgl_offset = SGL_OFFSET_12;
cmd = I2O_CMD_PRIVATE << 24;
*mptr++ = cpu_to_le32(I2O_VENDOR_DPT << 16 | I2O_CMD_SCSI_EXEC);
*mptr++ = cpu_to_le32(adpt_flags | tid);
}
#endif
#endif
msg->u.head[1] = cpu_to_le32(cmd | HOST_TID << 12 | tid);
msg->u.s.icntxt = cpu_to_le32(i2o_scsi_driver.context);
/* We want the SCSI control block back */
msg->u.s.tcntxt = cpu_to_le32(i2o_cntxt_list_add(c, SCpnt));
/* LSI_920_PCI_QUIRK
*
* Intermittant observations of msg frame word data corruption
* observed on msg[4] after:
* WRITE, READ-MODIFY-WRITE
* operations. 19990606 -sralston
*
* (Hence we build this word via tag. Its good practice anyway
* we don't want fetches over PCI needlessly)
*/
/* Attach tags to the devices */
/* FIXME: implement
if(SCpnt->device->tagged_supported) {
if(SCpnt->tag == HEAD_OF_QUEUE_TAG)
scsi_flags |= 0x01000000;
else if(SCpnt->tag == ORDERED_QUEUE_TAG)
scsi_flags |= 0x01800000;
}
*/
*mptr++ = cpu_to_le32(scsi_flags | SCpnt->cmd_len);
/* Write SCSI command into the message - always 16 byte block */
memcpy(mptr, SCpnt->cmnd, 16);
mptr += 4;
if (sgl_offset != SGL_OFFSET_0) {
/* write size of data addressed by SGL */
*mptr++ = cpu_to_le32(scsi_bufflen(SCpnt));
/* Now fill in the SGList and command */
if (scsi_sg_count(SCpnt)) {
if (!i2o_dma_map_sg(c, scsi_sglist(SCpnt),
scsi_sg_count(SCpnt),
SCpnt->sc_data_direction, &mptr))
goto nomem;
}
}
/* Stick the headers on */
msg->u.head[0] =
cpu_to_le32(I2O_MESSAGE_SIZE(mptr - &msg->u.head[0]) | sgl_offset);
/* Queue the message */
i2o_msg_post(c, msg);
osm_debug("Issued %0x%p\n", SCpnt);
return 0;
nomem:
rc = -ENOMEM;
i2o_msg_nop(c, msg);
exit:
return rc;
}
static DEF_SCSI_QCMD(i2o_scsi_queuecommand)
/**
* i2o_scsi_abort - abort a running command
* @SCpnt: command to abort
*
* Ask the I2O controller to abort a command. This is an asynchrnous
* process and our callback handler will see the command complete with an
* aborted message if it succeeds.
*
* Returns 0 if the command is successfully aborted or negative error code
* on failure.
*/
static int i2o_scsi_abort(struct scsi_cmnd *SCpnt)
{
struct i2o_device *i2o_dev;
struct i2o_controller *c;
struct i2o_message *msg;
int tid;
int status = FAILED;
osm_warn("Aborting command block.\n");
i2o_dev = SCpnt->device->hostdata;
c = i2o_dev->iop;
tid = i2o_dev->lct_data.tid;
msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET);
if (IS_ERR(msg))
return SCSI_MLQUEUE_HOST_BUSY;
msg->u.head[0] = cpu_to_le32(FIVE_WORD_MSG_SIZE | SGL_OFFSET_0);
msg->u.head[1] =
cpu_to_le32(I2O_CMD_SCSI_ABORT << 24 | HOST_TID << 12 | tid);
msg->body[0] = cpu_to_le32(i2o_cntxt_list_get_ptr(c, SCpnt));
if (!i2o_msg_post_wait(c, msg, I2O_TIMEOUT_SCSI_SCB_ABORT))
status = SUCCESS;
return status;
}
/**
* i2o_scsi_bios_param - Invent disk geometry
* @sdev: scsi device
* @dev: block layer device
* @capacity: size in sectors
* @ip: geometry array
*
* This is anyone's guess quite frankly. We use the same rules everyone
* else appears to and hope. It seems to work.
*/
static int i2o_scsi_bios_param(struct scsi_device *sdev,
struct block_device *dev, sector_t capacity,
int *ip)
{
int size;
size = capacity;
ip[0] = 64; /* heads */
ip[1] = 32; /* sectors */
if ((ip[2] = size >> 11) > 1024) { /* cylinders, test for big disk */
ip[0] = 255; /* heads */
ip[1] = 63; /* sectors */
ip[2] = size / (255 * 63); /* cylinders */
}
return 0;
}
static struct scsi_host_template i2o_scsi_host_template = {
.proc_name = OSM_NAME,
.name = OSM_DESCRIPTION,
.info = i2o_scsi_info,
.queuecommand = i2o_scsi_queuecommand,
.eh_abort_handler = i2o_scsi_abort,
.bios_param = i2o_scsi_bios_param,
.can_queue = I2O_SCSI_CAN_QUEUE,
.sg_tablesize = 8,
.cmd_per_lun = 6,
.use_clustering = ENABLE_CLUSTERING,
};
/**
* i2o_scsi_init - SCSI OSM initialization function
*
* Register SCSI OSM into I2O core.
*
* Returns 0 on success or negative error code on failure.
*/
static int __init i2o_scsi_init(void)
{
int rc;
printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n");
/* Register SCSI OSM into I2O core */
rc = i2o_driver_register(&i2o_scsi_driver);
if (rc) {
osm_err("Could not register SCSI driver\n");
return rc;
}
return 0;
};
/**
* i2o_scsi_exit - SCSI OSM exit function
*
* Unregisters SCSI OSM from I2O core.
*/
static void __exit i2o_scsi_exit(void)
{
/* Unregister I2O SCSI OSM from I2O core */
i2o_driver_unregister(&i2o_scsi_driver);
};
MODULE_AUTHOR("Red Hat Software");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION(OSM_DESCRIPTION);
MODULE_VERSION(OSM_VERSION);
module_init(i2o_scsi_init);
module_exit(i2o_scsi_exit);

1247
drivers/message/i2o/iop.c Normal file
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313
drivers/message/i2o/memory.c Normal file
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@ -0,0 +1,313 @@
/*
* Functions to handle I2O memory
*
* Pulled from the inlines in i2o headers and uninlined
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/module.h>
#include <linux/i2o.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/slab.h>
#include "core.h"
/* Protects our 32/64bit mask switching */
static DEFINE_MUTEX(mem_lock);
/**
* i2o_sg_tablesize - Calculate the maximum number of elements in a SGL
* @c: I2O controller for which the calculation should be done
* @body_size: maximum body size used for message in 32-bit words.
*
* Return the maximum number of SG elements in a SG list.
*/
u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size)
{
i2o_status_block *sb = c->status_block.virt;
u16 sg_count =
(sb->inbound_frame_size - sizeof(struct i2o_message) / 4) -
body_size;
if (c->pae_support) {
/*
* for 64-bit a SG attribute element must be added and each
* SG element needs 12 bytes instead of 8.
*/
sg_count -= 2;
sg_count /= 3;
} else
sg_count /= 2;
if (c->short_req && (sg_count > 8))
sg_count = 8;
return sg_count;
}
EXPORT_SYMBOL_GPL(i2o_sg_tablesize);
/**
* i2o_dma_map_single - Map pointer to controller and fill in I2O message.
* @c: I2O controller
* @ptr: pointer to the data which should be mapped
* @size: size of data in bytes
* @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
* @sg_ptr: pointer to the SG list inside the I2O message
*
* This function does all necessary DMA handling and also writes the I2O
* SGL elements into the I2O message. For details on DMA handling see also
* dma_map_single(). The pointer sg_ptr will only be set to the end of the
* SG list if the allocation was successful.
*
* Returns DMA address which must be checked for failures using
* dma_mapping_error().
*/
dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
size_t size,
enum dma_data_direction direction,
u32 ** sg_ptr)
{
u32 sg_flags;
u32 *mptr = *sg_ptr;
dma_addr_t dma_addr;
switch (direction) {
case DMA_TO_DEVICE:
sg_flags = 0xd4000000;
break;
case DMA_FROM_DEVICE:
sg_flags = 0xd0000000;
break;
default:
return 0;
}
dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction);
if (!dma_mapping_error(&c->pdev->dev, dma_addr)) {
#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
*mptr++ = cpu_to_le32(0x7C020002);
*mptr++ = cpu_to_le32(PAGE_SIZE);
}
#endif
*mptr++ = cpu_to_le32(sg_flags | size);
*mptr++ = cpu_to_le32(i2o_dma_low(dma_addr));
#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
if ((sizeof(dma_addr_t) > 4) && c->pae_support)
*mptr++ = cpu_to_le32(i2o_dma_high(dma_addr));
#endif
*sg_ptr = mptr;
}
return dma_addr;
}
EXPORT_SYMBOL_GPL(i2o_dma_map_single);
/**
* i2o_dma_map_sg - Map a SG List to controller and fill in I2O message.
* @c: I2O controller
* @sg: SG list to be mapped
* @sg_count: number of elements in the SG list
* @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
* @sg_ptr: pointer to the SG list inside the I2O message
*
* This function does all necessary DMA handling and also writes the I2O
* SGL elements into the I2O message. For details on DMA handling see also
* dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG
* list if the allocation was successful.
*
* Returns 0 on failure or 1 on success.
*/
int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg,
int sg_count, enum dma_data_direction direction, u32 ** sg_ptr)
{
u32 sg_flags;
u32 *mptr = *sg_ptr;
switch (direction) {
case DMA_TO_DEVICE:
sg_flags = 0x14000000;
break;
case DMA_FROM_DEVICE:
sg_flags = 0x10000000;
break;
default:
return 0;
}
sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction);
if (!sg_count)
return 0;
#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
*mptr++ = cpu_to_le32(0x7C020002);
*mptr++ = cpu_to_le32(PAGE_SIZE);
}
#endif
while (sg_count-- > 0) {
if (!sg_count)
sg_flags |= 0xC0000000;
*mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg));
*mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg)));
#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
if ((sizeof(dma_addr_t) > 4) && c->pae_support)
*mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg)));
#endif
sg = sg_next(sg);
}
*sg_ptr = mptr;
return 1;
}
EXPORT_SYMBOL_GPL(i2o_dma_map_sg);
/**
* i2o_dma_alloc - Allocate DMA memory
* @dev: struct device pointer to the PCI device of the I2O controller
* @addr: i2o_dma struct which should get the DMA buffer
* @len: length of the new DMA memory
*
* Allocate a coherent DMA memory and write the pointers into addr.
*
* Returns 0 on success or -ENOMEM on failure.
*/
int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len)
{
struct pci_dev *pdev = to_pci_dev(dev);
int dma_64 = 0;
mutex_lock(&mem_lock);
if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_BIT_MASK(64))) {
dma_64 = 1;
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
mutex_unlock(&mem_lock);
return -ENOMEM;
}
}
addr->virt = dma_alloc_coherent(dev, len, &addr->phys, GFP_KERNEL);
if ((sizeof(dma_addr_t) > 4) && dma_64)
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
printk(KERN_WARNING "i2o: unable to set 64-bit DMA");
mutex_unlock(&mem_lock);
if (!addr->virt)
return -ENOMEM;
memset(addr->virt, 0, len);
addr->len = len;
return 0;
}
EXPORT_SYMBOL_GPL(i2o_dma_alloc);
/**
* i2o_dma_free - Free DMA memory
* @dev: struct device pointer to the PCI device of the I2O controller
* @addr: i2o_dma struct which contains the DMA buffer
*
* Free a coherent DMA memory and set virtual address of addr to NULL.
*/
void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
{
if (addr->virt) {
if (addr->phys)
dma_free_coherent(dev, addr->len, addr->virt,
addr->phys);
else
kfree(addr->virt);
addr->virt = NULL;
}
}
EXPORT_SYMBOL_GPL(i2o_dma_free);
/**
* i2o_dma_realloc - Realloc DMA memory
* @dev: struct device pointer to the PCI device of the I2O controller
* @addr: pointer to a i2o_dma struct DMA buffer
* @len: new length of memory
*
* If there was something allocated in the addr, free it first. If len > 0
* than try to allocate it and write the addresses back to the addr
* structure. If len == 0 set the virtual address to NULL.
*
* Returns the 0 on success or negative error code on failure.
*/
int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len)
{
i2o_dma_free(dev, addr);
if (len)
return i2o_dma_alloc(dev, addr, len);
return 0;
}
EXPORT_SYMBOL_GPL(i2o_dma_realloc);
/*
* i2o_pool_alloc - Allocate an slab cache and mempool
* @mempool: pointer to struct i2o_pool to write data into.
* @name: name which is used to identify cache
* @size: size of each object
* @min_nr: minimum number of objects
*
* First allocates a slab cache with name and size. Then allocates a
* mempool which uses the slab cache for allocation and freeing.
*
* Returns 0 on success or negative error code on failure.
*/
int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
size_t size, int min_nr)
{
pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
if (!pool->name)
goto exit;
strcpy(pool->name, name);
pool->slab =
kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
if (!pool->slab)
goto free_name;
pool->mempool = mempool_create_slab_pool(min_nr, pool->slab);
if (!pool->mempool)
goto free_slab;
return 0;
free_slab:
kmem_cache_destroy(pool->slab);
free_name:
kfree(pool->name);
exit:
return -ENOMEM;
}
EXPORT_SYMBOL_GPL(i2o_pool_alloc);
/*
* i2o_pool_free - Free slab cache and mempool again
* @mempool: pointer to struct i2o_pool which should be freed
*
* Note that you have to return all objects to the mempool again before
* calling i2o_pool_free().
*/
void i2o_pool_free(struct i2o_pool *pool)
{
mempool_destroy(pool->mempool);
kmem_cache_destroy(pool->slab);
kfree(pool->name);
};
EXPORT_SYMBOL_GPL(i2o_pool_free);

497
drivers/message/i2o/pci.c Normal file
View file

@ -0,0 +1,497 @@
/*
* PCI handling of I2O controller
*
* Copyright (C) 1999-2002 Red Hat Software
*
* Written by Alan Cox, Building Number Three Ltd
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* A lot of the I2O message side code from this is taken from the Red
* Creek RCPCI45 adapter driver by Red Creek Communications
*
* Fixes/additions:
* Philipp Rumpf
* Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
* Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
* Deepak Saxena <deepak@plexity.net>
* Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
* Alan Cox <alan@lxorguk.ukuu.org.uk>:
* Ported to Linux 2.5.
* Markus Lidel <Markus.Lidel@shadowconnect.com>:
* Minor fixes for 2.6.
* Markus Lidel <Markus.Lidel@shadowconnect.com>:
* Support for sysfs included.
*/
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/i2o.h>
#include <linux/module.h>
#include "core.h"
#define OSM_DESCRIPTION "I2O-subsystem"
/* PCI device id table for all I2O controllers */
static struct pci_device_id i2o_pci_ids[] = {
{PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
{PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
{.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
.subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
{0}
};
/**
* i2o_pci_free - Frees the DMA memory for the I2O controller
* @c: I2O controller to free
*
* Remove all allocated DMA memory and unmap memory IO regions. If MTRR
* is enabled, also remove it again.
*/
static void i2o_pci_free(struct i2o_controller *c)
{
struct device *dev;
dev = &c->pdev->dev;
i2o_dma_free(dev, &c->out_queue);
i2o_dma_free(dev, &c->status_block);
kfree(c->lct);
i2o_dma_free(dev, &c->dlct);
i2o_dma_free(dev, &c->hrt);
i2o_dma_free(dev, &c->status);
if (c->raptor && c->in_queue.virt)
iounmap(c->in_queue.virt);
if (c->base.virt)
iounmap(c->base.virt);
pci_release_regions(c->pdev);
}
/**
* i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
* @c: I2O controller
*
* Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
* IO mappings are also done here. If MTRR is enabled, also do add memory
* regions here.
*
* Returns 0 on success or negative error code on failure.
*/
static int i2o_pci_alloc(struct i2o_controller *c)
{
struct pci_dev *pdev = c->pdev;
struct device *dev = &pdev->dev;
int i;
if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
printk(KERN_ERR "%s: device already claimed\n", c->name);
return -ENODEV;
}
for (i = 0; i < 6; i++) {
/* Skip I/O spaces */
if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
if (!c->base.phys) {
c->base.phys = pci_resource_start(pdev, i);
c->base.len = pci_resource_len(pdev, i);
/*
* If we know what card it is, set the size
* correctly. Code is taken from dpt_i2o.c
*/
if (pdev->device == 0xa501) {
if (pdev->subsystem_device >= 0xc032 &&
pdev->subsystem_device <= 0xc03b) {
if (c->base.len > 0x400000)
c->base.len = 0x400000;
} else {
if (c->base.len > 0x100000)
c->base.len = 0x100000;
}
}
if (!c->raptor)
break;
} else {
c->in_queue.phys = pci_resource_start(pdev, i);
c->in_queue.len = pci_resource_len(pdev, i);
break;
}
}
}
if (i == 6) {
printk(KERN_ERR "%s: I2O controller has no memory regions"
" defined.\n", c->name);
i2o_pci_free(c);
return -EINVAL;
}
/* Map the I2O controller */
if (c->raptor) {
printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
(unsigned long)c->base.phys, (unsigned long)c->base.len);
printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
(unsigned long)c->in_queue.phys,
(unsigned long)c->in_queue.len);
} else
printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
c->name, (unsigned long)c->base.phys,
(unsigned long)c->base.len);
c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
if (!c->base.virt) {
printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
i2o_pci_free(c);
return -ENOMEM;
}
if (c->raptor) {
c->in_queue.virt =
ioremap_nocache(c->in_queue.phys, c->in_queue.len);
if (!c->in_queue.virt) {
printk(KERN_ERR "%s: Unable to map controller.\n",
c->name);
i2o_pci_free(c);
return -ENOMEM;
}
} else
c->in_queue = c->base;
c->irq_status = c->base.virt + I2O_IRQ_STATUS;
c->irq_mask = c->base.virt + I2O_IRQ_MASK;
c->in_port = c->base.virt + I2O_IN_PORT;
c->out_port = c->base.virt + I2O_OUT_PORT;
/* Motorola/Freescale chip does not follow spec */
if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
/* Check if CPU is enabled */
if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
printk(KERN_INFO "%s: MPC82XX needs CPU running to "
"service I2O.\n", c->name);
i2o_pci_free(c);
return -ENODEV;
} else {
c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
c->in_port += I2O_MOTOROLA_PORT_OFFSET;
c->out_port += I2O_MOTOROLA_PORT_OFFSET;
printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
c->name);
}
}
if (i2o_dma_alloc(dev, &c->status, 8)) {
i2o_pci_free(c);
return -ENOMEM;
}
if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
i2o_pci_free(c);
return -ENOMEM;
}
if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
i2o_pci_free(c);
return -ENOMEM;
}
if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
i2o_pci_free(c);
return -ENOMEM;
}
if (i2o_dma_alloc(dev, &c->out_queue,
I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
sizeof(u32))) {
i2o_pci_free(c);
return -ENOMEM;
}
pci_set_drvdata(pdev, c);
return 0;
}
/**
* i2o_pci_interrupt - Interrupt handler for I2O controller
* @irq: interrupt line
* @dev_id: pointer to the I2O controller
*
* Handle an interrupt from a PCI based I2O controller. This turns out
* to be rather simple. We keep the controller pointer in the cookie.
*/
static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
{
struct i2o_controller *c = dev_id;
u32 m;
irqreturn_t rc = IRQ_NONE;
while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
m = readl(c->out_port);
if (m == I2O_QUEUE_EMPTY) {
/*
* Old 960 steppings had a bug in the I2O unit that
* caused the queue to appear empty when it wasn't.
*/
m = readl(c->out_port);
if (unlikely(m == I2O_QUEUE_EMPTY))
break;
}
/* dispatch it */
if (i2o_driver_dispatch(c, m))
/* flush it if result != 0 */
i2o_flush_reply(c, m);
rc = IRQ_HANDLED;
}
return rc;
}
/**
* i2o_pci_irq_enable - Allocate interrupt for I2O controller
* @c: i2o_controller that the request is for
*
* Allocate an interrupt for the I2O controller, and activate interrupts
* on the I2O controller.
*
* Returns 0 on success or negative error code on failure.
*/
static int i2o_pci_irq_enable(struct i2o_controller *c)
{
struct pci_dev *pdev = c->pdev;
int rc;
writel(0xffffffff, c->irq_mask);
if (pdev->irq) {
rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
c->name, c);
if (rc < 0) {
printk(KERN_ERR "%s: unable to allocate interrupt %d."
"\n", c->name, pdev->irq);
return rc;
}
}
writel(0x00000000, c->irq_mask);
printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
return 0;
}
/**
* i2o_pci_irq_disable - Free interrupt for I2O controller
* @c: I2O controller
*
* Disable interrupts in I2O controller and then free interrupt.
*/
static void i2o_pci_irq_disable(struct i2o_controller *c)
{
writel(0xffffffff, c->irq_mask);
if (c->pdev->irq > 0)
free_irq(c->pdev->irq, c);
}
/**
* i2o_pci_probe - Probe the PCI device for an I2O controller
* @pdev: PCI device to test
* @id: id which matched with the PCI device id table
*
* Probe the PCI device for any device which is a memory of the
* Intelligent, I2O class or an Adaptec Zero Channel Controller. We
* attempt to set up each such device and register it with the core.
*
* Returns 0 on success or negative error code on failure.
*/
static int i2o_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct i2o_controller *c;
int rc;
struct pci_dev *i960 = NULL;
printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
if ((pdev->class & 0xff) > 1) {
printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
"(skipping).\n", pci_name(pdev));
return -ENODEV;
}
if ((rc = pci_enable_device(pdev))) {
printk(KERN_WARNING "i2o: couldn't enable device %s\n",
pci_name(pdev));
return rc;
}
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
pci_name(pdev));
rc = -ENODEV;
goto disable;
}
pci_set_master(pdev);
c = i2o_iop_alloc();
if (IS_ERR(c)) {
printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
pci_name(pdev));
rc = PTR_ERR(c);
goto disable;
} else
printk(KERN_INFO "%s: controller found (%s)\n", c->name,
pci_name(pdev));
c->pdev = pdev;
c->device.parent = &pdev->dev;
/* Cards that fall apart if you hit them with large I/O loads... */
if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
c->short_req = 1;
printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
c->name);
}
if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
/*
* Expose the ship behind i960 for initialization, or it will
* failed
*/
i960 = pci_get_slot(c->pdev->bus,
PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
if (i960) {
pci_write_config_word(i960, 0x42, 0);
pci_dev_put(i960);
}
c->promise = 1;
c->limit_sectors = 1;
}
if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
c->adaptec = 1;
/* Cards that go bananas if you quiesce them before you reset them. */
if (pdev->vendor == PCI_VENDOR_ID_DPT) {
c->no_quiesce = 1;
if (pdev->device == 0xa511)
c->raptor = 1;
if (pdev->subsystem_device == 0xc05a) {
c->limit_sectors = 1;
printk(KERN_INFO
"%s: limit sectors per request to %d\n", c->name,
I2O_MAX_SECTORS_LIMITED);
}
#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
if (sizeof(dma_addr_t) > 4) {
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
c->name);
else {
c->pae_support = 1;
printk(KERN_INFO "%s: using 64-bit DMA\n",
c->name);
}
}
#endif
}
if ((rc = i2o_pci_alloc(c))) {
printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
"failed\n", c->name);
goto free_controller;
}
if (i2o_pci_irq_enable(c)) {
printk(KERN_ERR "%s: unable to enable interrupts for I2O "
"controller\n", c->name);
goto free_pci;
}
if ((rc = i2o_iop_add(c)))
goto uninstall;
if (i960)
pci_write_config_word(i960, 0x42, 0x03ff);
return 0;
uninstall:
i2o_pci_irq_disable(c);
free_pci:
i2o_pci_free(c);
free_controller:
i2o_iop_free(c);
disable:
pci_disable_device(pdev);
return rc;
}
/**
* i2o_pci_remove - Removes a I2O controller from the system
* @pdev: I2O controller which should be removed
*
* Reset the I2O controller, disable interrupts and remove all allocated
* resources.
*/
static void i2o_pci_remove(struct pci_dev *pdev)
{
struct i2o_controller *c;
c = pci_get_drvdata(pdev);
i2o_iop_remove(c);
i2o_pci_irq_disable(c);
i2o_pci_free(c);
pci_disable_device(pdev);
printk(KERN_INFO "%s: Controller removed.\n", c->name);
put_device(&c->device);
};
/* PCI driver for I2O controller */
static struct pci_driver i2o_pci_driver = {
.name = "PCI_I2O",
.id_table = i2o_pci_ids,
.probe = i2o_pci_probe,
.remove = i2o_pci_remove,
};
/**
* i2o_pci_init - registers I2O PCI driver in PCI subsystem
*
* Returns > 0 on success or negative error code on failure.
*/
int __init i2o_pci_init(void)
{
return pci_register_driver(&i2o_pci_driver);
};
/**
* i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
*/
void __exit i2o_pci_exit(void)
{
pci_unregister_driver(&i2o_pci_driver);
};
MODULE_DEVICE_TABLE(pci, i2o_pci_ids);