mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-02 17:15:37 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
382
drivers/net/ethernet/dec/tulip/eeprom.c
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382
drivers/net/ethernet/dec/tulip/eeprom.c
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@ -0,0 +1,382 @@
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/*
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drivers/net/ethernet/dec/tulip/eeprom.c
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Copyright 2000,2001 The Linux Kernel Team
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Written/copyright 1994-2001 by Donald Becker.
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This software may be used and distributed according to the terms
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of the GNU General Public License, incorporated herein by reference.
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Please submit bug reports to http://bugzilla.kernel.org/.
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*/
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include "tulip.h"
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#include <asm/unaligned.h>
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/* Serial EEPROM section. */
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/* The main routine to parse the very complicated SROM structure.
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Search www.digital.com for "21X4 SROM" to get details.
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This code is very complex, and will require changes to support
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additional cards, so I'll be verbose about what is going on.
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*/
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/* Known cards that have old-style EEPROMs. */
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static struct eeprom_fixup eeprom_fixups[] = {
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{"Asante", 0, 0, 0x94, {0x1e00, 0x0000, 0x0800, 0x0100, 0x018c,
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0x0000, 0x0000, 0xe078, 0x0001, 0x0050, 0x0018 }},
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{"SMC9332DST", 0, 0, 0xC0, { 0x1e00, 0x0000, 0x0800, 0x041f,
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0x0000, 0x009E, /* 10baseT */
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0x0004, 0x009E, /* 10baseT-FD */
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0x0903, 0x006D, /* 100baseTx */
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0x0905, 0x006D, /* 100baseTx-FD */ }},
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{"Cogent EM100", 0, 0, 0x92, { 0x1e00, 0x0000, 0x0800, 0x063f,
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0x0107, 0x8021, /* 100baseFx */
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0x0108, 0x8021, /* 100baseFx-FD */
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0x0100, 0x009E, /* 10baseT */
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0x0104, 0x009E, /* 10baseT-FD */
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0x0103, 0x006D, /* 100baseTx */
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0x0105, 0x006D, /* 100baseTx-FD */ }},
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{"Maxtech NX-110", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x0513,
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0x1001, 0x009E, /* 10base2, CSR12 0x10*/
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0x0000, 0x009E, /* 10baseT */
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0x0004, 0x009E, /* 10baseT-FD */
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0x0303, 0x006D, /* 100baseTx, CSR12 0x03 */
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0x0305, 0x006D, /* 100baseTx-FD CSR12 0x03 */}},
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{"Accton EN1207", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x051F,
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0x1B01, 0x0000, /* 10base2, CSR12 0x1B */
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0x0B00, 0x009E, /* 10baseT, CSR12 0x0B */
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0x0B04, 0x009E, /* 10baseT-FD,CSR12 0x0B */
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0x1B03, 0x006D, /* 100baseTx, CSR12 0x1B */
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0x1B05, 0x006D, /* 100baseTx-FD CSR12 0x1B */
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}},
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{"NetWinder", 0x00, 0x10, 0x57,
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/* Default media = MII
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* MII block, reset sequence (3) = 0x0821 0x0000 0x0001, capabilities 0x01e1
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*/
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{ 0x1e00, 0x0000, 0x000b, 0x8f01, 0x0103, 0x0300, 0x0821, 0x000, 0x0001, 0x0000, 0x01e1 }
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},
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{"Cobalt Microserver", 0, 0x10, 0xE0, {0x1e00, /* 0 == controller #, 1e == offset */
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0x0000, /* 0 == high offset, 0 == gap */
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0x0800, /* Default Autoselect */
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0x8001, /* 1 leaf, extended type, bogus len */
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0x0003, /* Type 3 (MII), PHY #0 */
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0x0400, /* 0 init instr, 4 reset instr */
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0x0801, /* Set control mode, GP0 output */
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0x0000, /* Drive GP0 Low (RST is active low) */
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0x0800, /* control mode, GP0 input (undriven) */
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0x0000, /* clear control mode */
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0x7800, /* 100TX FDX + HDX, 10bT FDX + HDX */
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0x01e0, /* Advertise all above */
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0x5000, /* FDX all above */
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0x1800, /* Set fast TTM in 100bt modes */
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0x0000, /* PHY cannot be unplugged */
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}},
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{NULL}};
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static const char *const block_name[] = {
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"21140 non-MII",
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"21140 MII PHY",
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"21142 Serial PHY",
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"21142 MII PHY",
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"21143 SYM PHY",
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"21143 reset method"
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};
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/**
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* tulip_build_fake_mediatable - Build a fake mediatable entry.
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* @tp: Ptr to the tulip private data.
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*
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* Some cards like the 3x5 HSC cards (J3514A) do not have a standard
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* srom and can not be handled under the fixup routine. These cards
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* still need a valid mediatable entry for correct csr12 setup and
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* mii handling.
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*
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* Since this is currently a parisc-linux specific function, the
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* #ifdef __hppa__ should completely optimize this function away for
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* non-parisc hardware.
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*/
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static void tulip_build_fake_mediatable(struct tulip_private *tp)
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{
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#ifdef CONFIG_GSC
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if (tp->flags & NEEDS_FAKE_MEDIA_TABLE) {
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static unsigned char leafdata[] =
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{ 0x01, /* phy number */
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0x02, /* gpr setup sequence length */
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0x02, 0x00, /* gpr setup sequence */
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0x02, /* phy reset sequence length */
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0x01, 0x00, /* phy reset sequence */
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0x00, 0x78, /* media capabilities */
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0x00, 0xe0, /* nway advertisement */
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0x00, 0x05, /* fdx bit map */
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0x00, 0x06 /* ttm bit map */
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};
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tp->mtable = kmalloc(sizeof(struct mediatable) +
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sizeof(struct medialeaf), GFP_KERNEL);
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if (tp->mtable == NULL)
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return; /* Horrible, impossible failure. */
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tp->mtable->defaultmedia = 0x800;
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tp->mtable->leafcount = 1;
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tp->mtable->csr12dir = 0x3f; /* inputs on bit7 for hsc-pci, bit6 for pci-fx */
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tp->mtable->has_nonmii = 0;
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tp->mtable->has_reset = 0;
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tp->mtable->has_mii = 1;
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tp->mtable->csr15dir = tp->mtable->csr15val = 0;
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tp->mtable->mleaf[0].type = 1;
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tp->mtable->mleaf[0].media = 11;
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tp->mtable->mleaf[0].leafdata = &leafdata[0];
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tp->flags |= HAS_PHY_IRQ;
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tp->csr12_shadow = -1;
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}
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#endif
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}
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void tulip_parse_eeprom(struct net_device *dev)
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{
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/*
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dev is not registered at this point, so logging messages can't
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use dev_<level> or netdev_<level> but dev->name is good via a
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hack in the caller
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*/
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/* The last media info list parsed, for multiport boards. */
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static struct mediatable *last_mediatable;
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static unsigned char *last_ee_data;
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static int controller_index;
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struct tulip_private *tp = netdev_priv(dev);
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unsigned char *ee_data = tp->eeprom;
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int i;
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tp->mtable = NULL;
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/* Detect an old-style (SA only) EEPROM layout:
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memcmp(eedata, eedata+16, 8). */
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for (i = 0; i < 8; i ++)
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if (ee_data[i] != ee_data[16+i])
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break;
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if (i >= 8) {
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if (ee_data[0] == 0xff) {
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if (last_mediatable) {
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controller_index++;
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pr_info("%s: Controller %d of multiport board\n",
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dev->name, controller_index);
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tp->mtable = last_mediatable;
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ee_data = last_ee_data;
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goto subsequent_board;
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} else
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pr_info("%s: Missing EEPROM, this interface may not work correctly!\n",
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dev->name);
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return;
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}
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/* Do a fix-up based on the vendor half of the station address prefix. */
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for (i = 0; eeprom_fixups[i].name; i++) {
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if (dev->dev_addr[0] == eeprom_fixups[i].addr0 &&
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dev->dev_addr[1] == eeprom_fixups[i].addr1 &&
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dev->dev_addr[2] == eeprom_fixups[i].addr2) {
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if (dev->dev_addr[2] == 0xE8 && ee_data[0x1a] == 0x55)
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i++; /* An Accton EN1207, not an outlaw Maxtech. */
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memcpy(ee_data + 26, eeprom_fixups[i].newtable,
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sizeof(eeprom_fixups[i].newtable));
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pr_info("%s: Old format EEPROM on '%s' board. Using substitute media control info\n",
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dev->name, eeprom_fixups[i].name);
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break;
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}
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}
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if (eeprom_fixups[i].name == NULL) { /* No fixup found. */
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pr_info("%s: Old style EEPROM with no media selection information\n",
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dev->name);
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return;
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}
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}
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controller_index = 0;
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if (ee_data[19] > 1) { /* Multiport board. */
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last_ee_data = ee_data;
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}
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subsequent_board:
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if (ee_data[27] == 0) { /* No valid media table. */
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tulip_build_fake_mediatable(tp);
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} else {
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unsigned char *p = (void *)ee_data + ee_data[27];
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unsigned char csr12dir = 0;
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int count, new_advertise = 0;
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struct mediatable *mtable;
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u16 media = get_u16(p);
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p += 2;
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if (tp->flags & CSR12_IN_SROM)
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csr12dir = *p++;
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count = *p++;
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/* there is no phy information, don't even try to build mtable */
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if (count == 0) {
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if (tulip_debug > 0)
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pr_warn("%s: no phy info, aborting mtable build\n",
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dev->name);
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return;
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}
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mtable = kmalloc(sizeof(struct mediatable) +
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count * sizeof(struct medialeaf),
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GFP_KERNEL);
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if (mtable == NULL)
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return; /* Horrible, impossible failure. */
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last_mediatable = tp->mtable = mtable;
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mtable->defaultmedia = media;
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mtable->leafcount = count;
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mtable->csr12dir = csr12dir;
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mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0;
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mtable->csr15dir = mtable->csr15val = 0;
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pr_info("%s: EEPROM default media type %s\n",
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dev->name,
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media & 0x0800 ? "Autosense"
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: medianame[media & MEDIA_MASK]);
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for (i = 0; i < count; i++) {
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struct medialeaf *leaf = &mtable->mleaf[i];
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if ((p[0] & 0x80) == 0) { /* 21140 Compact block. */
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leaf->type = 0;
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leaf->media = p[0] & 0x3f;
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leaf->leafdata = p;
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if ((p[2] & 0x61) == 0x01) /* Bogus, but Znyx boards do it. */
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mtable->has_mii = 1;
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p += 4;
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} else {
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leaf->type = p[1];
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if (p[1] == 0x05) {
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mtable->has_reset = i;
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leaf->media = p[2] & 0x0f;
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} else if (tp->chip_id == DM910X && p[1] == 0x80) {
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/* Hack to ignore Davicom delay period block */
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mtable->leafcount--;
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count--;
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i--;
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leaf->leafdata = p + 2;
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p += (p[0] & 0x3f) + 1;
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continue;
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} else if (p[1] & 1) {
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int gpr_len, reset_len;
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mtable->has_mii = 1;
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leaf->media = 11;
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gpr_len=p[3]*2;
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reset_len=p[4+gpr_len]*2;
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new_advertise |= get_u16(&p[7+gpr_len+reset_len]);
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} else {
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mtable->has_nonmii = 1;
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leaf->media = p[2] & MEDIA_MASK;
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/* Davicom's media number for 100BaseTX is strange */
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if (tp->chip_id == DM910X && leaf->media == 1)
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leaf->media = 3;
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switch (leaf->media) {
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case 0: new_advertise |= 0x0020; break;
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case 4: new_advertise |= 0x0040; break;
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case 3: new_advertise |= 0x0080; break;
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case 5: new_advertise |= 0x0100; break;
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case 6: new_advertise |= 0x0200; break;
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}
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if (p[1] == 2 && leaf->media == 0) {
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if (p[2] & 0x40) {
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u32 base15 = get_unaligned((u16*)&p[7]);
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mtable->csr15dir =
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(get_unaligned((u16*)&p[9])<<16) + base15;
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mtable->csr15val =
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(get_unaligned((u16*)&p[11])<<16) + base15;
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} else {
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mtable->csr15dir = get_unaligned((u16*)&p[3])<<16;
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mtable->csr15val = get_unaligned((u16*)&p[5])<<16;
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}
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}
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}
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leaf->leafdata = p + 2;
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p += (p[0] & 0x3f) + 1;
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}
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if (tulip_debug > 1 && leaf->media == 11) {
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unsigned char *bp = leaf->leafdata;
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pr_info("%s: MII interface PHY %d, setup/reset sequences %d/%d long, capabilities %02x %02x\n",
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dev->name,
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bp[0], bp[1], bp[2 + bp[1]*2],
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bp[5 + bp[2 + bp[1]*2]*2],
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bp[4 + bp[2 + bp[1]*2]*2]);
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}
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pr_info("%s: Index #%d - Media %s (#%d) described by a %s (%d) block\n",
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dev->name,
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i, medianame[leaf->media & 15], leaf->media,
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leaf->type < ARRAY_SIZE(block_name) ? block_name[leaf->type] : "<unknown>",
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leaf->type);
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}
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if (new_advertise)
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tp->sym_advertise = new_advertise;
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}
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}
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/* Reading a serial EEPROM is a "bit" grungy, but we work our way through:->.*/
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/* EEPROM_Ctrl bits. */
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#define EE_SHIFT_CLK 0x02 /* EEPROM shift clock. */
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#define EE_CS 0x01 /* EEPROM chip select. */
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#define EE_DATA_WRITE 0x04 /* Data from the Tulip to EEPROM. */
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#define EE_WRITE_0 0x01
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#define EE_WRITE_1 0x05
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#define EE_DATA_READ 0x08 /* Data from the EEPROM chip. */
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#define EE_ENB (0x4800 | EE_CS)
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/* Delay between EEPROM clock transitions.
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Even at 33Mhz current PCI implementations don't overrun the EEPROM clock.
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We add a bus turn-around to insure that this remains true. */
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#define eeprom_delay() ioread32(ee_addr)
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/* The EEPROM commands include the alway-set leading bit. */
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#define EE_READ_CMD (6)
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/* Note: this routine returns extra data bits for size detection. */
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int tulip_read_eeprom(struct net_device *dev, int location, int addr_len)
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{
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int i;
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unsigned retval = 0;
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struct tulip_private *tp = netdev_priv(dev);
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void __iomem *ee_addr = tp->base_addr + CSR9;
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int read_cmd = location | (EE_READ_CMD << addr_len);
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/* If location is past the end of what we can address, don't
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* read some other location (ie truncate). Just return zero.
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*/
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if (location > (1 << addr_len) - 1)
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return 0;
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iowrite32(EE_ENB & ~EE_CS, ee_addr);
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iowrite32(EE_ENB, ee_addr);
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/* Shift the read command bits out. */
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for (i = 4 + addr_len; i >= 0; i--) {
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short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
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iowrite32(EE_ENB | dataval, ee_addr);
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eeprom_delay();
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iowrite32(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
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eeprom_delay();
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retval = (retval << 1) | ((ioread32(ee_addr) & EE_DATA_READ) ? 1 : 0);
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}
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iowrite32(EE_ENB, ee_addr);
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eeprom_delay();
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for (i = 16; i > 0; i--) {
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iowrite32(EE_ENB | EE_SHIFT_CLK, ee_addr);
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eeprom_delay();
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retval = (retval << 1) | ((ioread32(ee_addr) & EE_DATA_READ) ? 1 : 0);
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iowrite32(EE_ENB, ee_addr);
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eeprom_delay();
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}
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/* Terminate the EEPROM access. */
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iowrite32(EE_ENB & ~EE_CS, ee_addr);
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return (tp->flags & HAS_SWAPPED_SEEPROM) ? swab16(retval) : retval;
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}
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