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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-11-01 16:48:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
275
drivers/net/ethernet/intel/e1000e/ptp.c
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275
drivers/net/ethernet/intel/e1000e/ptp.c
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/* Intel PRO/1000 Linux driver
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* Copyright(c) 1999 - 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* Contact Information:
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* Linux NICS <linux.nics@intel.com>
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* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*/
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/* PTP 1588 Hardware Clock (PHC)
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* Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
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* Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
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*/
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#include "e1000.h"
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/**
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* e1000e_phc_adjfreq - adjust the frequency of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired frequency change in parts per billion
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*
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* Adjust the frequency of the PHC cycle counter by the indicated delta from
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* the base frequency.
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**/
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static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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struct e1000_hw *hw = &adapter->hw;
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bool neg_adj = false;
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unsigned long flags;
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u64 adjustment;
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u32 timinca, incvalue;
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s32 ret_val;
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if ((delta > ptp->max_adj) || (delta <= -1000000000))
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return -EINVAL;
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if (delta < 0) {
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neg_adj = true;
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delta = -delta;
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}
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/* Get the System Time Register SYSTIM base frequency */
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ret_val = e1000e_get_base_timinca(adapter, &timinca);
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if (ret_val)
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return ret_val;
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spin_lock_irqsave(&adapter->systim_lock, flags);
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incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
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adjustment = incvalue;
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adjustment *= delta;
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adjustment = div_u64(adjustment, 1000000000);
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incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
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timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
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timinca |= incvalue;
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ew32(TIMINCA, timinca);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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return 0;
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}
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/**
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* e1000e_phc_adjtime - Shift the time of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired change in nanoseconds
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*
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* Adjust the timer by resetting the timecounter structure.
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**/
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static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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unsigned long flags;
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s64 now;
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spin_lock_irqsave(&adapter->systim_lock, flags);
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now = timecounter_read(&adapter->tc);
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now += delta;
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timecounter_init(&adapter->tc, &adapter->cc, now);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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return 0;
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}
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/**
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* e1000e_phc_gettime - Reads the current time from the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec structure to hold the current time value
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*
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* Read the timecounter and return the correct value in ns after converting
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* it into a struct timespec.
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**/
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static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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unsigned long flags;
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u32 remainder;
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u64 ns;
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spin_lock_irqsave(&adapter->systim_lock, flags);
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ns = timecounter_read(&adapter->tc);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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ts->tv_sec = div_u64_rem(ns, NSEC_PER_SEC, &remainder);
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ts->tv_nsec = remainder;
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return 0;
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}
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/**
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* e1000e_phc_settime - Set the current time on the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec containing the new time for the cycle counter
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*
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* Reset the timecounter to use a new base value instead of the kernel
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* wall timer value.
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**/
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static int e1000e_phc_settime(struct ptp_clock_info *ptp,
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const struct timespec *ts)
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{
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struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
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ptp_clock_info);
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unsigned long flags;
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u64 ns;
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ns = timespec_to_ns(ts);
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/* reset the timecounter */
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spin_lock_irqsave(&adapter->systim_lock, flags);
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timecounter_init(&adapter->tc, &adapter->cc, ns);
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spin_unlock_irqrestore(&adapter->systim_lock, flags);
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return 0;
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}
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/**
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* e1000e_phc_enable - enable or disable an ancillary feature
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* @ptp: ptp clock structure
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* @request: Desired resource to enable or disable
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* @on: Caller passes one to enable or zero to disable
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*
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* Enable (or disable) ancillary features of the PHC subsystem.
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* Currently, no ancillary features are supported.
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**/
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static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
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struct ptp_clock_request __always_unused *request,
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int __always_unused on)
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{
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return -EOPNOTSUPP;
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}
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static void e1000e_systim_overflow_work(struct work_struct *work)
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{
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struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
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systim_overflow_work.work);
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struct e1000_hw *hw = &adapter->hw;
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struct timespec ts;
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adapter->ptp_clock_info.gettime(&adapter->ptp_clock_info, &ts);
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e_dbg("SYSTIM overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
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schedule_delayed_work(&adapter->systim_overflow_work,
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E1000_SYSTIM_OVERFLOW_PERIOD);
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}
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static const struct ptp_clock_info e1000e_ptp_clock_info = {
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.owner = THIS_MODULE,
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.n_alarm = 0,
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.n_ext_ts = 0,
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.n_per_out = 0,
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.n_pins = 0,
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.pps = 0,
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.adjfreq = e1000e_phc_adjfreq,
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.adjtime = e1000e_phc_adjtime,
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.gettime = e1000e_phc_gettime,
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.settime = e1000e_phc_settime,
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.enable = e1000e_phc_enable,
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};
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/**
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* e1000e_ptp_init - initialize PTP for devices which support it
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* @adapter: board private structure
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*
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* This function performs the required steps for enabling PTP support.
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* If PTP support has already been loaded it simply calls the cyclecounter
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* init routine and exits.
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**/
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void e1000e_ptp_init(struct e1000_adapter *adapter)
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{
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struct e1000_hw *hw = &adapter->hw;
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adapter->ptp_clock = NULL;
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if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
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return;
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adapter->ptp_clock_info = e1000e_ptp_clock_info;
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snprintf(adapter->ptp_clock_info.name,
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sizeof(adapter->ptp_clock_info.name), "%pm",
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adapter->netdev->perm_addr);
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switch (hw->mac.type) {
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case e1000_pch2lan:
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case e1000_pch_lpt:
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if ((hw->mac.type != e1000_pch_lpt) ||
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(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
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adapter->ptp_clock_info.max_adj = 24000000 - 1;
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break;
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}
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/* fall-through */
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case e1000_82574:
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case e1000_82583:
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adapter->ptp_clock_info.max_adj = 600000000 - 1;
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break;
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default:
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break;
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}
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INIT_DELAYED_WORK(&adapter->systim_overflow_work,
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e1000e_systim_overflow_work);
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schedule_delayed_work(&adapter->systim_overflow_work,
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E1000_SYSTIM_OVERFLOW_PERIOD);
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adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
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&adapter->pdev->dev);
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if (IS_ERR(adapter->ptp_clock)) {
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adapter->ptp_clock = NULL;
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e_err("ptp_clock_register failed\n");
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} else {
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e_info("registered PHC clock\n");
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}
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}
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/**
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* e1000e_ptp_remove - disable PTP device and stop the overflow check
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* @adapter: board private structure
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*
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* Stop the PTP support, and cancel the delayed work.
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**/
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void e1000e_ptp_remove(struct e1000_adapter *adapter)
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{
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if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
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return;
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cancel_delayed_work_sync(&adapter->systim_overflow_work);
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if (adapter->ptp_clock) {
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ptp_clock_unregister(adapter->ptp_clock);
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adapter->ptp_clock = NULL;
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e_info("removed PHC\n");
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}
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}
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