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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-31 08:08:51 +01:00
Fixed MTP to work with TWRP
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awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
244
drivers/net/wireless/ath/ath9k/common-init.c
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244
drivers/net/wireless/ath/ath9k/common-init.c
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/*
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* Copyright (c) 2008-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/* We use the hw_value as an index into our private channel structure */
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#include "common.h"
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#define CHAN2G(_freq, _idx) { \
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.band = IEEE80211_BAND_2GHZ, \
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.center_freq = (_freq), \
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.hw_value = (_idx), \
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.max_power = 20, \
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}
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#define CHAN5G(_freq, _idx) { \
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.band = IEEE80211_BAND_5GHZ, \
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.center_freq = (_freq), \
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.hw_value = (_idx), \
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.max_power = 20, \
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}
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/* Some 2 GHz radios are actually tunable on 2312-2732
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* on 5 MHz steps, we support the channels which we know
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* we have calibration data for all cards though to make
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* this static */
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static const struct ieee80211_channel ath9k_2ghz_chantable[] = {
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CHAN2G(2412, 0), /* Channel 1 */
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CHAN2G(2417, 1), /* Channel 2 */
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CHAN2G(2422, 2), /* Channel 3 */
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CHAN2G(2427, 3), /* Channel 4 */
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CHAN2G(2432, 4), /* Channel 5 */
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CHAN2G(2437, 5), /* Channel 6 */
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CHAN2G(2442, 6), /* Channel 7 */
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CHAN2G(2447, 7), /* Channel 8 */
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CHAN2G(2452, 8), /* Channel 9 */
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CHAN2G(2457, 9), /* Channel 10 */
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CHAN2G(2462, 10), /* Channel 11 */
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CHAN2G(2467, 11), /* Channel 12 */
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CHAN2G(2472, 12), /* Channel 13 */
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CHAN2G(2484, 13), /* Channel 14 */
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};
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/* Some 5 GHz radios are actually tunable on XXXX-YYYY
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* on 5 MHz steps, we support the channels which we know
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* we have calibration data for all cards though to make
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* this static */
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static const struct ieee80211_channel ath9k_5ghz_chantable[] = {
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/* _We_ call this UNII 1 */
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CHAN5G(5180, 14), /* Channel 36 */
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CHAN5G(5200, 15), /* Channel 40 */
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CHAN5G(5220, 16), /* Channel 44 */
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CHAN5G(5240, 17), /* Channel 48 */
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/* _We_ call this UNII 2 */
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CHAN5G(5260, 18), /* Channel 52 */
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CHAN5G(5280, 19), /* Channel 56 */
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CHAN5G(5300, 20), /* Channel 60 */
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CHAN5G(5320, 21), /* Channel 64 */
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/* _We_ call this "Middle band" */
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CHAN5G(5500, 22), /* Channel 100 */
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CHAN5G(5520, 23), /* Channel 104 */
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CHAN5G(5540, 24), /* Channel 108 */
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CHAN5G(5560, 25), /* Channel 112 */
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CHAN5G(5580, 26), /* Channel 116 */
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CHAN5G(5600, 27), /* Channel 120 */
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CHAN5G(5620, 28), /* Channel 124 */
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CHAN5G(5640, 29), /* Channel 128 */
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CHAN5G(5660, 30), /* Channel 132 */
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CHAN5G(5680, 31), /* Channel 136 */
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CHAN5G(5700, 32), /* Channel 140 */
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/* _We_ call this UNII 3 */
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CHAN5G(5745, 33), /* Channel 149 */
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CHAN5G(5765, 34), /* Channel 153 */
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CHAN5G(5785, 35), /* Channel 157 */
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CHAN5G(5805, 36), /* Channel 161 */
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CHAN5G(5825, 37), /* Channel 165 */
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};
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/* Atheros hardware rate code addition for short premble */
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#define SHPCHECK(__hw_rate, __flags) \
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((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04 ) : 0)
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#define RATE(_bitrate, _hw_rate, _flags) { \
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.bitrate = (_bitrate), \
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.flags = (_flags), \
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.hw_value = (_hw_rate), \
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.hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
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}
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static struct ieee80211_rate ath9k_legacy_rates[] = {
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RATE(10, 0x1b, 0),
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RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE),
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RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE),
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RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE),
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RATE(60, 0x0b, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(90, 0x0f, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(120, 0x0a, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(180, 0x0e, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(240, 0x09, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(360, 0x0d, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(480, 0x08, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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RATE(540, 0x0c, (IEEE80211_RATE_SUPPORTS_5MHZ |
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IEEE80211_RATE_SUPPORTS_10MHZ)),
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};
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int ath9k_cmn_init_channels_rates(struct ath_common *common)
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{
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struct ath_hw *ah = (struct ath_hw *)common->ah;
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void *channels;
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BUILD_BUG_ON(ARRAY_SIZE(ath9k_2ghz_chantable) +
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ARRAY_SIZE(ath9k_5ghz_chantable) !=
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ATH9K_NUM_CHANNELS);
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if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
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channels = devm_kzalloc(ah->dev,
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sizeof(ath9k_2ghz_chantable), GFP_KERNEL);
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if (!channels)
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return -ENOMEM;
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memcpy(channels, ath9k_2ghz_chantable,
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sizeof(ath9k_2ghz_chantable));
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common->sbands[IEEE80211_BAND_2GHZ].channels = channels;
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common->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
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common->sbands[IEEE80211_BAND_2GHZ].n_channels =
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ARRAY_SIZE(ath9k_2ghz_chantable);
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common->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
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common->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
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ARRAY_SIZE(ath9k_legacy_rates);
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}
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if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
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channels = devm_kzalloc(ah->dev,
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sizeof(ath9k_5ghz_chantable), GFP_KERNEL);
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if (!channels)
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return -ENOMEM;
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memcpy(channels, ath9k_5ghz_chantable,
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sizeof(ath9k_5ghz_chantable));
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common->sbands[IEEE80211_BAND_5GHZ].channels = channels;
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common->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
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common->sbands[IEEE80211_BAND_5GHZ].n_channels =
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ARRAY_SIZE(ath9k_5ghz_chantable);
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common->sbands[IEEE80211_BAND_5GHZ].bitrates =
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ath9k_legacy_rates + 4;
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common->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
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ARRAY_SIZE(ath9k_legacy_rates) - 4;
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}
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return 0;
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}
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EXPORT_SYMBOL(ath9k_cmn_init_channels_rates);
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void ath9k_cmn_setup_ht_cap(struct ath_hw *ah,
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struct ieee80211_sta_ht_cap *ht_info)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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u8 tx_streams, rx_streams;
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int i, max_streams;
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ht_info->ht_supported = true;
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ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
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IEEE80211_HT_CAP_SM_PS |
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IEEE80211_HT_CAP_SGI_40 |
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IEEE80211_HT_CAP_DSSSCCK40;
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if (ah->caps.hw_caps & ATH9K_HW_CAP_LDPC)
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ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING;
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if (ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
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ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
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ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
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ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
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if (AR_SREV_9271(ah) || AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah))
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max_streams = 1;
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else if (AR_SREV_9462(ah))
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max_streams = 2;
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else if (AR_SREV_9300_20_OR_LATER(ah))
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max_streams = 3;
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else
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max_streams = 2;
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if (AR_SREV_9280_20_OR_LATER(ah)) {
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if (max_streams >= 2)
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ht_info->cap |= IEEE80211_HT_CAP_TX_STBC;
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ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
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}
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/* set up supported mcs set */
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memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
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tx_streams = ath9k_cmn_count_streams(ah->txchainmask, max_streams);
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rx_streams = ath9k_cmn_count_streams(ah->rxchainmask, max_streams);
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ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n",
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tx_streams, rx_streams);
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if (tx_streams != rx_streams) {
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ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
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ht_info->mcs.tx_params |= ((tx_streams - 1) <<
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IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
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}
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for (i = 0; i < rx_streams; i++)
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ht_info->mcs.rx_mask[i] = 0xff;
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ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
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}
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EXPORT_SYMBOL(ath9k_cmn_setup_ht_cap);
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void ath9k_cmn_reload_chainmask(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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if (!(ah->caps.hw_caps & ATH9K_HW_CAP_HT))
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return;
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if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
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ath9k_cmn_setup_ht_cap(ah,
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&common->sbands[IEEE80211_BAND_2GHZ].ht_cap);
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if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
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ath9k_cmn_setup_ht_cap(ah,
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&common->sbands[IEEE80211_BAND_5GHZ].ht_cap);
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}
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EXPORT_SYMBOL(ath9k_cmn_reload_chainmask);
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