mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-09 01:28:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
51
drivers/pinctrl/nomadik/Kconfig
Normal file
51
drivers/pinctrl/nomadik/Kconfig
Normal file
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@ -0,0 +1,51 @@
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if ARCH_U8500
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config PINCTRL_ABX500
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bool "ST-Ericsson ABx500 family Mixed Signal Circuit gpio functions"
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depends on AB8500_CORE
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select GENERIC_PINCONF
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help
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Select this to enable the ABx500 family IC GPIO driver
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config PINCTRL_AB8500
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bool "AB8500 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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config PINCTRL_AB8540
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bool "AB8540 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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config PINCTRL_AB9540
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bool "AB9540 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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config PINCTRL_AB8505
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bool "AB8505 pin controller driver"
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depends on PINCTRL_ABX500 && ARCH_U8500
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endif
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if (ARCH_U8500 || ARCH_NOMADIK)
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config PINCTRL_NOMADIK
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bool "Nomadik pin controller driver"
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depends on ARCH_U8500 || ARCH_NOMADIK
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select PINMUX
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select PINCONF
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select GPIOLIB
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select OF_GPIO
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select GPIOLIB_IRQCHIP
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config PINCTRL_STN8815
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bool "STN8815 pin controller driver"
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depends on PINCTRL_NOMADIK && ARCH_NOMADIK
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config PINCTRL_DB8500
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bool "DB8500 pin controller driver"
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depends on PINCTRL_NOMADIK && ARCH_U8500
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config PINCTRL_DB8540
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bool "DB8540 pin controller driver"
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depends on PINCTRL_NOMADIK && ARCH_U8500
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endif
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10
drivers/pinctrl/nomadik/Makefile
Normal file
10
drivers/pinctrl/nomadik/Makefile
Normal file
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@ -0,0 +1,10 @@
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# Nomadik family pin control drivers
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obj-$(CONFIG_PINCTRL_ABX500) += pinctrl-abx500.o
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obj-$(CONFIG_PINCTRL_AB8500) += pinctrl-ab8500.o
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obj-$(CONFIG_PINCTRL_AB8540) += pinctrl-ab8540.o
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obj-$(CONFIG_PINCTRL_AB9540) += pinctrl-ab9540.o
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obj-$(CONFIG_PINCTRL_AB8505) += pinctrl-ab8505.o
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obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
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obj-$(CONFIG_PINCTRL_STN8815) += pinctrl-nomadik-stn8815.o
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obj-$(CONFIG_PINCTRL_DB8500) += pinctrl-nomadik-db8500.o
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obj-$(CONFIG_PINCTRL_DB8540) += pinctrl-nomadik-db8540.o
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485
drivers/pinctrl/nomadik/pinctrl-ab8500.c
Normal file
485
drivers/pinctrl/nomadik/pinctrl-ab8500.c
Normal file
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@ -0,0 +1,485 @@
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/*
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* Copyright (C) ST-Ericsson SA 2012
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*
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* Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/gpio.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include "pinctrl-abx500.h"
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/* All the pins that can be used for GPIO and some other functions */
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#define ABX500_GPIO(offset) (offset)
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#define AB8500_PIN_T10 ABX500_GPIO(1)
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#define AB8500_PIN_T9 ABX500_GPIO(2)
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#define AB8500_PIN_U9 ABX500_GPIO(3)
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#define AB8500_PIN_W2 ABX500_GPIO(4)
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/* hole */
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#define AB8500_PIN_Y18 ABX500_GPIO(6)
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#define AB8500_PIN_AA20 ABX500_GPIO(7)
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#define AB8500_PIN_W18 ABX500_GPIO(8)
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#define AB8500_PIN_AA19 ABX500_GPIO(9)
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#define AB8500_PIN_U17 ABX500_GPIO(10)
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#define AB8500_PIN_AA18 ABX500_GPIO(11)
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#define AB8500_PIN_U16 ABX500_GPIO(12)
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#define AB8500_PIN_W17 ABX500_GPIO(13)
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#define AB8500_PIN_F14 ABX500_GPIO(14)
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#define AB8500_PIN_B17 ABX500_GPIO(15)
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#define AB8500_PIN_F15 ABX500_GPIO(16)
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#define AB8500_PIN_P5 ABX500_GPIO(17)
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#define AB8500_PIN_R5 ABX500_GPIO(18)
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#define AB8500_PIN_U5 ABX500_GPIO(19)
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#define AB8500_PIN_T5 ABX500_GPIO(20)
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#define AB8500_PIN_H19 ABX500_GPIO(21)
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#define AB8500_PIN_G20 ABX500_GPIO(22)
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#define AB8500_PIN_G19 ABX500_GPIO(23)
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#define AB8500_PIN_T14 ABX500_GPIO(24)
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#define AB8500_PIN_R16 ABX500_GPIO(25)
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#define AB8500_PIN_M16 ABX500_GPIO(26)
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#define AB8500_PIN_J6 ABX500_GPIO(27)
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#define AB8500_PIN_K6 ABX500_GPIO(28)
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#define AB8500_PIN_G6 ABX500_GPIO(29)
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#define AB8500_PIN_H6 ABX500_GPIO(30)
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#define AB8500_PIN_F5 ABX500_GPIO(31)
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#define AB8500_PIN_G5 ABX500_GPIO(32)
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/* hole */
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#define AB8500_PIN_R17 ABX500_GPIO(34)
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#define AB8500_PIN_W15 ABX500_GPIO(35)
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#define AB8500_PIN_A17 ABX500_GPIO(36)
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#define AB8500_PIN_E15 ABX500_GPIO(37)
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#define AB8500_PIN_C17 ABX500_GPIO(38)
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#define AB8500_PIN_E16 ABX500_GPIO(39)
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#define AB8500_PIN_T19 ABX500_GPIO(40)
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#define AB8500_PIN_U19 ABX500_GPIO(41)
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#define AB8500_PIN_U2 ABX500_GPIO(42)
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/* indicates the highest GPIO number */
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#define AB8500_GPIO_MAX_NUMBER 42
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/*
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* The names of the pins are denoted by GPIO number and ball name, even
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* though they can be used for other things than GPIO, this is the first
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* column in the table of the data sheet and often used on schematics and
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* such.
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*/
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static const struct pinctrl_pin_desc ab8500_pins[] = {
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PINCTRL_PIN(AB8500_PIN_T10, "GPIO1_T10"),
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PINCTRL_PIN(AB8500_PIN_T9, "GPIO2_T9"),
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PINCTRL_PIN(AB8500_PIN_U9, "GPIO3_U9"),
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PINCTRL_PIN(AB8500_PIN_W2, "GPIO4_W2"),
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/* hole */
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PINCTRL_PIN(AB8500_PIN_Y18, "GPIO6_Y18"),
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PINCTRL_PIN(AB8500_PIN_AA20, "GPIO7_AA20"),
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PINCTRL_PIN(AB8500_PIN_W18, "GPIO8_W18"),
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PINCTRL_PIN(AB8500_PIN_AA19, "GPIO9_AA19"),
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PINCTRL_PIN(AB8500_PIN_U17, "GPIO10_U17"),
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PINCTRL_PIN(AB8500_PIN_AA18, "GPIO11_AA18"),
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PINCTRL_PIN(AB8500_PIN_U16, "GPIO12_U16"),
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PINCTRL_PIN(AB8500_PIN_W17, "GPIO13_W17"),
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PINCTRL_PIN(AB8500_PIN_F14, "GPIO14_F14"),
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PINCTRL_PIN(AB8500_PIN_B17, "GPIO15_B17"),
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PINCTRL_PIN(AB8500_PIN_F15, "GPIO16_F15"),
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PINCTRL_PIN(AB8500_PIN_P5, "GPIO17_P5"),
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PINCTRL_PIN(AB8500_PIN_R5, "GPIO18_R5"),
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PINCTRL_PIN(AB8500_PIN_U5, "GPIO19_U5"),
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PINCTRL_PIN(AB8500_PIN_T5, "GPIO20_T5"),
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PINCTRL_PIN(AB8500_PIN_H19, "GPIO21_H19"),
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PINCTRL_PIN(AB8500_PIN_G20, "GPIO22_G20"),
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PINCTRL_PIN(AB8500_PIN_G19, "GPIO23_G19"),
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PINCTRL_PIN(AB8500_PIN_T14, "GPIO24_T14"),
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PINCTRL_PIN(AB8500_PIN_R16, "GPIO25_R16"),
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PINCTRL_PIN(AB8500_PIN_M16, "GPIO26_M16"),
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PINCTRL_PIN(AB8500_PIN_J6, "GPIO27_J6"),
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PINCTRL_PIN(AB8500_PIN_K6, "GPIO28_K6"),
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PINCTRL_PIN(AB8500_PIN_G6, "GPIO29_G6"),
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PINCTRL_PIN(AB8500_PIN_H6, "GPIO30_H6"),
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PINCTRL_PIN(AB8500_PIN_F5, "GPIO31_F5"),
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PINCTRL_PIN(AB8500_PIN_G5, "GPIO32_G5"),
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/* hole */
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PINCTRL_PIN(AB8500_PIN_R17, "GPIO34_R17"),
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PINCTRL_PIN(AB8500_PIN_W15, "GPIO35_W15"),
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PINCTRL_PIN(AB8500_PIN_A17, "GPIO36_A17"),
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PINCTRL_PIN(AB8500_PIN_E15, "GPIO37_E15"),
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PINCTRL_PIN(AB8500_PIN_C17, "GPIO38_C17"),
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PINCTRL_PIN(AB8500_PIN_E16, "GPIO39_E16"),
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PINCTRL_PIN(AB8500_PIN_T19, "GPIO40_T19"),
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PINCTRL_PIN(AB8500_PIN_U19, "GPIO41_U19"),
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PINCTRL_PIN(AB8500_PIN_U2, "GPIO42_U2"),
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};
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/*
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* Maps local GPIO offsets to local pin numbers
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*/
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static const struct abx500_pinrange ab8500_pinranges[] = {
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ABX500_PINRANGE(1, 4, ABX500_ALT_A),
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ABX500_PINRANGE(6, 4, ABX500_ALT_A),
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ABX500_PINRANGE(10, 4, ABX500_DEFAULT),
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ABX500_PINRANGE(14, 12, ABX500_ALT_A),
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ABX500_PINRANGE(26, 1, ABX500_DEFAULT),
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ABX500_PINRANGE(27, 6, ABX500_ALT_A),
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ABX500_PINRANGE(34, 1, ABX500_ALT_A),
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ABX500_PINRANGE(35, 1, ABX500_DEFAULT),
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ABX500_PINRANGE(36, 7, ABX500_ALT_A),
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};
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/*
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* Read the pin group names like this:
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* sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
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*
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* The groups are arranged as sets per altfunction column, so we can
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* mux in one group at a time by selecting the same altfunction for them
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* all. When functions require pins on different altfunctions, you need
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* to combine several groups.
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*/
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/* default column */
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static const unsigned sysclkreq2_d_1_pins[] = { AB8500_PIN_T10 };
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static const unsigned sysclkreq3_d_1_pins[] = { AB8500_PIN_T9 };
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static const unsigned sysclkreq4_d_1_pins[] = { AB8500_PIN_U9 };
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static const unsigned sysclkreq6_d_1_pins[] = { AB8500_PIN_W2 };
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static const unsigned ycbcr0123_d_1_pins[] = { AB8500_PIN_Y18, AB8500_PIN_AA20,
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AB8500_PIN_W18, AB8500_PIN_AA19};
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static const unsigned gpio10_d_1_pins[] = { AB8500_PIN_U17 };
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static const unsigned gpio11_d_1_pins[] = { AB8500_PIN_AA18 };
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static const unsigned gpio12_d_1_pins[] = { AB8500_PIN_U16 };
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static const unsigned gpio13_d_1_pins[] = { AB8500_PIN_W17 };
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static const unsigned pwmout1_d_1_pins[] = { AB8500_PIN_F14 };
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static const unsigned pwmout2_d_1_pins[] = { AB8500_PIN_B17 };
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static const unsigned pwmout3_d_1_pins[] = { AB8500_PIN_F15 };
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/* audio data interface 1*/
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static const unsigned adi1_d_1_pins[] = { AB8500_PIN_P5, AB8500_PIN_R5,
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AB8500_PIN_U5, AB8500_PIN_T5 };
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/* USBUICC */
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static const unsigned usbuicc_d_1_pins[] = { AB8500_PIN_H19, AB8500_PIN_G20,
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AB8500_PIN_G19 };
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static const unsigned sysclkreq7_d_1_pins[] = { AB8500_PIN_T14 };
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static const unsigned sysclkreq8_d_1_pins[] = { AB8500_PIN_R16 };
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static const unsigned gpio26_d_1_pins[] = { AB8500_PIN_M16 };
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/* Digital microphone 1 and 2 */
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static const unsigned dmic12_d_1_pins[] = { AB8500_PIN_J6, AB8500_PIN_K6 };
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/* Digital microphone 3 and 4 */
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static const unsigned dmic34_d_1_pins[] = { AB8500_PIN_G6, AB8500_PIN_H6 };
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/* Digital microphone 5 and 6 */
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static const unsigned dmic56_d_1_pins[] = { AB8500_PIN_F5, AB8500_PIN_G5 };
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static const unsigned extcpena_d_1_pins[] = { AB8500_PIN_R17 };
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static const unsigned gpio35_d_1_pins[] = { AB8500_PIN_W15 };
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/* APE SPI */
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static const unsigned apespi_d_1_pins[] = { AB8500_PIN_A17, AB8500_PIN_E15,
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AB8500_PIN_C17, AB8500_PIN_E16};
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/* modem SDA/SCL */
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static const unsigned modsclsda_d_1_pins[] = { AB8500_PIN_T19, AB8500_PIN_U19 };
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static const unsigned sysclkreq5_d_1_pins[] = { AB8500_PIN_U2 };
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/* Altfunction A column */
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static const unsigned gpio1_a_1_pins[] = { AB8500_PIN_T10 };
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static const unsigned gpio2_a_1_pins[] = { AB8500_PIN_T9 };
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static const unsigned gpio3_a_1_pins[] = { AB8500_PIN_U9 };
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static const unsigned gpio4_a_1_pins[] = { AB8500_PIN_W2 };
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static const unsigned gpio6_a_1_pins[] = { AB8500_PIN_Y18 };
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static const unsigned gpio7_a_1_pins[] = { AB8500_PIN_AA20 };
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static const unsigned gpio8_a_1_pins[] = { AB8500_PIN_W18 };
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static const unsigned gpio9_a_1_pins[] = { AB8500_PIN_AA19 };
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/* YCbCr4 YCbCr5 YCbCr6 YCbCr7*/
|
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static const unsigned ycbcr4567_a_1_pins[] = { AB8500_PIN_U17, AB8500_PIN_AA18,
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AB8500_PIN_U16, AB8500_PIN_W17};
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static const unsigned gpio14_a_1_pins[] = { AB8500_PIN_F14 };
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static const unsigned gpio15_a_1_pins[] = { AB8500_PIN_B17 };
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static const unsigned gpio16_a_1_pins[] = { AB8500_PIN_F15 };
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static const unsigned gpio17_a_1_pins[] = { AB8500_PIN_P5 };
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static const unsigned gpio18_a_1_pins[] = { AB8500_PIN_R5 };
|
||||
static const unsigned gpio19_a_1_pins[] = { AB8500_PIN_U5 };
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static const unsigned gpio20_a_1_pins[] = { AB8500_PIN_T5 };
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static const unsigned gpio21_a_1_pins[] = { AB8500_PIN_H19 };
|
||||
static const unsigned gpio22_a_1_pins[] = { AB8500_PIN_G20 };
|
||||
static const unsigned gpio23_a_1_pins[] = { AB8500_PIN_G19 };
|
||||
static const unsigned gpio24_a_1_pins[] = { AB8500_PIN_T14 };
|
||||
static const unsigned gpio25_a_1_pins[] = { AB8500_PIN_R16 };
|
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static const unsigned gpio27_a_1_pins[] = { AB8500_PIN_J6 };
|
||||
static const unsigned gpio28_a_1_pins[] = { AB8500_PIN_K6 };
|
||||
static const unsigned gpio29_a_1_pins[] = { AB8500_PIN_G6 };
|
||||
static const unsigned gpio30_a_1_pins[] = { AB8500_PIN_H6 };
|
||||
static const unsigned gpio31_a_1_pins[] = { AB8500_PIN_F5 };
|
||||
static const unsigned gpio32_a_1_pins[] = { AB8500_PIN_G5 };
|
||||
static const unsigned gpio34_a_1_pins[] = { AB8500_PIN_R17 };
|
||||
static const unsigned gpio36_a_1_pins[] = { AB8500_PIN_A17 };
|
||||
static const unsigned gpio37_a_1_pins[] = { AB8500_PIN_E15 };
|
||||
static const unsigned gpio38_a_1_pins[] = { AB8500_PIN_C17 };
|
||||
static const unsigned gpio39_a_1_pins[] = { AB8500_PIN_E16 };
|
||||
static const unsigned gpio40_a_1_pins[] = { AB8500_PIN_T19 };
|
||||
static const unsigned gpio41_a_1_pins[] = { AB8500_PIN_U19 };
|
||||
static const unsigned gpio42_a_1_pins[] = { AB8500_PIN_U2 };
|
||||
|
||||
/* Altfunction B colum */
|
||||
static const unsigned hiqclkena_b_1_pins[] = { AB8500_PIN_U17 };
|
||||
static const unsigned usbuiccpd_b_1_pins[] = { AB8500_PIN_AA18 };
|
||||
static const unsigned i2ctrig1_b_1_pins[] = { AB8500_PIN_U16 };
|
||||
static const unsigned i2ctrig2_b_1_pins[] = { AB8500_PIN_W17 };
|
||||
|
||||
/* Altfunction C column */
|
||||
static const unsigned usbvdat_c_1_pins[] = { AB8500_PIN_W17 };
|
||||
|
||||
|
||||
#define AB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
|
||||
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
|
||||
|
||||
static const struct abx500_pingroup ab8500_groups[] = {
|
||||
/* default column */
|
||||
AB8500_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
|
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AB8500_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
|
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AB8500_PIN_GROUP(ycbcr0123_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(gpio12_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
|
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AB8500_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(gpio26_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(gpio35_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(apespi_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
|
||||
AB8500_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
|
||||
/* Altfunction A column */
|
||||
AB8500_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio6_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio7_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio8_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio9_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(ycbcr4567_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio21_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio22_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio23_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio24_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio25_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio36_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio37_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio38_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio39_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
|
||||
AB8500_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
|
||||
/* Altfunction B column */
|
||||
AB8500_PIN_GROUP(hiqclkena_b_1, ABX500_ALT_B),
|
||||
AB8500_PIN_GROUP(usbuiccpd_b_1, ABX500_ALT_B),
|
||||
AB8500_PIN_GROUP(i2ctrig1_b_1, ABX500_ALT_B),
|
||||
AB8500_PIN_GROUP(i2ctrig2_b_1, ABX500_ALT_B),
|
||||
/* Altfunction C column */
|
||||
AB8500_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
|
||||
};
|
||||
|
||||
/* We use this macro to define the groups applicable to a function */
|
||||
#define AB8500_FUNC_GROUPS(a, b...) \
|
||||
static const char * const a##_groups[] = { b };
|
||||
|
||||
AB8500_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
|
||||
"sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1",
|
||||
"sysclkreq7_d_1", "sysclkreq8_d_1");
|
||||
AB8500_FUNC_GROUPS(ycbcr, "ycbcr0123_d_1", "ycbcr4567_a_1");
|
||||
AB8500_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
|
||||
"gpio6_a_1", "gpio7_a_1", "gpio8_a_1", "gpio9_a_1",
|
||||
"gpio10_d_1", "gpio11_d_1", "gpio12_d_1", "gpio13_d_1",
|
||||
"gpio14_a_1", "gpio15_a_1", "gpio16_a_1", "gpio17_a_1",
|
||||
"gpio18_a_1", "gpio19_a_1", "gpio20_a_1", "gpio21_a_1",
|
||||
"gpio22_a_1", "gpio23_a_1", "gpio24_a_1", "gpio25_a_1",
|
||||
"gpio26_d_1", "gpio27_a_1", "gpio28_a_1", "gpio29_a_1",
|
||||
"gpio30_a_1", "gpio31_a_1", "gpio32_a_1", "gpio34_a_1",
|
||||
"gpio35_d_1", "gpio36_a_1", "gpio37_a_1", "gpio38_a_1",
|
||||
"gpio39_a_1", "gpio40_a_1", "gpio41_a_1", "gpio42_a_1");
|
||||
AB8500_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
|
||||
AB8500_FUNC_GROUPS(adi1, "adi1_d_1");
|
||||
AB8500_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_b_1");
|
||||
AB8500_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
|
||||
AB8500_FUNC_GROUPS(extcpena, "extcpena_d_1");
|
||||
AB8500_FUNC_GROUPS(apespi, "apespi_d_1");
|
||||
AB8500_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
|
||||
AB8500_FUNC_GROUPS(hiqclkena, "hiqclkena_b_1");
|
||||
AB8500_FUNC_GROUPS(i2ctrig, "i2ctrig1_b_1", "i2ctrig2_b_1");
|
||||
AB8500_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct abx500_function ab8500_functions[] = {
|
||||
FUNCTION(sysclkreq),
|
||||
FUNCTION(ycbcr),
|
||||
FUNCTION(gpio),
|
||||
FUNCTION(pwmout),
|
||||
FUNCTION(adi1),
|
||||
FUNCTION(usbuicc),
|
||||
FUNCTION(dmic),
|
||||
FUNCTION(extcpena),
|
||||
FUNCTION(apespi),
|
||||
FUNCTION(modsclsda),
|
||||
FUNCTION(hiqclkena),
|
||||
FUNCTION(i2ctrig),
|
||||
FUNCTION(usbvdat),
|
||||
};
|
||||
|
||||
/*
|
||||
* this table translates what's is in the AB8500 specification regarding the
|
||||
* balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
|
||||
* ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
|
||||
* ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
|
||||
*
|
||||
* example :
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(13, 4, 3, 4, 0, 1 ,2),
|
||||
* means that pin AB8500_PIN_W17 (pin 13) supports 4 mux (default/ALT_A,
|
||||
* ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
|
||||
* select the mux. ALTA, ALTB and ALTC val indicates values to write in
|
||||
* ALTERNATFUNC register. We need to specifies these values as SOC
|
||||
* designers didn't apply the same logic on how to select mux in the
|
||||
* ABx500 family.
|
||||
*
|
||||
* As this pins supports at least ALT_B mux, default mux is
|
||||
* selected by writing 1 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
|
||||
* default | 1 | 0 | 0
|
||||
* alt_A | 0 | 0 | 0
|
||||
* alt_B | 0 | 0 | 1
|
||||
* alt_C | 0 | 1 | 0
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(8, 7, UNUSED, UNUSED),
|
||||
* means that pin AB8500_PIN_W18 (pin 8) supports 2 mux, so only GPIOSEL
|
||||
* register is used to select the mux. As this pins doesn't support at
|
||||
* least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=7 | alternatfunc bit2= | alternatfunc bit1=
|
||||
* default | 0 | 0 | 0
|
||||
* alt_A | 1 | 0 | 0
|
||||
*/
|
||||
|
||||
static struct
|
||||
alternate_functions ab8500_alternate_functions[AB8500_GPIO_MAX_NUMBER + 1] = {
|
||||
ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
|
||||
ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
|
||||
ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
|
||||
/* bit 4 reserved */
|
||||
ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
|
||||
ALTERNATE_FUNCTIONS(6, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO6, altA controlled by bit 5*/
|
||||
ALTERNATE_FUNCTIONS(7, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO7, altA controlled by bit 6*/
|
||||
ALTERNATE_FUNCTIONS(8, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO8, altA controlled by bit 7*/
|
||||
|
||||
ALTERNATE_FUNCTIONS(9, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO9, altA controlled by bit 0*/
|
||||
ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 0, 1, 0), /* GPIO10, altA and altB controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 1, 0), /* GPIO11, altA and altB controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(12, 3, 2, UNUSED, 0, 1, 0), /* GPIO12, altA and altB controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(13, 4, 3, 4, 0, 1, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
|
||||
ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
|
||||
/*
|
||||
* pins 17 to 20 are special case, only bit 0 is used to select
|
||||
* alternate function for these 4 pins.
|
||||
* bits 1 to 3 are reserved
|
||||
*/
|
||||
ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(21, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(22, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(23, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(24, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */
|
||||
|
||||
ALTERNATE_FUNCTIONS(25, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */
|
||||
/* pin 26 special case, no alternate function, bit 1 reserved */
|
||||
ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* GPIO26 */
|
||||
ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
|
||||
|
||||
ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
|
||||
ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
|
||||
/* pin 35 special case, no alternate function, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* GPIO35 */
|
||||
ALTERNATE_FUNCTIONS(36, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO36, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(37, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO37, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(38, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO38, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(39, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO39, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */
|
||||
|
||||
ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
|
||||
};
|
||||
|
||||
/*
|
||||
* Only some GPIOs are interrupt capable, and they are
|
||||
* organized in discontiguous clusters:
|
||||
*
|
||||
* GPIO6 to GPIO13
|
||||
* GPIO24 and GPIO25
|
||||
* GPIO36 to GPIO41
|
||||
*/
|
||||
static struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = {
|
||||
GPIO_IRQ_CLUSTER(6, 13, AB8500_INT_GPIO6R),
|
||||
GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
|
||||
GPIO_IRQ_CLUSTER(36, 41, AB8500_INT_GPIO36R),
|
||||
};
|
||||
|
||||
static struct abx500_pinctrl_soc_data ab8500_soc = {
|
||||
.gpio_ranges = ab8500_pinranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(ab8500_pinranges),
|
||||
.pins = ab8500_pins,
|
||||
.npins = ARRAY_SIZE(ab8500_pins),
|
||||
.functions = ab8500_functions,
|
||||
.nfunctions = ARRAY_SIZE(ab8500_functions),
|
||||
.groups = ab8500_groups,
|
||||
.ngroups = ARRAY_SIZE(ab8500_groups),
|
||||
.alternate_functions = ab8500_alternate_functions,
|
||||
.gpio_irq_cluster = ab8500_gpio_irq_cluster,
|
||||
.ngpio_irq_cluster = ARRAY_SIZE(ab8500_gpio_irq_cluster),
|
||||
.irq_gpio_rising_offset = AB8500_INT_GPIO6R,
|
||||
.irq_gpio_falling_offset = AB8500_INT_GPIO6F,
|
||||
.irq_gpio_factor = 1,
|
||||
};
|
||||
|
||||
void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &ab8500_soc;
|
||||
}
|
||||
381
drivers/pinctrl/nomadik/pinctrl-ab8505.c
Normal file
381
drivers/pinctrl/nomadik/pinctrl-ab8505.c
Normal file
|
|
@ -0,0 +1,381 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2012
|
||||
*
|
||||
* Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/mfd/abx500/ab8500.h>
|
||||
#include "pinctrl-abx500.h"
|
||||
|
||||
/* All the pins that can be used for GPIO and some other functions */
|
||||
#define ABX500_GPIO(offset) (offset)
|
||||
|
||||
#define AB8505_PIN_N4 ABX500_GPIO(1)
|
||||
#define AB8505_PIN_R5 ABX500_GPIO(2)
|
||||
#define AB8505_PIN_P5 ABX500_GPIO(3)
|
||||
/* hole */
|
||||
#define AB8505_PIN_B16 ABX500_GPIO(10)
|
||||
#define AB8505_PIN_B17 ABX500_GPIO(11)
|
||||
/* hole */
|
||||
#define AB8505_PIN_D17 ABX500_GPIO(13)
|
||||
#define AB8505_PIN_C16 ABX500_GPIO(14)
|
||||
/* hole */
|
||||
#define AB8505_PIN_P2 ABX500_GPIO(17)
|
||||
#define AB8505_PIN_N3 ABX500_GPIO(18)
|
||||
#define AB8505_PIN_T1 ABX500_GPIO(19)
|
||||
#define AB8505_PIN_P3 ABX500_GPIO(20)
|
||||
/* hole */
|
||||
#define AB8505_PIN_H14 ABX500_GPIO(34)
|
||||
/* hole */
|
||||
#define AB8505_PIN_J15 ABX500_GPIO(40)
|
||||
#define AB8505_PIN_J14 ABX500_GPIO(41)
|
||||
/* hole */
|
||||
#define AB8505_PIN_L4 ABX500_GPIO(50)
|
||||
/* hole */
|
||||
#define AB8505_PIN_D16 ABX500_GPIO(52)
|
||||
#define AB8505_PIN_D15 ABX500_GPIO(53)
|
||||
|
||||
/* indicates the higher GPIO number */
|
||||
#define AB8505_GPIO_MAX_NUMBER 53
|
||||
|
||||
/*
|
||||
* The names of the pins are denoted by GPIO number and ball name, even
|
||||
* though they can be used for other things than GPIO, this is the first
|
||||
* column in the table of the data sheet and often used on schematics and
|
||||
* such.
|
||||
*/
|
||||
static const struct pinctrl_pin_desc ab8505_pins[] = {
|
||||
PINCTRL_PIN(AB8505_PIN_N4, "GPIO1_N4"),
|
||||
PINCTRL_PIN(AB8505_PIN_R5, "GPIO2_R5"),
|
||||
PINCTRL_PIN(AB8505_PIN_P5, "GPIO3_P5"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_B16, "GPIO10_B16"),
|
||||
PINCTRL_PIN(AB8505_PIN_B17, "GPIO11_B17"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_D17, "GPIO13_D17"),
|
||||
PINCTRL_PIN(AB8505_PIN_C16, "GPIO14_C16"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_P2, "GPIO17_P2"),
|
||||
PINCTRL_PIN(AB8505_PIN_N3, "GPIO18_N3"),
|
||||
PINCTRL_PIN(AB8505_PIN_T1, "GPIO19_T1"),
|
||||
PINCTRL_PIN(AB8505_PIN_P3, "GPIO20_P3"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"),
|
||||
PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"),
|
||||
PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"),
|
||||
};
|
||||
|
||||
/*
|
||||
* Maps local GPIO offsets to local pin numbers
|
||||
*/
|
||||
static const struct abx500_pinrange ab8505_pinranges[] = {
|
||||
ABX500_PINRANGE(1, 3, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(14, 1, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(17, 4, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(34, 1, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(40, 2, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(52, 2, ABX500_ALT_A),
|
||||
};
|
||||
|
||||
/*
|
||||
* Read the pin group names like this:
|
||||
* sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
|
||||
*
|
||||
* The groups are arranged as sets per altfunction column, so we can
|
||||
* mux in one group at a time by selecting the same altfunction for them
|
||||
* all. When functions require pins on different altfunctions, you need
|
||||
* to combine several groups.
|
||||
*/
|
||||
|
||||
/* default column */
|
||||
static const unsigned sysclkreq2_d_1_pins[] = { AB8505_PIN_N4 };
|
||||
static const unsigned sysclkreq3_d_1_pins[] = { AB8505_PIN_R5 };
|
||||
static const unsigned sysclkreq4_d_1_pins[] = { AB8505_PIN_P5 };
|
||||
static const unsigned gpio10_d_1_pins[] = { AB8505_PIN_B16 };
|
||||
static const unsigned gpio11_d_1_pins[] = { AB8505_PIN_B17 };
|
||||
static const unsigned gpio13_d_1_pins[] = { AB8505_PIN_D17 };
|
||||
static const unsigned pwmout1_d_1_pins[] = { AB8505_PIN_C16 };
|
||||
/* audio data interface 2*/
|
||||
static const unsigned adi2_d_1_pins[] = { AB8505_PIN_P2, AB8505_PIN_N3,
|
||||
AB8505_PIN_T1, AB8505_PIN_P3 };
|
||||
static const unsigned extcpena_d_1_pins[] = { AB8505_PIN_H14 };
|
||||
/* modem SDA/SCL */
|
||||
static const unsigned modsclsda_d_1_pins[] = { AB8505_PIN_J15, AB8505_PIN_J14 };
|
||||
static const unsigned gpio50_d_1_pins[] = { AB8505_PIN_L4 };
|
||||
static const unsigned resethw_d_1_pins[] = { AB8505_PIN_D16 };
|
||||
static const unsigned service_d_1_pins[] = { AB8505_PIN_D15 };
|
||||
|
||||
/* Altfunction A column */
|
||||
static const unsigned gpio1_a_1_pins[] = { AB8505_PIN_N4 };
|
||||
static const unsigned gpio2_a_1_pins[] = { AB8505_PIN_R5 };
|
||||
static const unsigned gpio3_a_1_pins[] = { AB8505_PIN_P5 };
|
||||
static const unsigned hiqclkena_a_1_pins[] = { AB8505_PIN_B16 };
|
||||
static const unsigned pdmclk_a_1_pins[] = { AB8505_PIN_B17 };
|
||||
static const unsigned uarttxdata_a_1_pins[] = { AB8505_PIN_D17 };
|
||||
static const unsigned gpio14_a_1_pins[] = { AB8505_PIN_C16 };
|
||||
static const unsigned gpio17_a_1_pins[] = { AB8505_PIN_P2 };
|
||||
static const unsigned gpio18_a_1_pins[] = { AB8505_PIN_N3 };
|
||||
static const unsigned gpio19_a_1_pins[] = { AB8505_PIN_T1 };
|
||||
static const unsigned gpio20_a_1_pins[] = { AB8505_PIN_P3 };
|
||||
static const unsigned gpio34_a_1_pins[] = { AB8505_PIN_H14 };
|
||||
static const unsigned gpio40_a_1_pins[] = { AB8505_PIN_J15 };
|
||||
static const unsigned gpio41_a_1_pins[] = { AB8505_PIN_J14 };
|
||||
static const unsigned uartrxdata_a_1_pins[] = { AB8505_PIN_J14 };
|
||||
static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 };
|
||||
static const unsigned gpio52_a_1_pins[] = { AB8505_PIN_D16 };
|
||||
static const unsigned gpio53_a_1_pins[] = { AB8505_PIN_D15 };
|
||||
|
||||
/* Altfunction B colum */
|
||||
static const unsigned pdmdata_b_1_pins[] = { AB8505_PIN_B16 };
|
||||
static const unsigned extvibrapwm1_b_1_pins[] = { AB8505_PIN_D17 };
|
||||
static const unsigned extvibrapwm2_b_1_pins[] = { AB8505_PIN_L4 };
|
||||
|
||||
/* Altfunction C column */
|
||||
static const unsigned usbvdat_c_1_pins[] = { AB8505_PIN_D17 };
|
||||
|
||||
#define AB8505_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
|
||||
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
|
||||
|
||||
static const struct abx500_pingroup ab8505_groups[] = {
|
||||
AB8505_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(adi2_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(service_d_1, ABX500_DEFAULT),
|
||||
AB8505_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(uarttxdata_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(uartrxdata_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
|
||||
AB8505_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
|
||||
AB8505_PIN_GROUP(extvibrapwm1_b_1, ABX500_ALT_B),
|
||||
AB8505_PIN_GROUP(extvibrapwm2_b_1, ABX500_ALT_B),
|
||||
AB8505_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
|
||||
};
|
||||
|
||||
/* We use this macro to define the groups applicable to a function */
|
||||
#define AB8505_FUNC_GROUPS(a, b...) \
|
||||
static const char * const a##_groups[] = { b };
|
||||
|
||||
AB8505_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
|
||||
"sysclkreq4_d_1");
|
||||
AB8505_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1",
|
||||
"gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
|
||||
"gpio17_a_1", "gpio18_a_1", "gpio19_a_1", "gpio20_a_1",
|
||||
"gpio34_a_1", "gpio40_a_1", "gpio41_a_1", "gpio50_d_1",
|
||||
"gpio52_a_1", "gpio53_a_1");
|
||||
AB8505_FUNC_GROUPS(pwmout, "pwmout1_d_1");
|
||||
AB8505_FUNC_GROUPS(adi2, "adi2_d_1");
|
||||
AB8505_FUNC_GROUPS(extcpena, "extcpena_d_1");
|
||||
AB8505_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
|
||||
AB8505_FUNC_GROUPS(resethw, "resethw_d_1");
|
||||
AB8505_FUNC_GROUPS(service, "service_d_1");
|
||||
AB8505_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
|
||||
AB8505_FUNC_GROUPS(pdm, "pdmclk_a_1", "pdmdata_b_1");
|
||||
AB8505_FUNC_GROUPS(uartdata, "uarttxdata_a_1", "uartrxdata_a_1");
|
||||
AB8505_FUNC_GROUPS(extvibra, "extvibrapwm1_b_1", "extvibrapwm2_b_1");
|
||||
AB8505_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct abx500_function ab8505_functions[] = {
|
||||
FUNCTION(sysclkreq),
|
||||
FUNCTION(gpio),
|
||||
FUNCTION(pwmout),
|
||||
FUNCTION(adi2),
|
||||
FUNCTION(extcpena),
|
||||
FUNCTION(modsclsda),
|
||||
FUNCTION(resethw),
|
||||
FUNCTION(service),
|
||||
FUNCTION(hiqclkena),
|
||||
FUNCTION(pdm),
|
||||
FUNCTION(uartdata),
|
||||
FUNCTION(extvibra),
|
||||
FUNCTION(extvibra),
|
||||
FUNCTION(usbvdat),
|
||||
};
|
||||
|
||||
/*
|
||||
* this table translates what's is in the AB8505 specification regarding the
|
||||
* balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
|
||||
* ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
|
||||
* ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
|
||||
*
|
||||
* example :
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2),
|
||||
* means that pin AB8505_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
|
||||
* ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
|
||||
* select the mux. ALTA, ALTB and ALTC val indicates values to write in
|
||||
* ALTERNATFUNC register. We need to specifies these values as SOC
|
||||
* designers didn't apply the same logic on how to select mux in the
|
||||
* ABx500 family.
|
||||
*
|
||||
* As this pins supports at least ALT_B mux, default mux is
|
||||
* selected by writing 1 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
|
||||
* default | 1 | 0 | 0
|
||||
* alt_A | 0 | 0 | 1
|
||||
* alt_B | 0 | 0 | 0
|
||||
* alt_C | 0 | 1 | 0
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED),
|
||||
* means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
|
||||
* register is used to select the mux. As this pins doesn't support at
|
||||
* least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1=
|
||||
* default | 0 | 0 | 0
|
||||
* alt_A | 1 | 0 | 0
|
||||
*/
|
||||
|
||||
static struct
|
||||
alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = {
|
||||
ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
|
||||
ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
|
||||
ALTERNATE_FUNCTIONS(4, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO4, bit 3 reserved */
|
||||
ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5, bit 4 reserved */
|
||||
ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6, bit 5 reserved */
|
||||
ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7, bit 6 reserved */
|
||||
ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8, bit 7 reserved */
|
||||
|
||||
ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reseved */
|
||||
ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
|
||||
ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */
|
||||
ALTERNATE_FUNCTIONS(16, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 7 reserved */
|
||||
/*
|
||||
* pins 17 to 20 are special case, only bit 0 is used to select
|
||||
* alternate function for these 4 pins.
|
||||
* bits 1 to 3 are reserved
|
||||
*/
|
||||
ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21, bit 4 reserved */
|
||||
ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22, bit 5 reserved */
|
||||
ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23, bit 6 reserved */
|
||||
ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24, bit 7 reserved */
|
||||
|
||||
ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25, bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26, bit 1 reserved */
|
||||
ALTERNATE_FUNCTIONS(27, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO27, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(28, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO28, bit 3 reserved */
|
||||
ALTERNATE_FUNCTIONS(29, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO29, bit 4 reserved */
|
||||
ALTERNATE_FUNCTIONS(30, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO30, bit 5 reserved */
|
||||
ALTERNATE_FUNCTIONS(31, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO31, bit 6 reserved */
|
||||
ALTERNATE_FUNCTIONS(32, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO32, bit 7 reserved */
|
||||
|
||||
ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33, bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7*/
|
||||
|
||||
ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(42, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO42, bit 1 reserved */
|
||||
ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43, bit 2 reserved */
|
||||
ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44, bit 3 reserved */
|
||||
ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45, bit 4 reserved */
|
||||
ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46, bit 5 reserved */
|
||||
ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47, bit 6 reserved */
|
||||
ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48, bit 7 reserved */
|
||||
|
||||
ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(51, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
|
||||
};
|
||||
|
||||
/*
|
||||
* For AB8505 Only some GPIOs are interrupt capable, and they are
|
||||
* organized in discontiguous clusters:
|
||||
*
|
||||
* GPIO10 to GPIO11
|
||||
* GPIO13
|
||||
* GPIO40 and GPIO41
|
||||
* GPIO50
|
||||
* GPIO52 to GPIO53
|
||||
*/
|
||||
static struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = {
|
||||
GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R),
|
||||
GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R),
|
||||
GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
|
||||
GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R),
|
||||
GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R),
|
||||
};
|
||||
|
||||
static struct abx500_pinctrl_soc_data ab8505_soc = {
|
||||
.gpio_ranges = ab8505_pinranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges),
|
||||
.pins = ab8505_pins,
|
||||
.npins = ARRAY_SIZE(ab8505_pins),
|
||||
.functions = ab8505_functions,
|
||||
.nfunctions = ARRAY_SIZE(ab8505_functions),
|
||||
.groups = ab8505_groups,
|
||||
.ngroups = ARRAY_SIZE(ab8505_groups),
|
||||
.alternate_functions = ab8505_alternate_functions,
|
||||
.gpio_irq_cluster = ab8505_gpio_irq_cluster,
|
||||
.ngpio_irq_cluster = ARRAY_SIZE(ab8505_gpio_irq_cluster),
|
||||
.irq_gpio_rising_offset = AB8500_INT_GPIO6R,
|
||||
.irq_gpio_falling_offset = AB8500_INT_GPIO6F,
|
||||
.irq_gpio_factor = 1,
|
||||
};
|
||||
|
||||
void
|
||||
abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &ab8505_soc;
|
||||
}
|
||||
408
drivers/pinctrl/nomadik/pinctrl-ab8540.c
Normal file
408
drivers/pinctrl/nomadik/pinctrl-ab8540.c
Normal file
|
|
@ -0,0 +1,408 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2012
|
||||
*
|
||||
* Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/mfd/abx500/ab8500.h>
|
||||
#include "pinctrl-abx500.h"
|
||||
|
||||
/* All the pins that can be used for GPIO and some other functions */
|
||||
#define ABX500_GPIO(offset) (offset)
|
||||
|
||||
#define AB8540_PIN_J16 ABX500_GPIO(1)
|
||||
#define AB8540_PIN_D17 ABX500_GPIO(2)
|
||||
#define AB8540_PIN_C12 ABX500_GPIO(3)
|
||||
#define AB8540_PIN_G12 ABX500_GPIO(4)
|
||||
/* hole */
|
||||
#define AB8540_PIN_D16 ABX500_GPIO(14)
|
||||
#define AB8540_PIN_F15 ABX500_GPIO(15)
|
||||
#define AB8540_PIN_J8 ABX500_GPIO(16)
|
||||
#define AB8540_PIN_K16 ABX500_GPIO(17)
|
||||
#define AB8540_PIN_G15 ABX500_GPIO(18)
|
||||
#define AB8540_PIN_F17 ABX500_GPIO(19)
|
||||
#define AB8540_PIN_E17 ABX500_GPIO(20)
|
||||
/* hole */
|
||||
#define AB8540_PIN_AA16 ABX500_GPIO(27)
|
||||
#define AB8540_PIN_W18 ABX500_GPIO(28)
|
||||
#define AB8540_PIN_Y15 ABX500_GPIO(29)
|
||||
#define AB8540_PIN_W16 ABX500_GPIO(30)
|
||||
#define AB8540_PIN_V15 ABX500_GPIO(31)
|
||||
#define AB8540_PIN_W17 ABX500_GPIO(32)
|
||||
/* hole */
|
||||
#define AB8540_PIN_D12 ABX500_GPIO(42)
|
||||
#define AB8540_PIN_P4 ABX500_GPIO(43)
|
||||
#define AB8540_PIN_AB1 ABX500_GPIO(44)
|
||||
#define AB8540_PIN_K7 ABX500_GPIO(45)
|
||||
#define AB8540_PIN_L7 ABX500_GPIO(46)
|
||||
#define AB8540_PIN_G10 ABX500_GPIO(47)
|
||||
#define AB8540_PIN_K12 ABX500_GPIO(48)
|
||||
/* hole */
|
||||
#define AB8540_PIN_N8 ABX500_GPIO(51)
|
||||
#define AB8540_PIN_P12 ABX500_GPIO(52)
|
||||
#define AB8540_PIN_K8 ABX500_GPIO(53)
|
||||
#define AB8540_PIN_J11 ABX500_GPIO(54)
|
||||
#define AB8540_PIN_AC2 ABX500_GPIO(55)
|
||||
#define AB8540_PIN_AB2 ABX500_GPIO(56)
|
||||
|
||||
/* indicates the highest GPIO number */
|
||||
#define AB8540_GPIO_MAX_NUMBER 56
|
||||
|
||||
/*
|
||||
* The names of the pins are denoted by GPIO number and ball name, even
|
||||
* though they can be used for other things than GPIO, this is the first
|
||||
* column in the table of the data sheet and often used on schematics and
|
||||
* such.
|
||||
*/
|
||||
static const struct pinctrl_pin_desc ab8540_pins[] = {
|
||||
PINCTRL_PIN(AB8540_PIN_J16, "GPIO1_J16"),
|
||||
PINCTRL_PIN(AB8540_PIN_D17, "GPIO2_D17"),
|
||||
PINCTRL_PIN(AB8540_PIN_C12, "GPIO3_C12"),
|
||||
PINCTRL_PIN(AB8540_PIN_G12, "GPIO4_G12"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8540_PIN_D16, "GPIO14_D16"),
|
||||
PINCTRL_PIN(AB8540_PIN_F15, "GPIO15_F15"),
|
||||
PINCTRL_PIN(AB8540_PIN_J8, "GPIO16_J8"),
|
||||
PINCTRL_PIN(AB8540_PIN_K16, "GPIO17_K16"),
|
||||
PINCTRL_PIN(AB8540_PIN_G15, "GPIO18_G15"),
|
||||
PINCTRL_PIN(AB8540_PIN_F17, "GPIO19_F17"),
|
||||
PINCTRL_PIN(AB8540_PIN_E17, "GPIO20_E17"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8540_PIN_AA16, "GPIO27_AA16"),
|
||||
PINCTRL_PIN(AB8540_PIN_W18, "GPIO28_W18"),
|
||||
PINCTRL_PIN(AB8540_PIN_Y15, "GPIO29_Y15"),
|
||||
PINCTRL_PIN(AB8540_PIN_W16, "GPIO30_W16"),
|
||||
PINCTRL_PIN(AB8540_PIN_V15, "GPIO31_V15"),
|
||||
PINCTRL_PIN(AB8540_PIN_W17, "GPIO32_W17"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8540_PIN_D12, "GPIO42_D12"),
|
||||
PINCTRL_PIN(AB8540_PIN_P4, "GPIO43_P4"),
|
||||
PINCTRL_PIN(AB8540_PIN_AB1, "GPIO44_AB1"),
|
||||
PINCTRL_PIN(AB8540_PIN_K7, "GPIO45_K7"),
|
||||
PINCTRL_PIN(AB8540_PIN_L7, "GPIO46_L7"),
|
||||
PINCTRL_PIN(AB8540_PIN_G10, "GPIO47_G10"),
|
||||
PINCTRL_PIN(AB8540_PIN_K12, "GPIO48_K12"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB8540_PIN_N8, "GPIO51_N8"),
|
||||
PINCTRL_PIN(AB8540_PIN_P12, "GPIO52_P12"),
|
||||
PINCTRL_PIN(AB8540_PIN_K8, "GPIO53_K8"),
|
||||
PINCTRL_PIN(AB8540_PIN_J11, "GPIO54_J11"),
|
||||
PINCTRL_PIN(AB8540_PIN_AC2, "GPIO55_AC2"),
|
||||
PINCTRL_PIN(AB8540_PIN_AB2, "GPIO56_AB2"),
|
||||
};
|
||||
|
||||
/*
|
||||
* Maps local GPIO offsets to local pin numbers
|
||||
*/
|
||||
static const struct abx500_pinrange ab8540_pinranges[] = {
|
||||
ABX500_PINRANGE(1, 4, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(14, 7, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(27, 6, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(42, 7, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(51, 6, ABX500_ALT_A),
|
||||
};
|
||||
|
||||
/*
|
||||
* Read the pin group names like this:
|
||||
* sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
|
||||
*
|
||||
* The groups are arranged as sets per altfunction column, so we can
|
||||
* mux in one group at a time by selecting the same altfunction for them
|
||||
* all. When functions require pins on different altfunctions, you need
|
||||
* to combine several groups.
|
||||
*/
|
||||
|
||||
/* default column */
|
||||
static const unsigned sysclkreq2_d_1_pins[] = { AB8540_PIN_J16 };
|
||||
static const unsigned sysclkreq3_d_1_pins[] = { AB8540_PIN_D17 };
|
||||
static const unsigned sysclkreq4_d_1_pins[] = { AB8540_PIN_C12 };
|
||||
static const unsigned sysclkreq6_d_1_pins[] = { AB8540_PIN_G12 };
|
||||
static const unsigned pwmout1_d_1_pins[] = { AB8540_PIN_D16 };
|
||||
static const unsigned pwmout2_d_1_pins[] = { AB8540_PIN_F15 };
|
||||
static const unsigned pwmout3_d_1_pins[] = { AB8540_PIN_J8 };
|
||||
|
||||
/* audio data interface 1*/
|
||||
static const unsigned adi1_d_1_pins[] = { AB8540_PIN_K16, AB8540_PIN_G15,
|
||||
AB8540_PIN_F17, AB8540_PIN_E17 };
|
||||
/* Digital microphone 1 and 2 */
|
||||
static const unsigned dmic12_d_1_pins[] = { AB8540_PIN_AA16, AB8540_PIN_W18 };
|
||||
/* Digital microphone 3 and 4 */
|
||||
static const unsigned dmic34_d_1_pins[] = { AB8540_PIN_Y15, AB8540_PIN_W16 };
|
||||
/* Digital microphone 5 and 6 */
|
||||
static const unsigned dmic56_d_1_pins[] = { AB8540_PIN_V15, AB8540_PIN_W17 };
|
||||
static const unsigned sysclkreq5_d_1_pins[] = { AB8540_PIN_D12 };
|
||||
static const unsigned batremn_d_1_pins[] = { AB8540_PIN_P4 };
|
||||
static const unsigned service_d_1_pins[] = { AB8540_PIN_AB1 };
|
||||
static const unsigned pwrctrl0_d_1_pins[] = { AB8540_PIN_K7 };
|
||||
static const unsigned pwrctrl1_d_1_pins[] = { AB8540_PIN_L7 };
|
||||
static const unsigned pwmextvibra1_d_1_pins[] = { AB8540_PIN_G10 };
|
||||
static const unsigned pwmextvibra2_d_1_pins[] = { AB8540_PIN_K12 };
|
||||
static const unsigned gpio1_vbat_d_1_pins[] = { AB8540_PIN_N8 };
|
||||
static const unsigned gpio2_vbat_d_1_pins[] = { AB8540_PIN_P12 };
|
||||
static const unsigned gpio3_vbat_d_1_pins[] = { AB8540_PIN_K8 };
|
||||
static const unsigned gpio4_vbat_d_1_pins[] = { AB8540_PIN_J11 };
|
||||
static const unsigned pdmclkdat_d_1_pins[] = { AB8540_PIN_AC2, AB8540_PIN_AB2 };
|
||||
|
||||
/* Altfunction A column */
|
||||
static const unsigned gpio1_a_1_pins[] = { AB8540_PIN_J16 };
|
||||
static const unsigned gpio2_a_1_pins[] = { AB8540_PIN_D17 };
|
||||
static const unsigned gpio3_a_1_pins[] = { AB8540_PIN_C12 };
|
||||
static const unsigned gpio4_a_1_pins[] = { AB8540_PIN_G12 };
|
||||
static const unsigned gpio14_a_1_pins[] = { AB8540_PIN_D16 };
|
||||
static const unsigned gpio15_a_1_pins[] = { AB8540_PIN_F15 };
|
||||
static const unsigned gpio16_a_1_pins[] = { AB8540_PIN_J8 };
|
||||
static const unsigned gpio17_a_1_pins[] = { AB8540_PIN_K16 };
|
||||
static const unsigned gpio18_a_1_pins[] = { AB8540_PIN_G15 };
|
||||
static const unsigned gpio19_a_1_pins[] = { AB8540_PIN_F17 };
|
||||
static const unsigned gpio20_a_1_pins[] = { AB8540_PIN_E17 };
|
||||
static const unsigned gpio27_a_1_pins[] = { AB8540_PIN_AA16 };
|
||||
static const unsigned gpio28_a_1_pins[] = { AB8540_PIN_W18 };
|
||||
static const unsigned gpio29_a_1_pins[] = { AB8540_PIN_Y15 };
|
||||
static const unsigned gpio30_a_1_pins[] = { AB8540_PIN_W16 };
|
||||
static const unsigned gpio31_a_1_pins[] = { AB8540_PIN_V15 };
|
||||
static const unsigned gpio32_a_1_pins[] = { AB8540_PIN_W17 };
|
||||
static const unsigned gpio42_a_1_pins[] = { AB8540_PIN_D12 };
|
||||
static const unsigned gpio43_a_1_pins[] = { AB8540_PIN_P4 };
|
||||
static const unsigned gpio44_a_1_pins[] = { AB8540_PIN_AB1 };
|
||||
static const unsigned gpio45_a_1_pins[] = { AB8540_PIN_K7 };
|
||||
static const unsigned gpio46_a_1_pins[] = { AB8540_PIN_L7 };
|
||||
static const unsigned gpio47_a_1_pins[] = { AB8540_PIN_G10 };
|
||||
static const unsigned gpio48_a_1_pins[] = { AB8540_PIN_K12 };
|
||||
static const unsigned gpio51_a_1_pins[] = { AB8540_PIN_N8 };
|
||||
static const unsigned gpio52_a_1_pins[] = { AB8540_PIN_P12 };
|
||||
static const unsigned gpio53_a_1_pins[] = { AB8540_PIN_K8 };
|
||||
static const unsigned gpio54_a_1_pins[] = { AB8540_PIN_J11 };
|
||||
static const unsigned gpio55_a_1_pins[] = { AB8540_PIN_AC2 };
|
||||
static const unsigned gpio56_a_1_pins[] = { AB8540_PIN_AB2 };
|
||||
|
||||
#define AB8540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
|
||||
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
|
||||
|
||||
static const struct abx500_pingroup ab8540_groups[] = {
|
||||
/* default column */
|
||||
AB8540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwrctrl0_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwrctrl1_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwmextvibra1_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pwmextvibra2_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(gpio1_vbat_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(gpio2_vbat_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(gpio3_vbat_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(gpio4_vbat_d_1, ABX500_DEFAULT),
|
||||
AB8540_PIN_GROUP(pdmclkdat_d_1, ABX500_DEFAULT),
|
||||
/* Altfunction A column */
|
||||
AB8540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio43_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio44_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio45_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio46_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio47_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio48_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio54_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio55_a_1, ABX500_ALT_A),
|
||||
AB8540_PIN_GROUP(gpio56_a_1, ABX500_ALT_A),
|
||||
};
|
||||
|
||||
/* We use this macro to define the groups applicable to a function */
|
||||
#define AB8540_FUNC_GROUPS(a, b...) \
|
||||
static const char * const a##_groups[] = { b };
|
||||
|
||||
AB8540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
|
||||
"sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1");
|
||||
AB8540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
|
||||
"gpio14_a_1", "gpio15_a_1", "gpio16_a_1", "gpio17_a_1",
|
||||
"gpio18_a_1", "gpio19_a_1", "gpio20_a_1", "gpio27_a_1",
|
||||
"gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
|
||||
"gpio32_a_1", "gpio42_a_1", "gpio43_a_1", "gpio44_a_1",
|
||||
"gpio45_a_1", "gpio46_a_1", "gpio47_a_1", "gpio48_a_1",
|
||||
"gpio51_a_1", "gpio52_a_1", "gpio53_a_1", "gpio54_a_1",
|
||||
"gpio55_a_1", "gpio56_a_1");
|
||||
AB8540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
|
||||
AB8540_FUNC_GROUPS(adi1, "adi1_d_1");
|
||||
AB8540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
|
||||
AB8540_FUNC_GROUPS(batremn, "batremn_d_1");
|
||||
AB8540_FUNC_GROUPS(service, "service_d_1");
|
||||
AB8540_FUNC_GROUPS(pwrctrl, "pwrctrl0_d_1", "pwrctrl1_d_1");
|
||||
AB8540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_d_1", "pwmextvibra2_d_1");
|
||||
AB8540_FUNC_GROUPS(gpio_vbat, "gpio1_vbat_d_1", "gpio2_vbat_d_1",
|
||||
"gpio3_vbat_d_1", "gpio4_vbat_d_1");
|
||||
AB8540_FUNC_GROUPS(pdm, "pdmclkdat_d_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct abx500_function ab8540_functions[] = {
|
||||
FUNCTION(sysclkreq),
|
||||
FUNCTION(gpio),
|
||||
FUNCTION(pwmout),
|
||||
FUNCTION(adi1),
|
||||
FUNCTION(dmic),
|
||||
FUNCTION(batremn),
|
||||
FUNCTION(service),
|
||||
FUNCTION(pwrctrl),
|
||||
FUNCTION(pwmextvibra),
|
||||
FUNCTION(gpio_vbat),
|
||||
FUNCTION(pdm),
|
||||
};
|
||||
|
||||
/*
|
||||
* this table translates what's is in the AB8540 specification regarding the
|
||||
* balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
|
||||
* ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
|
||||
* ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
|
||||
* AB8540 only supports DEFAULT and ALTA functions, so ALTERNATFUNC
|
||||
* registers is not used
|
||||
*
|
||||
*/
|
||||
|
||||
static struct
|
||||
alternate_functions ab8540_alternate_functions[AB8540_GPIO_MAX_NUMBER + 1] = {
|
||||
/* GPIOSEL1 - bit 4-7 reserved */
|
||||
ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
|
||||
ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
|
||||
ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
|
||||
ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
|
||||
ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
|
||||
ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
|
||||
ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
|
||||
/* GPIOSEL2 - bit 0-4 reserved */
|
||||
ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
|
||||
ALTERNATE_FUNCTIONS(10, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO10 */
|
||||
ALTERNATE_FUNCTIONS(11, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO11 */
|
||||
ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
|
||||
ALTERNATE_FUNCTIONS(13, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO13 */
|
||||
ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
|
||||
/* GPIOSEL3 - bit 4-7 reserved */
|
||||
ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(18, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(19, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(20, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21 */
|
||||
ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22 */
|
||||
ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23 */
|
||||
ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24 */
|
||||
/* GPIOSEL4 - bit 0-1 reserved */
|
||||
ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25 */
|
||||
ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
|
||||
ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
|
||||
/* GPIOSEL5 - bit 0-7 reserved */
|
||||
ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
|
||||
ALTERNATE_FUNCTIONS(34, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO34 */
|
||||
ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
|
||||
ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
|
||||
ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
|
||||
ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
|
||||
ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
|
||||
ALTERNATE_FUNCTIONS(40, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO40 */
|
||||
/* GPIOSEL6 - bit 0 reserved */
|
||||
ALTERNATE_FUNCTIONS(41, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO41 */
|
||||
ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(43, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO43, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(44, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO44, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(45, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO45, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(46, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO46, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(47, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO47, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(48, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO48, altA controlled by bit 7 */
|
||||
/* GPIOSEL7 - bit 0-1 reserved */
|
||||
ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
|
||||
ALTERNATE_FUNCTIONS(50, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO50 */
|
||||
ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(55, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO55, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(56, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO56, altA controlled by bit 7 */
|
||||
};
|
||||
|
||||
static struct pullud ab8540_pullud = {
|
||||
.first_pin = 51, /* GPIO1_VBAT */
|
||||
.last_pin = 54, /* GPIO4_VBAT */
|
||||
};
|
||||
|
||||
/*
|
||||
* For AB8540 Only some GPIOs are interrupt capable:
|
||||
* GPIO43 to GPIO44
|
||||
* GPIO51 to GPIO54
|
||||
*/
|
||||
static struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = {
|
||||
GPIO_IRQ_CLUSTER(43, 43, AB8540_INT_GPIO43F),
|
||||
GPIO_IRQ_CLUSTER(44, 44, AB8540_INT_GPIO44F),
|
||||
GPIO_IRQ_CLUSTER(51, 54, AB9540_INT_GPIO51R),
|
||||
};
|
||||
|
||||
static struct abx500_pinctrl_soc_data ab8540_soc = {
|
||||
.gpio_ranges = ab8540_pinranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(ab8540_pinranges),
|
||||
.pins = ab8540_pins,
|
||||
.npins = ARRAY_SIZE(ab8540_pins),
|
||||
.functions = ab8540_functions,
|
||||
.nfunctions = ARRAY_SIZE(ab8540_functions),
|
||||
.groups = ab8540_groups,
|
||||
.ngroups = ARRAY_SIZE(ab8540_groups),
|
||||
.alternate_functions = ab8540_alternate_functions,
|
||||
.pullud = &ab8540_pullud,
|
||||
.gpio_irq_cluster = ab8540_gpio_irq_cluster,
|
||||
.ngpio_irq_cluster = ARRAY_SIZE(ab8540_gpio_irq_cluster),
|
||||
.irq_gpio_rising_offset = AB8540_INT_GPIO43R,
|
||||
.irq_gpio_falling_offset = AB8540_INT_GPIO43F,
|
||||
.irq_gpio_factor = 2,
|
||||
};
|
||||
|
||||
void
|
||||
abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &ab8540_soc;
|
||||
}
|
||||
486
drivers/pinctrl/nomadik/pinctrl-ab9540.c
Normal file
486
drivers/pinctrl/nomadik/pinctrl-ab9540.c
Normal file
|
|
@ -0,0 +1,486 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2012
|
||||
*
|
||||
* Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/mfd/abx500/ab8500.h>
|
||||
#include "pinctrl-abx500.h"
|
||||
|
||||
/* All the pins that can be used for GPIO and some other functions */
|
||||
#define ABX500_GPIO(offset) (offset)
|
||||
|
||||
#define AB9540_PIN_R4 ABX500_GPIO(1)
|
||||
#define AB9540_PIN_V3 ABX500_GPIO(2)
|
||||
#define AB9540_PIN_T4 ABX500_GPIO(3)
|
||||
#define AB9540_PIN_T5 ABX500_GPIO(4)
|
||||
/* hole */
|
||||
#define AB9540_PIN_B18 ABX500_GPIO(10)
|
||||
#define AB9540_PIN_C18 ABX500_GPIO(11)
|
||||
/* hole */
|
||||
#define AB9540_PIN_D18 ABX500_GPIO(13)
|
||||
#define AB9540_PIN_B19 ABX500_GPIO(14)
|
||||
#define AB9540_PIN_C19 ABX500_GPIO(15)
|
||||
#define AB9540_PIN_D19 ABX500_GPIO(16)
|
||||
#define AB9540_PIN_R3 ABX500_GPIO(17)
|
||||
#define AB9540_PIN_T2 ABX500_GPIO(18)
|
||||
#define AB9540_PIN_U2 ABX500_GPIO(19)
|
||||
#define AB9540_PIN_V2 ABX500_GPIO(20)
|
||||
#define AB9540_PIN_N17 ABX500_GPIO(21)
|
||||
#define AB9540_PIN_N16 ABX500_GPIO(22)
|
||||
#define AB9540_PIN_M19 ABX500_GPIO(23)
|
||||
#define AB9540_PIN_T3 ABX500_GPIO(24)
|
||||
#define AB9540_PIN_W2 ABX500_GPIO(25)
|
||||
/* hole */
|
||||
#define AB9540_PIN_H4 ABX500_GPIO(27)
|
||||
#define AB9540_PIN_F1 ABX500_GPIO(28)
|
||||
#define AB9540_PIN_F4 ABX500_GPIO(29)
|
||||
#define AB9540_PIN_F2 ABX500_GPIO(30)
|
||||
#define AB9540_PIN_E4 ABX500_GPIO(31)
|
||||
#define AB9540_PIN_F3 ABX500_GPIO(32)
|
||||
/* hole */
|
||||
#define AB9540_PIN_J13 ABX500_GPIO(34)
|
||||
/* hole */
|
||||
#define AB9540_PIN_L17 ABX500_GPIO(40)
|
||||
#define AB9540_PIN_L16 ABX500_GPIO(41)
|
||||
#define AB9540_PIN_W3 ABX500_GPIO(42)
|
||||
#define AB9540_PIN_N4 ABX500_GPIO(50)
|
||||
#define AB9540_PIN_G12 ABX500_GPIO(51)
|
||||
#define AB9540_PIN_E17 ABX500_GPIO(52)
|
||||
#define AB9540_PIN_D11 ABX500_GPIO(53)
|
||||
#define AB9540_PIN_M18 ABX500_GPIO(54)
|
||||
|
||||
/* indicates the highest GPIO number */
|
||||
#define AB9540_GPIO_MAX_NUMBER 54
|
||||
|
||||
/*
|
||||
* The names of the pins are denoted by GPIO number and ball name, even
|
||||
* though they can be used for other things than GPIO, this is the first
|
||||
* column in the table of the data sheet and often used on schematics and
|
||||
* such.
|
||||
*/
|
||||
static const struct pinctrl_pin_desc ab9540_pins[] = {
|
||||
PINCTRL_PIN(AB9540_PIN_R4, "GPIO1_R4"),
|
||||
PINCTRL_PIN(AB9540_PIN_V3, "GPIO2_V3"),
|
||||
PINCTRL_PIN(AB9540_PIN_T4, "GPIO3_T4"),
|
||||
PINCTRL_PIN(AB9540_PIN_T5, "GPIO4_T5"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_B18, "GPIO10_B18"),
|
||||
PINCTRL_PIN(AB9540_PIN_C18, "GPIO11_C18"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_D18, "GPIO13_D18"),
|
||||
PINCTRL_PIN(AB9540_PIN_B19, "GPIO14_B19"),
|
||||
PINCTRL_PIN(AB9540_PIN_C19, "GPIO15_C19"),
|
||||
PINCTRL_PIN(AB9540_PIN_D19, "GPIO16_D19"),
|
||||
PINCTRL_PIN(AB9540_PIN_R3, "GPIO17_R3"),
|
||||
PINCTRL_PIN(AB9540_PIN_T2, "GPIO18_T2"),
|
||||
PINCTRL_PIN(AB9540_PIN_U2, "GPIO19_U2"),
|
||||
PINCTRL_PIN(AB9540_PIN_V2, "GPIO20_V2"),
|
||||
PINCTRL_PIN(AB9540_PIN_N17, "GPIO21_N17"),
|
||||
PINCTRL_PIN(AB9540_PIN_N16, "GPIO22_N16"),
|
||||
PINCTRL_PIN(AB9540_PIN_M19, "GPIO23_M19"),
|
||||
PINCTRL_PIN(AB9540_PIN_T3, "GPIO24_T3"),
|
||||
PINCTRL_PIN(AB9540_PIN_W2, "GPIO25_W2"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_H4, "GPIO27_H4"),
|
||||
PINCTRL_PIN(AB9540_PIN_F1, "GPIO28_F1"),
|
||||
PINCTRL_PIN(AB9540_PIN_F4, "GPIO29_F4"),
|
||||
PINCTRL_PIN(AB9540_PIN_F2, "GPIO30_F2"),
|
||||
PINCTRL_PIN(AB9540_PIN_E4, "GPIO31_E4"),
|
||||
PINCTRL_PIN(AB9540_PIN_F3, "GPIO32_F3"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_J13, "GPIO34_J13"),
|
||||
/* hole */
|
||||
PINCTRL_PIN(AB9540_PIN_L17, "GPIO40_L17"),
|
||||
PINCTRL_PIN(AB9540_PIN_L16, "GPIO41_L16"),
|
||||
PINCTRL_PIN(AB9540_PIN_W3, "GPIO42_W3"),
|
||||
PINCTRL_PIN(AB9540_PIN_N4, "GPIO50_N4"),
|
||||
PINCTRL_PIN(AB9540_PIN_G12, "GPIO51_G12"),
|
||||
PINCTRL_PIN(AB9540_PIN_E17, "GPIO52_E17"),
|
||||
PINCTRL_PIN(AB9540_PIN_D11, "GPIO53_D11"),
|
||||
PINCTRL_PIN(AB9540_PIN_M18, "GPIO60_M18"),
|
||||
};
|
||||
|
||||
/*
|
||||
* Maps local GPIO offsets to local pin numbers
|
||||
*/
|
||||
static const struct abx500_pinrange ab9540_pinranges[] = {
|
||||
ABX500_PINRANGE(1, 4, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(14, 12, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(27, 6, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(34, 1, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(40, 3, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
|
||||
ABX500_PINRANGE(51, 3, ABX500_ALT_A),
|
||||
ABX500_PINRANGE(54, 1, ABX500_DEFAULT),
|
||||
};
|
||||
|
||||
/*
|
||||
* Read the pin group names like this:
|
||||
* sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
|
||||
*
|
||||
* The groups are arranged as sets per altfunction column, so we can
|
||||
* mux in one group at a time by selecting the same altfunction for them
|
||||
* all. When functions require pins on different altfunctions, you need
|
||||
* to combine several groups.
|
||||
*/
|
||||
|
||||
/* default column */
|
||||
static const unsigned sysclkreq2_d_1_pins[] = { AB9540_PIN_R4 };
|
||||
static const unsigned sysclkreq3_d_1_pins[] = { AB9540_PIN_V3 };
|
||||
static const unsigned sysclkreq4_d_1_pins[] = { AB9540_PIN_T4 };
|
||||
static const unsigned sysclkreq6_d_1_pins[] = { AB9540_PIN_T5 };
|
||||
static const unsigned gpio10_d_1_pins[] = { AB9540_PIN_B18 };
|
||||
static const unsigned gpio11_d_1_pins[] = { AB9540_PIN_C18 };
|
||||
static const unsigned gpio13_d_1_pins[] = { AB9540_PIN_D18 };
|
||||
static const unsigned pwmout1_d_1_pins[] = { AB9540_PIN_B19 };
|
||||
static const unsigned pwmout2_d_1_pins[] = { AB9540_PIN_C19 };
|
||||
static const unsigned pwmout3_d_1_pins[] = { AB9540_PIN_D19 };
|
||||
/* audio data interface 1*/
|
||||
static const unsigned adi1_d_1_pins[] = { AB9540_PIN_R3, AB9540_PIN_T2,
|
||||
AB9540_PIN_U2, AB9540_PIN_V2 };
|
||||
/* USBUICC */
|
||||
static const unsigned usbuicc_d_1_pins[] = { AB9540_PIN_N17, AB9540_PIN_N16,
|
||||
AB9540_PIN_M19 };
|
||||
static const unsigned sysclkreq7_d_1_pins[] = { AB9540_PIN_T3 };
|
||||
static const unsigned sysclkreq8_d_1_pins[] = { AB9540_PIN_W2 };
|
||||
/* Digital microphone 1 and 2 */
|
||||
static const unsigned dmic12_d_1_pins[] = { AB9540_PIN_H4, AB9540_PIN_F1 };
|
||||
/* Digital microphone 3 and 4 */
|
||||
static const unsigned dmic34_d_1_pins[] = { AB9540_PIN_F4, AB9540_PIN_F2 };
|
||||
/* Digital microphone 5 and 6 */
|
||||
static const unsigned dmic56_d_1_pins[] = { AB9540_PIN_E4, AB9540_PIN_F3 };
|
||||
static const unsigned extcpena_d_1_pins[] = { AB9540_PIN_J13 };
|
||||
/* modem SDA/SCL */
|
||||
static const unsigned modsclsda_d_1_pins[] = { AB9540_PIN_L17, AB9540_PIN_L16 };
|
||||
static const unsigned sysclkreq5_d_1_pins[] = { AB9540_PIN_W3 };
|
||||
static const unsigned gpio50_d_1_pins[] = { AB9540_PIN_N4 };
|
||||
static const unsigned batremn_d_1_pins[] = { AB9540_PIN_G12 };
|
||||
static const unsigned resethw_d_1_pins[] = { AB9540_PIN_E17 };
|
||||
static const unsigned service_d_1_pins[] = { AB9540_PIN_D11 };
|
||||
static const unsigned gpio60_d_1_pins[] = { AB9540_PIN_M18 };
|
||||
|
||||
/* Altfunction A column */
|
||||
static const unsigned gpio1_a_1_pins[] = { AB9540_PIN_R4 };
|
||||
static const unsigned gpio2_a_1_pins[] = { AB9540_PIN_V3 };
|
||||
static const unsigned gpio3_a_1_pins[] = { AB9540_PIN_T4 };
|
||||
static const unsigned gpio4_a_1_pins[] = { AB9540_PIN_T5 };
|
||||
static const unsigned hiqclkena_a_1_pins[] = { AB9540_PIN_B18 };
|
||||
static const unsigned pdmclk_a_1_pins[] = { AB9540_PIN_C18 };
|
||||
static const unsigned uartdata_a_1_pins[] = { AB9540_PIN_D18, AB9540_PIN_N4 };
|
||||
static const unsigned gpio14_a_1_pins[] = { AB9540_PIN_B19 };
|
||||
static const unsigned gpio15_a_1_pins[] = { AB9540_PIN_C19 };
|
||||
static const unsigned gpio16_a_1_pins[] = { AB9540_PIN_D19 };
|
||||
static const unsigned gpio17_a_1_pins[] = { AB9540_PIN_R3 };
|
||||
static const unsigned gpio18_a_1_pins[] = { AB9540_PIN_T2 };
|
||||
static const unsigned gpio19_a_1_pins[] = { AB9540_PIN_U2 };
|
||||
static const unsigned gpio20_a_1_pins[] = { AB9540_PIN_V2 };
|
||||
static const unsigned gpio21_a_1_pins[] = { AB9540_PIN_N17 };
|
||||
static const unsigned gpio22_a_1_pins[] = { AB9540_PIN_N16 };
|
||||
static const unsigned gpio23_a_1_pins[] = { AB9540_PIN_M19 };
|
||||
static const unsigned gpio24_a_1_pins[] = { AB9540_PIN_T3 };
|
||||
static const unsigned gpio25_a_1_pins[] = { AB9540_PIN_W2 };
|
||||
static const unsigned gpio27_a_1_pins[] = { AB9540_PIN_H4 };
|
||||
static const unsigned gpio28_a_1_pins[] = { AB9540_PIN_F1 };
|
||||
static const unsigned gpio29_a_1_pins[] = { AB9540_PIN_F4 };
|
||||
static const unsigned gpio30_a_1_pins[] = { AB9540_PIN_F2 };
|
||||
static const unsigned gpio31_a_1_pins[] = { AB9540_PIN_E4 };
|
||||
static const unsigned gpio32_a_1_pins[] = { AB9540_PIN_F3 };
|
||||
static const unsigned gpio34_a_1_pins[] = { AB9540_PIN_J13 };
|
||||
static const unsigned gpio40_a_1_pins[] = { AB9540_PIN_L17 };
|
||||
static const unsigned gpio41_a_1_pins[] = { AB9540_PIN_L16 };
|
||||
static const unsigned gpio42_a_1_pins[] = { AB9540_PIN_W3 };
|
||||
static const unsigned gpio51_a_1_pins[] = { AB9540_PIN_G12 };
|
||||
static const unsigned gpio52_a_1_pins[] = { AB9540_PIN_E17 };
|
||||
static const unsigned gpio53_a_1_pins[] = { AB9540_PIN_D11 };
|
||||
static const unsigned usbuiccpd_a_1_pins[] = { AB9540_PIN_M18 };
|
||||
|
||||
/* Altfunction B colum */
|
||||
static const unsigned pdmdata_b_1_pins[] = { AB9540_PIN_B18 };
|
||||
static const unsigned pwmextvibra1_b_1_pins[] = { AB9540_PIN_D18 };
|
||||
static const unsigned pwmextvibra2_b_1_pins[] = { AB9540_PIN_N4 };
|
||||
|
||||
/* Altfunction C column */
|
||||
static const unsigned usbvdat_c_1_pins[] = { AB9540_PIN_D18 };
|
||||
|
||||
#define AB9540_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
|
||||
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
|
||||
|
||||
static const struct abx500_pingroup ab9540_groups[] = {
|
||||
/* default column */
|
||||
AB9540_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq6_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(pwmout2_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(pwmout3_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(adi1_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(usbuicc_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq7_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq8_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(dmic12_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(dmic34_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(dmic56_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(sysclkreq5_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(batremn_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(service_d_1, ABX500_DEFAULT),
|
||||
AB9540_PIN_GROUP(gpio60_d_1, ABX500_DEFAULT),
|
||||
|
||||
/* Altfunction A column */
|
||||
AB9540_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio4_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(uartdata_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio15_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio16_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio21_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio22_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio23_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio24_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio25_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio27_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio28_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio29_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio30_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio31_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio32_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio42_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio51_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
|
||||
AB9540_PIN_GROUP(usbuiccpd_a_1, ABX500_ALT_A),
|
||||
|
||||
/* Altfunction B column */
|
||||
AB9540_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
|
||||
AB9540_PIN_GROUP(pwmextvibra1_b_1, ABX500_ALT_B),
|
||||
AB9540_PIN_GROUP(pwmextvibra2_b_1, ABX500_ALT_B),
|
||||
|
||||
/* Altfunction C column */
|
||||
AB9540_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
|
||||
};
|
||||
|
||||
/* We use this macro to define the groups applicable to a function */
|
||||
#define AB9540_FUNC_GROUPS(a, b...) \
|
||||
static const char * const a##_groups[] = { b };
|
||||
|
||||
AB9540_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
|
||||
"sysclkreq4_d_1", "sysclkreq5_d_1", "sysclkreq6_d_1",
|
||||
"sysclkreq7_d_1", "sysclkreq8_d_1");
|
||||
AB9540_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", "gpio4_a_1",
|
||||
"gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
|
||||
"gpio15_a_1", "gpio16_a_1", "gpio17_a_1", "gpio18_a_1",
|
||||
"gpio19_a_1", "gpio20_a_1", "gpio21_a_1", "gpio22_a_1",
|
||||
"gpio23_a_1", "gpio24_a_1", "gpio25_a_1", "gpio27_a_1",
|
||||
"gpio28_a_1", "gpio29_a_1", "gpio30_a_1", "gpio31_a_1",
|
||||
"gpio32_a_1", "gpio34_a_1", "gpio40_a_1", "gpio41_a_1",
|
||||
"gpio42_a_1", "gpio50_d_1", "gpio51_a_1", "gpio52_a_1",
|
||||
"gpio53_a_1", "gpio60_d_1");
|
||||
AB9540_FUNC_GROUPS(pwmout, "pwmout1_d_1", "pwmout2_d_1", "pwmout3_d_1");
|
||||
AB9540_FUNC_GROUPS(adi1, "adi1_d_1");
|
||||
AB9540_FUNC_GROUPS(usbuicc, "usbuicc_d_1", "usbuiccpd_a_1");
|
||||
AB9540_FUNC_GROUPS(dmic, "dmic12_d_1", "dmic34_d_1", "dmic56_d_1");
|
||||
AB9540_FUNC_GROUPS(extcpena, "extcpena_d_1");
|
||||
AB9540_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
|
||||
AB9540_FUNC_GROUPS(batremn, "batremn_d_1");
|
||||
AB9540_FUNC_GROUPS(resethw, "resethw_d_1");
|
||||
AB9540_FUNC_GROUPS(service, "service_d_1");
|
||||
AB9540_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
|
||||
AB9540_FUNC_GROUPS(pdm, "pdmdata_b_1", "pdmclk_a_1");
|
||||
AB9540_FUNC_GROUPS(uartdata, "uartdata_a_1");
|
||||
AB9540_FUNC_GROUPS(pwmextvibra, "pwmextvibra1_b_1", "pwmextvibra2_b_1");
|
||||
AB9540_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct abx500_function ab9540_functions[] = {
|
||||
FUNCTION(sysclkreq),
|
||||
FUNCTION(gpio),
|
||||
FUNCTION(pwmout),
|
||||
FUNCTION(adi1),
|
||||
FUNCTION(usbuicc),
|
||||
FUNCTION(dmic),
|
||||
FUNCTION(extcpena),
|
||||
FUNCTION(modsclsda),
|
||||
FUNCTION(batremn),
|
||||
FUNCTION(resethw),
|
||||
FUNCTION(service),
|
||||
FUNCTION(hiqclkena),
|
||||
FUNCTION(pdm),
|
||||
FUNCTION(uartdata),
|
||||
FUNCTION(pwmextvibra),
|
||||
FUNCTION(usbvdat),
|
||||
};
|
||||
|
||||
/*
|
||||
* this table translates what's is in the AB9540 specification regarding the
|
||||
* balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
|
||||
* ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
|
||||
* ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
|
||||
*
|
||||
* example :
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2),
|
||||
* means that pin AB9540_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
|
||||
* ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
|
||||
* select the mux. ALTA, ALTB and ALTC val indicates values to write in
|
||||
* ALTERNATFUNC register. We need to specifies these values as SOC
|
||||
* designers didn't apply the same logic on how to select mux in the
|
||||
* ABx500 family.
|
||||
*
|
||||
* As this pins supports at least ALT_B mux, default mux is
|
||||
* selected by writing 1 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
|
||||
* default | 1 | 0 | 0
|
||||
* alt_A | 0 | 0 | 1
|
||||
* alt_B | 0 | 0 | 0
|
||||
* alt_C | 0 | 1 | 0
|
||||
*
|
||||
* ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED),
|
||||
* means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
|
||||
* register is used to select the mux. As this pins doesn't support at
|
||||
* least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
|
||||
*
|
||||
* | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1=
|
||||
* default | 0 | 0 | 0
|
||||
* alt_A | 1 | 0 | 0
|
||||
*/
|
||||
|
||||
static struct
|
||||
alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1] = {
|
||||
/* GPIOSEL1 - bits 4-7 are reserved */
|
||||
ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
|
||||
ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
|
||||
ALTERNATE_FUNCTIONS(4, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO4, altA controlled by bit 3*/
|
||||
ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5 */
|
||||
ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6 */
|
||||
ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7 */
|
||||
ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8 */
|
||||
/* GPIOSEL2 - bits 0 and 3 are reserved */
|
||||
ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9 */
|
||||
ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12 */
|
||||
ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
|
||||
ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(15, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO15, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(16, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO16, altA controlled by bit 7 */
|
||||
/* GPIOSEL3 - bit 1-3 reserved
|
||||
* pins 17 to 20 are special case, only bit 0 is used to select
|
||||
* alternate function for these 4 pins.
|
||||
* bits 1 to 3 are reserved
|
||||
*/
|
||||
ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(21, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO21, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(22, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO22, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(23, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO23, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(24, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO24, altA controlled by bit 7 */
|
||||
/* GPIOSEL4 - bit 1 reserved */
|
||||
ALTERNATE_FUNCTIONS(25, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO25, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26 */
|
||||
ALTERNATE_FUNCTIONS(27, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO27, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(28, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO28, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(29, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO29, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(30, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO30, altA controlled by bit 5 */
|
||||
ALTERNATE_FUNCTIONS(31, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO31, altA controlled by bit 6 */
|
||||
ALTERNATE_FUNCTIONS(32, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO32, altA controlled by bit 7 */
|
||||
/* GPIOSEL5 - bit 0, 2-6 are reserved */
|
||||
ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33 */
|
||||
ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35 */
|
||||
ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36 */
|
||||
ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37 */
|
||||
ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38 */
|
||||
ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39 */
|
||||
ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7 */
|
||||
/* GPIOSEL6 - bit 2-7 are reserved */
|
||||
ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
|
||||
ALTERNATE_FUNCTIONS(42, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO42, altA controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43 */
|
||||
ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44 */
|
||||
ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45 */
|
||||
ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46 */
|
||||
ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47 */
|
||||
ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48 */
|
||||
/*
|
||||
* GPIOSEL7 - bit 0 and 6-7 are reserved
|
||||
* special case with GPIO60, wich is located at offset 5 of gpiosel7
|
||||
* don't know why it has been called GPIO60 in AB9540 datasheet,
|
||||
* GPIO54 would be logical..., so at SOC point of view we consider
|
||||
* GPIO60 = GPIO54
|
||||
*/
|
||||
ALTERNATE_FUNCTIONS(49, 0, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
|
||||
ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA and altB controlled by bit 1 */
|
||||
ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
|
||||
ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
|
||||
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
|
||||
ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54 = GPIO60, altA controlled by bit 5 */
|
||||
};
|
||||
|
||||
static struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = {
|
||||
GPIO_IRQ_CLUSTER(10, 13, AB8500_INT_GPIO10R),
|
||||
GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
|
||||
GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
|
||||
GPIO_IRQ_CLUSTER(50, 54, AB9540_INT_GPIO50R),
|
||||
};
|
||||
|
||||
static struct abx500_pinctrl_soc_data ab9540_soc = {
|
||||
.gpio_ranges = ab9540_pinranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(ab9540_pinranges),
|
||||
.pins = ab9540_pins,
|
||||
.npins = ARRAY_SIZE(ab9540_pins),
|
||||
.functions = ab9540_functions,
|
||||
.nfunctions = ARRAY_SIZE(ab9540_functions),
|
||||
.groups = ab9540_groups,
|
||||
.ngroups = ARRAY_SIZE(ab9540_groups),
|
||||
.alternate_functions = ab9540alternate_functions,
|
||||
.gpio_irq_cluster = ab9540_gpio_irq_cluster,
|
||||
.ngpio_irq_cluster = ARRAY_SIZE(ab9540_gpio_irq_cluster),
|
||||
.irq_gpio_rising_offset = AB8500_INT_GPIO6R,
|
||||
.irq_gpio_falling_offset = AB8500_INT_GPIO6F,
|
||||
.irq_gpio_factor = 1,
|
||||
};
|
||||
|
||||
void
|
||||
abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &ab9540_soc;
|
||||
}
|
||||
1304
drivers/pinctrl/nomadik/pinctrl-abx500.c
Normal file
1304
drivers/pinctrl/nomadik/pinctrl-abx500.c
Normal file
File diff suppressed because it is too large
Load diff
246
drivers/pinctrl/nomadik/pinctrl-abx500.h
Normal file
246
drivers/pinctrl/nomadik/pinctrl-abx500.h
Normal file
|
|
@ -0,0 +1,246 @@
|
|||
#ifndef PINCTRL_PINCTRL_ABx500_H
|
||||
#define PINCTRL_PINCTRL_ABx500_H
|
||||
|
||||
/* Package definitions */
|
||||
#define PINCTRL_AB8500 0
|
||||
#define PINCTRL_AB8540 1
|
||||
#define PINCTRL_AB9540 2
|
||||
#define PINCTRL_AB8505 3
|
||||
|
||||
/* pins alternate function */
|
||||
enum abx500_pin_func {
|
||||
ABX500_DEFAULT,
|
||||
ABX500_ALT_A,
|
||||
ABX500_ALT_B,
|
||||
ABX500_ALT_C,
|
||||
};
|
||||
|
||||
enum abx500_gpio_pull_updown {
|
||||
ABX500_GPIO_PULL_DOWN = 0x0,
|
||||
ABX500_GPIO_PULL_NONE = 0x1,
|
||||
ABX500_GPIO_PULL_UP = 0x3,
|
||||
};
|
||||
|
||||
enum abx500_gpio_vinsel {
|
||||
ABX500_GPIO_VINSEL_VBAT = 0x0,
|
||||
ABX500_GPIO_VINSEL_VIN_1V8 = 0x1,
|
||||
ABX500_GPIO_VINSEL_VDD_BIF = 0x2,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct abx500_function - ABx500 pinctrl mux function
|
||||
* @name: The name of the function, exported to pinctrl core.
|
||||
* @groups: An array of pin groups that may select this function.
|
||||
* @ngroups: The number of entries in @groups.
|
||||
*/
|
||||
struct abx500_function {
|
||||
const char *name;
|
||||
const char * const *groups;
|
||||
unsigned ngroups;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct abx500_pingroup - describes a ABx500 pin group
|
||||
* @name: the name of this specific pin group
|
||||
* @pins: an array of discrete physical pins used in this group, taken
|
||||
* from the driver-local pin enumeration space
|
||||
* @num_pins: the number of pins in this group array, i.e. the number of
|
||||
* elements in .pins so we can iterate over that array
|
||||
* @altsetting: the altsetting to apply to all pins in this group to
|
||||
* configure them to be used by a function
|
||||
*/
|
||||
struct abx500_pingroup {
|
||||
const char *name;
|
||||
const unsigned int *pins;
|
||||
const unsigned npins;
|
||||
int altsetting;
|
||||
};
|
||||
|
||||
#define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \
|
||||
{ \
|
||||
.pin_number = pin, \
|
||||
.gpiosel_bit = sel_bit, \
|
||||
.alt_bit1 = alt1, \
|
||||
.alt_bit2 = alt2, \
|
||||
.alta_val = alta, \
|
||||
.altb_val = altb, \
|
||||
.altc_val = altc, \
|
||||
}
|
||||
|
||||
#define UNUSED -1
|
||||
/**
|
||||
* struct alternate_functions
|
||||
* @pin_number: The pin number
|
||||
* @gpiosel_bit: Control bit in GPIOSEL register,
|
||||
* @alt_bit1: First AlternateFunction bit used to select the
|
||||
* alternate function
|
||||
* @alt_bit2: Second AlternateFunction bit used to select the
|
||||
* alternate function
|
||||
*
|
||||
* these 3 following fields are necessary due to none
|
||||
* coherency on how to select the altA, altB and altC
|
||||
* function between the ABx500 SOC family when using
|
||||
* alternatfunc register.
|
||||
* @alta_val: value to write in alternatfunc to select altA function
|
||||
* @altb_val: value to write in alternatfunc to select altB function
|
||||
* @altc_val: value to write in alternatfunc to select altC function
|
||||
*/
|
||||
struct alternate_functions {
|
||||
unsigned pin_number;
|
||||
s8 gpiosel_bit;
|
||||
s8 alt_bit1;
|
||||
s8 alt_bit2;
|
||||
u8 alta_val;
|
||||
u8 altb_val;
|
||||
u8 altc_val;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pullud - specific pull up/down feature
|
||||
* @first_pin: The pin number of the first pins which support
|
||||
* specific pull up/down
|
||||
* @last_pin: The pin number of the last pins
|
||||
*/
|
||||
struct pullud {
|
||||
unsigned first_pin;
|
||||
unsigned last_pin;
|
||||
};
|
||||
|
||||
#define GPIO_IRQ_CLUSTER(a, b, c) \
|
||||
{ \
|
||||
.start = a, \
|
||||
.end = b, \
|
||||
.to_irq = c, \
|
||||
}
|
||||
|
||||
/**
|
||||
* struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
|
||||
* capable
|
||||
* @start: The pin number of the first pin interrupt capable
|
||||
* @end: The pin number of the last pin interrupt capable
|
||||
* @to_irq: The ABx500 GPIO's associated IRQs are clustered
|
||||
* together throughout the interrupt numbers at irregular
|
||||
* intervals. To solve this quandary, we will place the
|
||||
* read-in values into the cluster information table
|
||||
*/
|
||||
|
||||
struct abx500_gpio_irq_cluster {
|
||||
int start;
|
||||
int end;
|
||||
int to_irq;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct abx500_pinrange - map pin numbers to GPIO offsets
|
||||
* @offset: offset into the GPIO local numberspace, incidentally
|
||||
* identical to the offset into the local pin numberspace
|
||||
* @npins: number of pins to map from both offsets
|
||||
* @altfunc: altfunc setting to be used to enable GPIO on a pin in
|
||||
* this range (may vary)
|
||||
*/
|
||||
struct abx500_pinrange {
|
||||
unsigned int offset;
|
||||
unsigned int npins;
|
||||
int altfunc;
|
||||
};
|
||||
|
||||
#define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c }
|
||||
|
||||
/**
|
||||
* struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
|
||||
* @gpio_ranges: An array of GPIO ranges for this SoC
|
||||
* @gpio_num_ranges: The number of GPIO ranges for this SoC
|
||||
* @pins: An array describing all pins the pin controller affects.
|
||||
* All pins which are also GPIOs must be listed first within the
|
||||
* array, and be numbered identically to the GPIO controller's
|
||||
* numbering.
|
||||
* @npins: The number of entries in @pins.
|
||||
* @functions: The functions supported on this SoC.
|
||||
* @nfunction: The number of entries in @functions.
|
||||
* @groups: An array describing all pin groups the pin SoC supports.
|
||||
* @ngroups: The number of entries in @groups.
|
||||
* @alternate_functions: array describing pins which supports alternate and
|
||||
* how to set it.
|
||||
* @pullud: array describing pins which supports pull up/down
|
||||
* specific registers.
|
||||
* @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC
|
||||
* @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC
|
||||
* @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
|
||||
* setting strategy of the rising interrupt line
|
||||
* @irq_gpio_falling_offset: Interrupt offset used as base to compute specific
|
||||
* setting strategy of the falling interrupt line
|
||||
* @irq_gpio_factor: Factor used to compute specific setting strategy of
|
||||
* the interrupt line
|
||||
*/
|
||||
|
||||
struct abx500_pinctrl_soc_data {
|
||||
const struct abx500_pinrange *gpio_ranges;
|
||||
unsigned gpio_num_ranges;
|
||||
const struct pinctrl_pin_desc *pins;
|
||||
unsigned npins;
|
||||
const struct abx500_function *functions;
|
||||
unsigned nfunctions;
|
||||
const struct abx500_pingroup *groups;
|
||||
unsigned ngroups;
|
||||
struct alternate_functions *alternate_functions;
|
||||
struct pullud *pullud;
|
||||
struct abx500_gpio_irq_cluster *gpio_irq_cluster;
|
||||
unsigned ngpio_irq_cluster;
|
||||
int irq_gpio_rising_offset;
|
||||
int irq_gpio_falling_offset;
|
||||
int irq_gpio_factor;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB8500
|
||||
|
||||
void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB8540
|
||||
|
||||
void abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB9540
|
||||
|
||||
void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_AB8505
|
||||
|
||||
void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* PINCTRL_PINCTRL_ABx500_H */
|
||||
1257
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c
Normal file
1257
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c
Normal file
File diff suppressed because it is too large
Load diff
1266
drivers/pinctrl/nomadik/pinctrl-nomadik-db8540.c
Normal file
1266
drivers/pinctrl/nomadik/pinctrl-nomadik-db8540.c
Normal file
File diff suppressed because it is too large
Load diff
356
drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c
Normal file
356
drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c
Normal file
|
|
@ -0,0 +1,356 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include "pinctrl-nomadik.h"
|
||||
|
||||
/* All the pins that can be used for GPIO and some other functions */
|
||||
#define _GPIO(offset) (offset)
|
||||
|
||||
#define STN8815_PIN_B4 _GPIO(0)
|
||||
#define STN8815_PIN_D5 _GPIO(1)
|
||||
#define STN8815_PIN_C5 _GPIO(2)
|
||||
#define STN8815_PIN_A4 _GPIO(3)
|
||||
#define STN8815_PIN_B5 _GPIO(4)
|
||||
#define STN8815_PIN_D6 _GPIO(5)
|
||||
#define STN8815_PIN_C6 _GPIO(6)
|
||||
#define STN8815_PIN_B6 _GPIO(7)
|
||||
#define STN8815_PIN_B10 _GPIO(8)
|
||||
#define STN8815_PIN_A10 _GPIO(9)
|
||||
#define STN8815_PIN_C11 _GPIO(10)
|
||||
#define STN8815_PIN_B11 _GPIO(11)
|
||||
#define STN8815_PIN_A11 _GPIO(12)
|
||||
#define STN8815_PIN_C12 _GPIO(13)
|
||||
#define STN8815_PIN_B12 _GPIO(14)
|
||||
#define STN8815_PIN_A12 _GPIO(15)
|
||||
#define STN8815_PIN_C13 _GPIO(16)
|
||||
#define STN8815_PIN_B13 _GPIO(17)
|
||||
#define STN8815_PIN_A13 _GPIO(18)
|
||||
#define STN8815_PIN_D13 _GPIO(19)
|
||||
#define STN8815_PIN_C14 _GPIO(20)
|
||||
#define STN8815_PIN_B14 _GPIO(21)
|
||||
#define STN8815_PIN_A14 _GPIO(22)
|
||||
#define STN8815_PIN_D15 _GPIO(23)
|
||||
#define STN8815_PIN_C15 _GPIO(24)
|
||||
#define STN8815_PIN_B15 _GPIO(25)
|
||||
#define STN8815_PIN_A15 _GPIO(26)
|
||||
#define STN8815_PIN_C16 _GPIO(27)
|
||||
#define STN8815_PIN_B16 _GPIO(28)
|
||||
#define STN8815_PIN_A16 _GPIO(29)
|
||||
#define STN8815_PIN_D17 _GPIO(30)
|
||||
#define STN8815_PIN_C17 _GPIO(31)
|
||||
#define STN8815_PIN_AB6 _GPIO(32)
|
||||
#define STN8815_PIN_AA6 _GPIO(33)
|
||||
#define STN8815_PIN_Y6 _GPIO(34)
|
||||
#define STN8815_PIN_Y5 _GPIO(35)
|
||||
#define STN8815_PIN_AA5 _GPIO(36)
|
||||
#define STN8815_PIN_AB5 _GPIO(37)
|
||||
#define STN8815_PIN_AB4 _GPIO(38)
|
||||
#define STN8815_PIN_Y4 _GPIO(39)
|
||||
#define STN8815_PIN_R1 _GPIO(40)
|
||||
#define STN8815_PIN_R2 _GPIO(41)
|
||||
#define STN8815_PIN_R3 _GPIO(42)
|
||||
#define STN8815_PIN_P1 _GPIO(43)
|
||||
#define STN8815_PIN_P2 _GPIO(44)
|
||||
#define STN8815_PIN_P3 _GPIO(45)
|
||||
#define STN8815_PIN_N1 _GPIO(46)
|
||||
#define STN8815_PIN_N2 _GPIO(47)
|
||||
#define STN8815_PIN_N3 _GPIO(48)
|
||||
#define STN8815_PIN_M1 _GPIO(49)
|
||||
#define STN8815_PIN_M3 _GPIO(50)
|
||||
#define STN8815_PIN_M2 _GPIO(51)
|
||||
#define STN8815_PIN_L1 _GPIO(52)
|
||||
#define STN8815_PIN_L4 _GPIO(53)
|
||||
#define STN8815_PIN_L3 _GPIO(54)
|
||||
#define STN8815_PIN_L2 _GPIO(55)
|
||||
#define STN8815_PIN_F3 _GPIO(56)
|
||||
#define STN8815_PIN_F2 _GPIO(57)
|
||||
#define STN8815_PIN_E1 _GPIO(58)
|
||||
#define STN8815_PIN_E3 _GPIO(59)
|
||||
#define STN8815_PIN_E2 _GPIO(60)
|
||||
#define STN8815_PIN_E4 _GPIO(61)
|
||||
#define STN8815_PIN_D3 _GPIO(62)
|
||||
#define STN8815_PIN_D2 _GPIO(63)
|
||||
#define STN8815_PIN_F21 _GPIO(64)
|
||||
#define STN8815_PIN_F20 _GPIO(65)
|
||||
#define STN8815_PIN_E22 _GPIO(66)
|
||||
#define STN8815_PIN_D22 _GPIO(67)
|
||||
#define STN8815_PIN_E21 _GPIO(68)
|
||||
#define STN8815_PIN_E20 _GPIO(69)
|
||||
#define STN8815_PIN_C22 _GPIO(70)
|
||||
#define STN8815_PIN_D21 _GPIO(71)
|
||||
#define STN8815_PIN_D20 _GPIO(72)
|
||||
#define STN8815_PIN_C21 _GPIO(73)
|
||||
#define STN8815_PIN_C20 _GPIO(74)
|
||||
#define STN8815_PIN_C19 _GPIO(75)
|
||||
#define STN8815_PIN_B20 _GPIO(76)
|
||||
#define STN8815_PIN_B8 _GPIO(77)
|
||||
#define STN8815_PIN_A8 _GPIO(78)
|
||||
#define STN8815_PIN_C9 _GPIO(79)
|
||||
#define STN8815_PIN_B9 _GPIO(80)
|
||||
#define STN8815_PIN_A9 _GPIO(81)
|
||||
#define STN8815_PIN_C10 _GPIO(82)
|
||||
#define STN8815_PIN_K1 _GPIO(83)
|
||||
#define STN8815_PIN_K3 _GPIO(84)
|
||||
#define STN8815_PIN_K2 _GPIO(85)
|
||||
#define STN8815_PIN_J1 _GPIO(86)
|
||||
#define STN8815_PIN_J3 _GPIO(87)
|
||||
#define STN8815_PIN_J2 _GPIO(88)
|
||||
#define STN8815_PIN_H1 _GPIO(89)
|
||||
#define STN8815_PIN_H3 _GPIO(90)
|
||||
#define STN8815_PIN_H2 _GPIO(91)
|
||||
#define STN8815_PIN_G1 _GPIO(92)
|
||||
#define STN8815_PIN_G3 _GPIO(93)
|
||||
#define STN8815_PIN_G2 _GPIO(94)
|
||||
#define STN8815_PIN_F1 _GPIO(95)
|
||||
#define STN8815_PIN_T20 _GPIO(96)
|
||||
#define STN8815_PIN_R21 _GPIO(97)
|
||||
#define STN8815_PIN_R20 _GPIO(98)
|
||||
#define STN8815_PIN_U22 _GPIO(99)
|
||||
#define STN8815_PIN_N21 _GPIO(100)
|
||||
#define STN8815_PIN_N20 _GPIO(101)
|
||||
#define STN8815_PIN_P22 _GPIO(102)
|
||||
#define STN8815_PIN_N22 _GPIO(103)
|
||||
#define STN8815_PIN_V22 _GPIO(104)
|
||||
#define STN8815_PIN_V21 _GPIO(105)
|
||||
#define STN8815_PIN_K22 _GPIO(106)
|
||||
#define STN8815_PIN_K21 _GPIO(107)
|
||||
#define STN8815_PIN_H20 _GPIO(108)
|
||||
#define STN8815_PIN_G20 _GPIO(109)
|
||||
#define STN8815_PIN_L21 _GPIO(110)
|
||||
#define STN8815_PIN_H21 _GPIO(111)
|
||||
#define STN8815_PIN_J21 _GPIO(112)
|
||||
#define STN8815_PIN_H22 _GPIO(113)
|
||||
#define STN8815_PIN_K20 _GPIO(114)
|
||||
#define STN8815_PIN_L22 _GPIO(115)
|
||||
#define STN8815_PIN_G21 _GPIO(116)
|
||||
#define STN8815_PIN_J20 _GPIO(117)
|
||||
#define STN8815_PIN_G22 _GPIO(118)
|
||||
#define STN8815_PIN_U19 _GPIO(119)
|
||||
#define STN8815_PIN_G19 _GPIO(120)
|
||||
#define STN8815_PIN_M22 _GPIO(121)
|
||||
#define STN8815_PIN_M19 _GPIO(122)
|
||||
#define STN8815_PIN_J22 _GPIO(123)
|
||||
/* GPIOs 124-127 not routed to pins */
|
||||
|
||||
/*
|
||||
* The names of the pins are denoted by GPIO number and ball name, even
|
||||
* though they can be used for other things than GPIO, this is the first
|
||||
* column in the table of the data sheet and often used on schematics and
|
||||
* such.
|
||||
*/
|
||||
static const struct pinctrl_pin_desc nmk_stn8815_pins[] = {
|
||||
PINCTRL_PIN(STN8815_PIN_B4, "GPIO0_B4"),
|
||||
PINCTRL_PIN(STN8815_PIN_D5, "GPIO1_D5"),
|
||||
PINCTRL_PIN(STN8815_PIN_C5, "GPIO2_C5"),
|
||||
PINCTRL_PIN(STN8815_PIN_A4, "GPIO3_A4"),
|
||||
PINCTRL_PIN(STN8815_PIN_B5, "GPIO4_B5"),
|
||||
PINCTRL_PIN(STN8815_PIN_D6, "GPIO5_D6"),
|
||||
PINCTRL_PIN(STN8815_PIN_C6, "GPIO6_C6"),
|
||||
PINCTRL_PIN(STN8815_PIN_B6, "GPIO7_B6"),
|
||||
PINCTRL_PIN(STN8815_PIN_B10, "GPIO8_B10"),
|
||||
PINCTRL_PIN(STN8815_PIN_A10, "GPIO9_A10"),
|
||||
PINCTRL_PIN(STN8815_PIN_C11, "GPIO10_C11"),
|
||||
PINCTRL_PIN(STN8815_PIN_B11, "GPIO11_B11"),
|
||||
PINCTRL_PIN(STN8815_PIN_A11, "GPIO12_A11"),
|
||||
PINCTRL_PIN(STN8815_PIN_C12, "GPIO13_C12"),
|
||||
PINCTRL_PIN(STN8815_PIN_B12, "GPIO14_B12"),
|
||||
PINCTRL_PIN(STN8815_PIN_A12, "GPIO15_A12"),
|
||||
PINCTRL_PIN(STN8815_PIN_C13, "GPIO16_C13"),
|
||||
PINCTRL_PIN(STN8815_PIN_B13, "GPIO17_B13"),
|
||||
PINCTRL_PIN(STN8815_PIN_A13, "GPIO18_A13"),
|
||||
PINCTRL_PIN(STN8815_PIN_D13, "GPIO19_D13"),
|
||||
PINCTRL_PIN(STN8815_PIN_C14, "GPIO20_C14"),
|
||||
PINCTRL_PIN(STN8815_PIN_B14, "GPIO21_B14"),
|
||||
PINCTRL_PIN(STN8815_PIN_A14, "GPIO22_A14"),
|
||||
PINCTRL_PIN(STN8815_PIN_D15, "GPIO23_D15"),
|
||||
PINCTRL_PIN(STN8815_PIN_C15, "GPIO24_C15"),
|
||||
PINCTRL_PIN(STN8815_PIN_B15, "GPIO25_B15"),
|
||||
PINCTRL_PIN(STN8815_PIN_A15, "GPIO26_A15"),
|
||||
PINCTRL_PIN(STN8815_PIN_C16, "GPIO27_C16"),
|
||||
PINCTRL_PIN(STN8815_PIN_B16, "GPIO28_B16"),
|
||||
PINCTRL_PIN(STN8815_PIN_A16, "GPIO29_A16"),
|
||||
PINCTRL_PIN(STN8815_PIN_D17, "GPIO30_D17"),
|
||||
PINCTRL_PIN(STN8815_PIN_C17, "GPIO31_C17"),
|
||||
PINCTRL_PIN(STN8815_PIN_AB6, "GPIO32_AB6"),
|
||||
PINCTRL_PIN(STN8815_PIN_AA6, "GPIO33_AA6"),
|
||||
PINCTRL_PIN(STN8815_PIN_Y6, "GPIO34_Y6"),
|
||||
PINCTRL_PIN(STN8815_PIN_Y5, "GPIO35_Y5"),
|
||||
PINCTRL_PIN(STN8815_PIN_AA5, "GPIO36_AA5"),
|
||||
PINCTRL_PIN(STN8815_PIN_AB5, "GPIO37_AB5"),
|
||||
PINCTRL_PIN(STN8815_PIN_AB4, "GPIO38_AB4"),
|
||||
PINCTRL_PIN(STN8815_PIN_Y4, "GPIO39_Y4"),
|
||||
PINCTRL_PIN(STN8815_PIN_R1, "GPIO40_R1"),
|
||||
PINCTRL_PIN(STN8815_PIN_R2, "GPIO41_R2"),
|
||||
PINCTRL_PIN(STN8815_PIN_R3, "GPIO42_R3"),
|
||||
PINCTRL_PIN(STN8815_PIN_P1, "GPIO43_P1"),
|
||||
PINCTRL_PIN(STN8815_PIN_P2, "GPIO44_P2"),
|
||||
PINCTRL_PIN(STN8815_PIN_P3, "GPIO45_P3"),
|
||||
PINCTRL_PIN(STN8815_PIN_N1, "GPIO46_N1"),
|
||||
PINCTRL_PIN(STN8815_PIN_N2, "GPIO47_N2"),
|
||||
PINCTRL_PIN(STN8815_PIN_N3, "GPIO48_N3"),
|
||||
PINCTRL_PIN(STN8815_PIN_M1, "GPIO49_M1"),
|
||||
PINCTRL_PIN(STN8815_PIN_M3, "GPIO50_M3"),
|
||||
PINCTRL_PIN(STN8815_PIN_M2, "GPIO51_M2"),
|
||||
PINCTRL_PIN(STN8815_PIN_L1, "GPIO52_L1"),
|
||||
PINCTRL_PIN(STN8815_PIN_L4, "GPIO53_L4"),
|
||||
PINCTRL_PIN(STN8815_PIN_L3, "GPIO54_L3"),
|
||||
PINCTRL_PIN(STN8815_PIN_L2, "GPIO55_L2"),
|
||||
PINCTRL_PIN(STN8815_PIN_F3, "GPIO56_F3"),
|
||||
PINCTRL_PIN(STN8815_PIN_F2, "GPIO57_F2"),
|
||||
PINCTRL_PIN(STN8815_PIN_E1, "GPIO58_E1"),
|
||||
PINCTRL_PIN(STN8815_PIN_E3, "GPIO59_E3"),
|
||||
PINCTRL_PIN(STN8815_PIN_E2, "GPIO60_E2"),
|
||||
PINCTRL_PIN(STN8815_PIN_E4, "GPIO61_E4"),
|
||||
PINCTRL_PIN(STN8815_PIN_D3, "GPIO62_D3"),
|
||||
PINCTRL_PIN(STN8815_PIN_D2, "GPIO63_D2"),
|
||||
PINCTRL_PIN(STN8815_PIN_F21, "GPIO64_F21"),
|
||||
PINCTRL_PIN(STN8815_PIN_F20, "GPIO65_F20"),
|
||||
PINCTRL_PIN(STN8815_PIN_E22, "GPIO66_E22"),
|
||||
PINCTRL_PIN(STN8815_PIN_D22, "GPIO67_D22"),
|
||||
PINCTRL_PIN(STN8815_PIN_E21, "GPIO68_E21"),
|
||||
PINCTRL_PIN(STN8815_PIN_E20, "GPIO69_E20"),
|
||||
PINCTRL_PIN(STN8815_PIN_C22, "GPIO70_C22"),
|
||||
PINCTRL_PIN(STN8815_PIN_D21, "GPIO71_D21"),
|
||||
PINCTRL_PIN(STN8815_PIN_D20, "GPIO72_D20"),
|
||||
PINCTRL_PIN(STN8815_PIN_C21, "GPIO73_C21"),
|
||||
PINCTRL_PIN(STN8815_PIN_C20, "GPIO74_C20"),
|
||||
PINCTRL_PIN(STN8815_PIN_C19, "GPIO75_C19"),
|
||||
PINCTRL_PIN(STN8815_PIN_B20, "GPIO76_B20"),
|
||||
PINCTRL_PIN(STN8815_PIN_B8, "GPIO77_B8"),
|
||||
PINCTRL_PIN(STN8815_PIN_A8, "GPIO78_A8"),
|
||||
PINCTRL_PIN(STN8815_PIN_C9, "GPIO79_C9"),
|
||||
PINCTRL_PIN(STN8815_PIN_B9, "GPIO80_B9"),
|
||||
PINCTRL_PIN(STN8815_PIN_A9, "GPIO81_A9"),
|
||||
PINCTRL_PIN(STN8815_PIN_C10, "GPIO82_C10"),
|
||||
PINCTRL_PIN(STN8815_PIN_K1, "GPIO83_K1"),
|
||||
PINCTRL_PIN(STN8815_PIN_K3, "GPIO84_K3"),
|
||||
PINCTRL_PIN(STN8815_PIN_K2, "GPIO85_K2"),
|
||||
PINCTRL_PIN(STN8815_PIN_J1, "GPIO86_J1"),
|
||||
PINCTRL_PIN(STN8815_PIN_J3, "GPIO87_J3"),
|
||||
PINCTRL_PIN(STN8815_PIN_J2, "GPIO88_J2"),
|
||||
PINCTRL_PIN(STN8815_PIN_H1, "GPIO89_H1"),
|
||||
PINCTRL_PIN(STN8815_PIN_H3, "GPIO90_H3"),
|
||||
PINCTRL_PIN(STN8815_PIN_H2, "GPIO91_H2"),
|
||||
PINCTRL_PIN(STN8815_PIN_G1, "GPIO92_G1"),
|
||||
PINCTRL_PIN(STN8815_PIN_G3, "GPIO93_G3"),
|
||||
PINCTRL_PIN(STN8815_PIN_G2, "GPIO94_G2"),
|
||||
PINCTRL_PIN(STN8815_PIN_F1, "GPIO95_F1"),
|
||||
PINCTRL_PIN(STN8815_PIN_T20, "GPIO96_T20"),
|
||||
PINCTRL_PIN(STN8815_PIN_R21, "GPIO97_R21"),
|
||||
PINCTRL_PIN(STN8815_PIN_R20, "GPIO98_R20"),
|
||||
PINCTRL_PIN(STN8815_PIN_U22, "GPIO99_U22"),
|
||||
PINCTRL_PIN(STN8815_PIN_N21, "GPIO100_N21"),
|
||||
PINCTRL_PIN(STN8815_PIN_N20, "GPIO101_N20"),
|
||||
PINCTRL_PIN(STN8815_PIN_P22, "GPIO102_P22"),
|
||||
PINCTRL_PIN(STN8815_PIN_N22, "GPIO103_N22"),
|
||||
PINCTRL_PIN(STN8815_PIN_V22, "GPIO104_V22"),
|
||||
PINCTRL_PIN(STN8815_PIN_V21, "GPIO105_V21"),
|
||||
PINCTRL_PIN(STN8815_PIN_K22, "GPIO106_K22"),
|
||||
PINCTRL_PIN(STN8815_PIN_K21, "GPIO107_K21"),
|
||||
PINCTRL_PIN(STN8815_PIN_H20, "GPIO108_H20"),
|
||||
PINCTRL_PIN(STN8815_PIN_G20, "GPIO109_G20"),
|
||||
PINCTRL_PIN(STN8815_PIN_L21, "GPIO110_L21"),
|
||||
PINCTRL_PIN(STN8815_PIN_H21, "GPIO111_H21"),
|
||||
PINCTRL_PIN(STN8815_PIN_J21, "GPIO112_J21"),
|
||||
PINCTRL_PIN(STN8815_PIN_H22, "GPIO113_H22"),
|
||||
PINCTRL_PIN(STN8815_PIN_K20, "GPIO114_K20"),
|
||||
PINCTRL_PIN(STN8815_PIN_L22, "GPIO115_L22"),
|
||||
PINCTRL_PIN(STN8815_PIN_G21, "GPIO116_G21"),
|
||||
PINCTRL_PIN(STN8815_PIN_J20, "GPIO117_J20"),
|
||||
PINCTRL_PIN(STN8815_PIN_G22, "GPIO118_G22"),
|
||||
PINCTRL_PIN(STN8815_PIN_U19, "GPIO119_U19"),
|
||||
PINCTRL_PIN(STN8815_PIN_G19, "GPIO120_G19"),
|
||||
PINCTRL_PIN(STN8815_PIN_M22, "GPIO121_M22"),
|
||||
PINCTRL_PIN(STN8815_PIN_M19, "GPIO122_M19"),
|
||||
PINCTRL_PIN(STN8815_PIN_J22, "GPIO123_J22"),
|
||||
};
|
||||
|
||||
#define STN8815_GPIO_RANGE(a, b, c) { .name = "STN8815", .id = a, .base = b, \
|
||||
.pin_base = b, .npins = c }
|
||||
|
||||
/*
|
||||
* This matches the 32-pin gpio chips registered by the GPIO portion. This
|
||||
* cannot be const since we assign the struct gpio_chip * pointer at runtime.
|
||||
*/
|
||||
static struct pinctrl_gpio_range nmk_stn8815_ranges[] = {
|
||||
STN8815_GPIO_RANGE(0, 0, 32),
|
||||
STN8815_GPIO_RANGE(1, 32, 32),
|
||||
STN8815_GPIO_RANGE(2, 64, 32),
|
||||
STN8815_GPIO_RANGE(3, 96, 28),
|
||||
};
|
||||
|
||||
/*
|
||||
* Read the pin group names like this:
|
||||
* u0_a_1 = first groups of pins for uart0 on alt function a
|
||||
* i2c2_b_2 = second group of pins for i2c2 on alt function b
|
||||
*/
|
||||
|
||||
/* Altfunction A */
|
||||
static const unsigned u0_a_1_pins[] = { STN8815_PIN_B4, STN8815_PIN_D5,
|
||||
STN8815_PIN_C5, STN8815_PIN_A4, STN8815_PIN_B5, STN8815_PIN_D6,
|
||||
STN8815_PIN_C6, STN8815_PIN_B6 };
|
||||
static const unsigned mmcsd_a_1_pins[] = { STN8815_PIN_B10, STN8815_PIN_A10,
|
||||
STN8815_PIN_C11, STN8815_PIN_B11, STN8815_PIN_A11, STN8815_PIN_C12,
|
||||
STN8815_PIN_B12, STN8815_PIN_A12, STN8815_PIN_C13, STN8815_PIN_C15 };
|
||||
static const unsigned u1_a_1_pins[] = { STN8815_PIN_M2, STN8815_PIN_L1,
|
||||
STN8815_PIN_F3, STN8815_PIN_F2 };
|
||||
static const unsigned i2c1_a_1_pins[] = { STN8815_PIN_L4, STN8815_PIN_L3 };
|
||||
static const unsigned i2c0_a_1_pins[] = { STN8815_PIN_D3, STN8815_PIN_D2 };
|
||||
/* Altfunction B */
|
||||
static const unsigned u1_b_1_pins[] = { STN8815_PIN_B16, STN8815_PIN_A16 };
|
||||
static const unsigned i2cusb_b_1_pins[] = { STN8815_PIN_C21, STN8815_PIN_C20 };
|
||||
|
||||
#define STN8815_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
|
||||
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
|
||||
|
||||
static const struct nmk_pingroup nmk_stn8815_groups[] = {
|
||||
STN8815_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
|
||||
STN8815_PIN_GROUP(mmcsd_a_1, NMK_GPIO_ALT_A),
|
||||
STN8815_PIN_GROUP(u1_a_1, NMK_GPIO_ALT_A),
|
||||
STN8815_PIN_GROUP(i2c1_a_1, NMK_GPIO_ALT_A),
|
||||
STN8815_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
|
||||
STN8815_PIN_GROUP(u1_b_1, NMK_GPIO_ALT_B),
|
||||
STN8815_PIN_GROUP(i2cusb_b_1, NMK_GPIO_ALT_B),
|
||||
};
|
||||
|
||||
/* We use this macro to define the groups applicable to a function */
|
||||
#define STN8815_FUNC_GROUPS(a, b...) \
|
||||
static const char * const a##_groups[] = { b };
|
||||
|
||||
STN8815_FUNC_GROUPS(u0, "u0_a_1");
|
||||
STN8815_FUNC_GROUPS(mmcsd, "mmcsd_a_1");
|
||||
STN8815_FUNC_GROUPS(u1, "u1_a_1", "u1_b_1");
|
||||
STN8815_FUNC_GROUPS(i2c1, "i2c1_a_1");
|
||||
STN8815_FUNC_GROUPS(i2c0, "i2c0_a_1");
|
||||
STN8815_FUNC_GROUPS(i2cusb, "i2cusb_b_1");
|
||||
|
||||
#define FUNCTION(fname) \
|
||||
{ \
|
||||
.name = #fname, \
|
||||
.groups = fname##_groups, \
|
||||
.ngroups = ARRAY_SIZE(fname##_groups), \
|
||||
}
|
||||
|
||||
static const struct nmk_function nmk_stn8815_functions[] = {
|
||||
FUNCTION(u0),
|
||||
FUNCTION(mmcsd),
|
||||
FUNCTION(u1),
|
||||
FUNCTION(i2c1),
|
||||
FUNCTION(i2c0),
|
||||
FUNCTION(i2cusb),
|
||||
};
|
||||
|
||||
static const struct nmk_pinctrl_soc_data nmk_stn8815_soc = {
|
||||
.gpio_ranges = nmk_stn8815_ranges,
|
||||
.gpio_num_ranges = ARRAY_SIZE(nmk_stn8815_ranges),
|
||||
.pins = nmk_stn8815_pins,
|
||||
.npins = ARRAY_SIZE(nmk_stn8815_pins),
|
||||
.functions = nmk_stn8815_functions,
|
||||
.nfunctions = ARRAY_SIZE(nmk_stn8815_functions),
|
||||
.groups = nmk_stn8815_groups,
|
||||
.ngroups = ARRAY_SIZE(nmk_stn8815_groups),
|
||||
};
|
||||
|
||||
void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
|
||||
{
|
||||
*soc = &nmk_stn8815_soc;
|
||||
}
|
||||
2085
drivers/pinctrl/nomadik/pinctrl-nomadik.c
Normal file
2085
drivers/pinctrl/nomadik/pinctrl-nomadik.c
Normal file
File diff suppressed because it is too large
Load diff
192
drivers/pinctrl/nomadik/pinctrl-nomadik.h
Normal file
192
drivers/pinctrl/nomadik/pinctrl-nomadik.h
Normal file
|
|
@ -0,0 +1,192 @@
|
|||
#ifndef PINCTRL_PINCTRL_NOMADIK_H
|
||||
#define PINCTRL_PINCTRL_NOMADIK_H
|
||||
|
||||
/* Package definitions */
|
||||
#define PINCTRL_NMK_STN8815 0
|
||||
#define PINCTRL_NMK_DB8500 1
|
||||
#define PINCTRL_NMK_DB8540 2
|
||||
|
||||
/* Alternate functions: function C is set in hw by setting both A and B */
|
||||
#define NMK_GPIO_ALT_GPIO 0
|
||||
#define NMK_GPIO_ALT_A 1
|
||||
#define NMK_GPIO_ALT_B 2
|
||||
#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
|
||||
|
||||
#define NMK_GPIO_ALT_CX_SHIFT 2
|
||||
#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
|
||||
#define PRCM_GPIOCR_ALTCX(pin_num,\
|
||||
altc1_used, altc1_ri, altc1_cb,\
|
||||
altc2_used, altc2_ri, altc2_cb,\
|
||||
altc3_used, altc3_ri, altc3_cb,\
|
||||
altc4_used, altc4_ri, altc4_cb)\
|
||||
{\
|
||||
.pin = pin_num,\
|
||||
.altcx[PRCM_IDX_GPIOCR_ALTC1] = {\
|
||||
.used = altc1_used,\
|
||||
.reg_index = altc1_ri,\
|
||||
.control_bit = altc1_cb\
|
||||
},\
|
||||
.altcx[PRCM_IDX_GPIOCR_ALTC2] = {\
|
||||
.used = altc2_used,\
|
||||
.reg_index = altc2_ri,\
|
||||
.control_bit = altc2_cb\
|
||||
},\
|
||||
.altcx[PRCM_IDX_GPIOCR_ALTC3] = {\
|
||||
.used = altc3_used,\
|
||||
.reg_index = altc3_ri,\
|
||||
.control_bit = altc3_cb\
|
||||
},\
|
||||
.altcx[PRCM_IDX_GPIOCR_ALTC4] = {\
|
||||
.used = altc4_used,\
|
||||
.reg_index = altc4_ri,\
|
||||
.control_bit = altc4_cb\
|
||||
},\
|
||||
}
|
||||
|
||||
/**
|
||||
* enum prcm_gpiocr_reg_index
|
||||
* Used to reference an PRCM GPIOCR register address.
|
||||
*/
|
||||
enum prcm_gpiocr_reg_index {
|
||||
PRCM_IDX_GPIOCR1,
|
||||
PRCM_IDX_GPIOCR2,
|
||||
PRCM_IDX_GPIOCR3
|
||||
};
|
||||
/**
|
||||
* enum prcm_gpiocr_altcx_index
|
||||
* Used to reference an Other alternate-C function.
|
||||
*/
|
||||
enum prcm_gpiocr_altcx_index {
|
||||
PRCM_IDX_GPIOCR_ALTC1,
|
||||
PRCM_IDX_GPIOCR_ALTC2,
|
||||
PRCM_IDX_GPIOCR_ALTC3,
|
||||
PRCM_IDX_GPIOCR_ALTC4,
|
||||
PRCM_IDX_GPIOCR_ALTC_MAX,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct prcm_gpio_altcx - Other alternate-C function
|
||||
* @used: other alternate-C function availability
|
||||
* @reg_index: PRCM GPIOCR register index used to control the function
|
||||
* @control_bit: PRCM GPIOCR bit used to control the function
|
||||
*/
|
||||
struct prcm_gpiocr_altcx {
|
||||
bool used:1;
|
||||
u8 reg_index:2;
|
||||
u8 control_bit:5;
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct prcm_gpio_altcx_pin_desc - Other alternate-C pin
|
||||
* @pin: The pin number
|
||||
* @altcx: array of other alternate-C[1-4] functions
|
||||
*/
|
||||
struct prcm_gpiocr_altcx_pin_desc {
|
||||
unsigned short pin;
|
||||
struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nmk_function - Nomadik pinctrl mux function
|
||||
* @name: The name of the function, exported to pinctrl core.
|
||||
* @groups: An array of pin groups that may select this function.
|
||||
* @ngroups: The number of entries in @groups.
|
||||
*/
|
||||
struct nmk_function {
|
||||
const char *name;
|
||||
const char * const *groups;
|
||||
unsigned ngroups;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nmk_pingroup - describes a Nomadik pin group
|
||||
* @name: the name of this specific pin group
|
||||
* @pins: an array of discrete physical pins used in this group, taken
|
||||
* from the driver-local pin enumeration space
|
||||
* @num_pins: the number of pins in this group array, i.e. the number of
|
||||
* elements in .pins so we can iterate over that array
|
||||
* @altsetting: the altsetting to apply to all pins in this group to
|
||||
* configure them to be used by a function
|
||||
*/
|
||||
struct nmk_pingroup {
|
||||
const char *name;
|
||||
const unsigned int *pins;
|
||||
const unsigned npins;
|
||||
int altsetting;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration
|
||||
* @gpio_ranges: An array of GPIO ranges for this SoC
|
||||
* @gpio_num_ranges: The number of GPIO ranges for this SoC
|
||||
* @pins: An array describing all pins the pin controller affects.
|
||||
* All pins which are also GPIOs must be listed first within the
|
||||
* array, and be numbered identically to the GPIO controller's
|
||||
* numbering.
|
||||
* @npins: The number of entries in @pins.
|
||||
* @functions: The functions supported on this SoC.
|
||||
* @nfunction: The number of entries in @functions.
|
||||
* @groups: An array describing all pin groups the pin SoC supports.
|
||||
* @ngroups: The number of entries in @groups.
|
||||
* @altcx_pins: The pins that support Other alternate-C function on this SoC
|
||||
* @npins_altcx: The number of Other alternate-C pins
|
||||
* @prcm_gpiocr_registers: The array of PRCM GPIOCR registers on this SoC
|
||||
*/
|
||||
struct nmk_pinctrl_soc_data {
|
||||
struct pinctrl_gpio_range *gpio_ranges;
|
||||
unsigned gpio_num_ranges;
|
||||
const struct pinctrl_pin_desc *pins;
|
||||
unsigned npins;
|
||||
const struct nmk_function *functions;
|
||||
unsigned nfunctions;
|
||||
const struct nmk_pingroup *groups;
|
||||
unsigned ngroups;
|
||||
const struct prcm_gpiocr_altcx_pin_desc *altcx_pins;
|
||||
unsigned npins_altcx;
|
||||
const u16 *prcm_gpiocr_registers;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PINCTRL_STN8815
|
||||
|
||||
void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_DB8500
|
||||
|
||||
void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_DB8540
|
||||
|
||||
void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void
|
||||
nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* PINCTRL_PINCTRL_NOMADIK_H */
|
||||
Loading…
Add table
Add a link
Reference in a new issue