mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 17:18:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
585
drivers/rtc/rtc-omap.c
Normal file
585
drivers/rtc/rtc-omap.c
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@ -0,0 +1,585 @@
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/*
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* TI OMAP1 Real Time Clock interface for Linux
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*
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* Copyright (C) 2003 MontaVista Software, Inc.
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* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
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*
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* Copyright (C) 2006 David Brownell (new RTC framework)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/io.h>
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/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
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* with century-range alarm matching, driven by the 32kHz clock.
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*
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* The main user-visible ways it differs from PC RTCs are by omitting
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* "don't care" alarm fields and sub-second periodic IRQs, and having
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* an autoadjust mechanism to calibrate to the true oscillator rate.
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*
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* Board-specific wiring options include using split power mode with
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* RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
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* and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
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* low power modes) for OMAP1 boards (OMAP-L138 has this built into
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* the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
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*/
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#define DRIVER_NAME "omap_rtc"
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#define OMAP_RTC_BASE 0xfffb4800
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/* RTC registers */
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#define OMAP_RTC_SECONDS_REG 0x00
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#define OMAP_RTC_MINUTES_REG 0x04
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#define OMAP_RTC_HOURS_REG 0x08
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#define OMAP_RTC_DAYS_REG 0x0C
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#define OMAP_RTC_MONTHS_REG 0x10
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#define OMAP_RTC_YEARS_REG 0x14
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#define OMAP_RTC_WEEKS_REG 0x18
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#define OMAP_RTC_ALARM_SECONDS_REG 0x20
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#define OMAP_RTC_ALARM_MINUTES_REG 0x24
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#define OMAP_RTC_ALARM_HOURS_REG 0x28
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#define OMAP_RTC_ALARM_DAYS_REG 0x2c
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#define OMAP_RTC_ALARM_MONTHS_REG 0x30
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#define OMAP_RTC_ALARM_YEARS_REG 0x34
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#define OMAP_RTC_CTRL_REG 0x40
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#define OMAP_RTC_STATUS_REG 0x44
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#define OMAP_RTC_INTERRUPTS_REG 0x48
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#define OMAP_RTC_COMP_LSB_REG 0x4c
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#define OMAP_RTC_COMP_MSB_REG 0x50
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#define OMAP_RTC_OSC_REG 0x54
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#define OMAP_RTC_KICK0_REG 0x6c
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#define OMAP_RTC_KICK1_REG 0x70
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#define OMAP_RTC_IRQWAKEEN 0x7c
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/* OMAP_RTC_CTRL_REG bit fields: */
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#define OMAP_RTC_CTRL_SPLIT BIT(7)
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#define OMAP_RTC_CTRL_DISABLE BIT(6)
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#define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
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#define OMAP_RTC_CTRL_TEST BIT(4)
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#define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
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#define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
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#define OMAP_RTC_CTRL_ROUND_30S BIT(1)
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#define OMAP_RTC_CTRL_STOP BIT(0)
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/* OMAP_RTC_STATUS_REG bit fields: */
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#define OMAP_RTC_STATUS_POWER_UP BIT(7)
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#define OMAP_RTC_STATUS_ALARM BIT(6)
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#define OMAP_RTC_STATUS_1D_EVENT BIT(5)
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#define OMAP_RTC_STATUS_1H_EVENT BIT(4)
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#define OMAP_RTC_STATUS_1M_EVENT BIT(3)
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#define OMAP_RTC_STATUS_1S_EVENT BIT(2)
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#define OMAP_RTC_STATUS_RUN BIT(1)
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#define OMAP_RTC_STATUS_BUSY BIT(0)
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/* OMAP_RTC_INTERRUPTS_REG bit fields: */
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#define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
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#define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
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/* OMAP_RTC_OSC_REG bit fields: */
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#define OMAP_RTC_OSC_32KCLK_EN BIT(6)
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/* OMAP_RTC_IRQWAKEEN bit fields: */
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#define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
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/* OMAP_RTC_KICKER values */
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#define KICK0_VALUE 0x83e70b13
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#define KICK1_VALUE 0x95a4f1e0
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#define OMAP_RTC_HAS_KICKER BIT(0)
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/*
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* Few RTC IP revisions has special WAKE-EN Register to enable Wakeup
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* generation for event Alarm.
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*/
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#define OMAP_RTC_HAS_IRQWAKEEN BIT(1)
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/*
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* Some RTC IP revisions (like those in AM335x and DRA7x) need
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* the 32KHz clock to be explicitly enabled.
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*/
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#define OMAP_RTC_HAS_32KCLK_EN BIT(2)
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static void __iomem *rtc_base;
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#define rtc_read(addr) readb(rtc_base + (addr))
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#define rtc_write(val, addr) writeb(val, rtc_base + (addr))
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#define rtc_writel(val, addr) writel(val, rtc_base + (addr))
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/* we rely on the rtc framework to handle locking (rtc->ops_lock),
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* so the only other requirement is that register accesses which
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* require BUSY to be clear are made with IRQs locally disabled
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*/
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static void rtc_wait_not_busy(void)
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{
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int count = 0;
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u8 status;
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/* BUSY may stay active for 1/32768 second (~30 usec) */
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for (count = 0; count < 50; count++) {
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status = rtc_read(OMAP_RTC_STATUS_REG);
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if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
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break;
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udelay(1);
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}
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/* now we have ~15 usec to read/write various registers */
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}
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static irqreturn_t rtc_irq(int irq, void *rtc)
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{
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unsigned long events = 0;
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u8 irq_data;
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irq_data = rtc_read(OMAP_RTC_STATUS_REG);
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/* alarm irq? */
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if (irq_data & OMAP_RTC_STATUS_ALARM) {
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rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
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events |= RTC_IRQF | RTC_AF;
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}
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/* 1/sec periodic/update irq? */
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if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
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events |= RTC_IRQF | RTC_UF;
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rtc_update_irq(rtc, 1, events);
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return IRQ_HANDLED;
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}
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static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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u8 reg, irqwake_reg = 0;
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struct platform_device *pdev = to_platform_device(dev);
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const struct platform_device_id *id_entry =
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platform_get_device_id(pdev);
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local_irq_disable();
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rtc_wait_not_busy();
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reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
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if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
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irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
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if (enabled) {
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reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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} else {
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reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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}
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rtc_wait_not_busy();
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rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
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if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
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rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
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local_irq_enable();
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return 0;
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}
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/* this hardware doesn't support "don't care" alarm fields */
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static int tm2bcd(struct rtc_time *tm)
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{
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if (rtc_valid_tm(tm) != 0)
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return -EINVAL;
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tm->tm_sec = bin2bcd(tm->tm_sec);
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tm->tm_min = bin2bcd(tm->tm_min);
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tm->tm_hour = bin2bcd(tm->tm_hour);
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tm->tm_mday = bin2bcd(tm->tm_mday);
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tm->tm_mon = bin2bcd(tm->tm_mon + 1);
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/* epoch == 1900 */
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if (tm->tm_year < 100 || tm->tm_year > 199)
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return -EINVAL;
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tm->tm_year = bin2bcd(tm->tm_year - 100);
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return 0;
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}
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static void bcd2tm(struct rtc_time *tm)
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{
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tm->tm_sec = bcd2bin(tm->tm_sec);
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tm->tm_min = bcd2bin(tm->tm_min);
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tm->tm_hour = bcd2bin(tm->tm_hour);
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tm->tm_mday = bcd2bin(tm->tm_mday);
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tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
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/* epoch == 1900 */
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tm->tm_year = bcd2bin(tm->tm_year) + 100;
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}
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static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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/* we don't report wday/yday/isdst ... */
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local_irq_disable();
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rtc_wait_not_busy();
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tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
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tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
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tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
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tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
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tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
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tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
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local_irq_enable();
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bcd2tm(tm);
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return 0;
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}
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static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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if (tm2bcd(tm) < 0)
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return -EINVAL;
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local_irq_disable();
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rtc_wait_not_busy();
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rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
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rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
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rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
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rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
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rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
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rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
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local_irq_enable();
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return 0;
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}
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static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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local_irq_disable();
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rtc_wait_not_busy();
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alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
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alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
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alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
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alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
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alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
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alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
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local_irq_enable();
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bcd2tm(&alm->time);
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alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
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& OMAP_RTC_INTERRUPTS_IT_ALARM);
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return 0;
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}
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static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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u8 reg, irqwake_reg = 0;
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struct platform_device *pdev = to_platform_device(dev);
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const struct platform_device_id *id_entry =
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platform_get_device_id(pdev);
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if (tm2bcd(&alm->time) < 0)
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return -EINVAL;
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local_irq_disable();
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rtc_wait_not_busy();
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rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
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rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
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rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
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rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
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rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
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rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
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reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
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if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
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irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
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if (alm->enabled) {
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reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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} else {
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reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
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irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
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}
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rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
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if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
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rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
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local_irq_enable();
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return 0;
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}
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static struct rtc_class_ops omap_rtc_ops = {
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.read_time = omap_rtc_read_time,
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.set_time = omap_rtc_set_time,
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.read_alarm = omap_rtc_read_alarm,
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.set_alarm = omap_rtc_set_alarm,
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.alarm_irq_enable = omap_rtc_alarm_irq_enable,
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};
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static int omap_rtc_alarm;
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static int omap_rtc_timer;
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#define OMAP_RTC_DATA_AM3352_IDX 1
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#define OMAP_RTC_DATA_DA830_IDX 2
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static struct platform_device_id omap_rtc_devtype[] = {
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{
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.name = DRIVER_NAME,
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},
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[OMAP_RTC_DATA_AM3352_IDX] = {
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.name = "am3352-rtc",
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.driver_data = OMAP_RTC_HAS_KICKER | OMAP_RTC_HAS_IRQWAKEEN |
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OMAP_RTC_HAS_32KCLK_EN,
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},
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[OMAP_RTC_DATA_DA830_IDX] = {
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.name = "da830-rtc",
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.driver_data = OMAP_RTC_HAS_KICKER,
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},
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{},
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};
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MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
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static const struct of_device_id omap_rtc_of_match[] = {
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{ .compatible = "ti,da830-rtc",
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.data = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
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},
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{ .compatible = "ti,am3352-rtc",
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.data = &omap_rtc_devtype[OMAP_RTC_DATA_AM3352_IDX],
|
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},
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{},
|
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};
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MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
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||||
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static int __init omap_rtc_probe(struct platform_device *pdev)
|
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{
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struct resource *res;
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struct rtc_device *rtc;
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u8 reg, new_ctrl;
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const struct platform_device_id *id_entry;
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const struct of_device_id *of_id;
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of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
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if (of_id)
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pdev->id_entry = of_id->data;
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id_entry = platform_get_device_id(pdev);
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if (!id_entry) {
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dev_err(&pdev->dev, "no matching device entry\n");
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return -ENODEV;
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}
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omap_rtc_timer = platform_get_irq(pdev, 0);
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if (omap_rtc_timer <= 0) {
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pr_debug("%s: no update irq?\n", pdev->name);
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return -ENOENT;
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}
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omap_rtc_alarm = platform_get_irq(pdev, 1);
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if (omap_rtc_alarm <= 0) {
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pr_debug("%s: no alarm irq?\n", pdev->name);
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return -ENOENT;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
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rtc_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(rtc_base))
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return PTR_ERR(rtc_base);
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/* Enable the clock/module so that we can access the registers */
|
||||
pm_runtime_enable(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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||||
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if (id_entry->driver_data & OMAP_RTC_HAS_KICKER) {
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rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
|
||||
rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
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||||
}
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||||
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||||
device_init_wakeup(&pdev->dev, true);
|
||||
|
||||
rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
|
||||
&omap_rtc_ops, THIS_MODULE);
|
||||
if (IS_ERR(rtc)) {
|
||||
pr_debug("%s: can't register RTC device, err %ld\n",
|
||||
pdev->name, PTR_ERR(rtc));
|
||||
goto fail0;
|
||||
}
|
||||
platform_set_drvdata(pdev, rtc);
|
||||
|
||||
/* clear pending irqs, and set 1/second periodic,
|
||||
* which we'll use instead of update irqs
|
||||
*/
|
||||
rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
|
||||
|
||||
/* enable RTC functional clock */
|
||||
if (id_entry->driver_data & OMAP_RTC_HAS_32KCLK_EN) {
|
||||
reg = rtc_read(OMAP_RTC_OSC_REG);
|
||||
rtc_writel(reg | OMAP_RTC_OSC_32KCLK_EN, OMAP_RTC_OSC_REG);
|
||||
}
|
||||
|
||||
/* clear old status */
|
||||
reg = rtc_read(OMAP_RTC_STATUS_REG);
|
||||
if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
|
||||
pr_info("%s: RTC power up reset detected\n",
|
||||
pdev->name);
|
||||
rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
|
||||
}
|
||||
if (reg & (u8) OMAP_RTC_STATUS_ALARM)
|
||||
rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
|
||||
|
||||
/* handle periodic and alarm irqs */
|
||||
if (devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0,
|
||||
dev_name(&rtc->dev), rtc)) {
|
||||
pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
|
||||
pdev->name, omap_rtc_timer);
|
||||
goto fail0;
|
||||
}
|
||||
if ((omap_rtc_timer != omap_rtc_alarm) &&
|
||||
(devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0,
|
||||
dev_name(&rtc->dev), rtc))) {
|
||||
pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
|
||||
pdev->name, omap_rtc_alarm);
|
||||
goto fail0;
|
||||
}
|
||||
|
||||
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
|
||||
reg = rtc_read(OMAP_RTC_CTRL_REG);
|
||||
if (reg & (u8) OMAP_RTC_CTRL_STOP)
|
||||
pr_info("%s: already running\n", pdev->name);
|
||||
|
||||
/* force to 24 hour mode */
|
||||
new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
|
||||
new_ctrl |= OMAP_RTC_CTRL_STOP;
|
||||
|
||||
/* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
|
||||
*
|
||||
* - Device wake-up capability setting should come through chip
|
||||
* init logic. OMAP1 boards should initialize the "wakeup capable"
|
||||
* flag in the platform device if the board is wired right for
|
||||
* being woken up by RTC alarm. For OMAP-L138, this capability
|
||||
* is built into the SoC by the "Deep Sleep" capability.
|
||||
*
|
||||
* - Boards wired so RTC_ON_nOFF is used as the reset signal,
|
||||
* rather than nPWRON_RESET, should forcibly enable split
|
||||
* power mode. (Some chip errata report that RTC_CTRL_SPLIT
|
||||
* is write-only, and always reads as zero...)
|
||||
*/
|
||||
|
||||
if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
|
||||
pr_info("%s: split power mode\n", pdev->name);
|
||||
|
||||
if (reg != new_ctrl)
|
||||
rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
|
||||
|
||||
return 0;
|
||||
|
||||
fail0:
|
||||
device_init_wakeup(&pdev->dev, false);
|
||||
if (id_entry->driver_data & OMAP_RTC_HAS_KICKER)
|
||||
rtc_writel(0, OMAP_RTC_KICK0_REG);
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
static int __exit omap_rtc_remove(struct platform_device *pdev)
|
||||
{
|
||||
const struct platform_device_id *id_entry =
|
||||
platform_get_device_id(pdev);
|
||||
|
||||
device_init_wakeup(&pdev->dev, 0);
|
||||
|
||||
/* leave rtc running, but disable irqs */
|
||||
rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
|
||||
|
||||
if (id_entry->driver_data & OMAP_RTC_HAS_KICKER)
|
||||
rtc_writel(0, OMAP_RTC_KICK0_REG);
|
||||
|
||||
/* Disable the clock/module */
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static u8 irqstat;
|
||||
|
||||
static int omap_rtc_suspend(struct device *dev)
|
||||
{
|
||||
irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
|
||||
|
||||
/* FIXME the RTC alarm is not currently acting as a wakeup event
|
||||
* source on some platforms, and in fact this enable() call is just
|
||||
* saving a flag that's never used...
|
||||
*/
|
||||
if (device_may_wakeup(dev))
|
||||
enable_irq_wake(omap_rtc_alarm);
|
||||
else
|
||||
rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
|
||||
|
||||
/* Disable the clock/module */
|
||||
pm_runtime_put_sync(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int omap_rtc_resume(struct device *dev)
|
||||
{
|
||||
/* Enable the clock/module so that we can access the registers */
|
||||
pm_runtime_get_sync(dev);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
disable_irq_wake(omap_rtc_alarm);
|
||||
else
|
||||
rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
|
||||
|
||||
static void omap_rtc_shutdown(struct platform_device *pdev)
|
||||
{
|
||||
rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
|
||||
}
|
||||
|
||||
MODULE_ALIAS("platform:omap_rtc");
|
||||
static struct platform_driver omap_rtc_driver = {
|
||||
.remove = __exit_p(omap_rtc_remove),
|
||||
.shutdown = omap_rtc_shutdown,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.pm = &omap_rtc_pm_ops,
|
||||
.of_match_table = omap_rtc_of_match,
|
||||
},
|
||||
.id_table = omap_rtc_devtype,
|
||||
};
|
||||
|
||||
module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
|
||||
|
||||
MODULE_AUTHOR("George G. Davis (and others)");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Add table
Add a link
Reference in a new issue