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Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
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85
drivers/scsi/megaraid/Kconfig.megaraid Normal file
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config MEGARAID_NEWGEN
bool "LSI Logic New Generation RAID Device Drivers"
depends on PCI && SCSI
help
LSI Logic RAID Device Drivers
config MEGARAID_MM
tristate "LSI Logic Management Module (New Driver)"
depends on PCI && SCSI && MEGARAID_NEWGEN
help
Management Module provides ioctl, sysfs support for LSI Logic
RAID controllers.
To compile this driver as a module, choose M here: the
module will be called megaraid_mm
config MEGARAID_MAILBOX
tristate "LSI Logic MegaRAID Driver (New Driver)"
depends on PCI && SCSI && MEGARAID_MM
help
List of supported controllers
OEM Product Name VID :DID :SVID:SSID
--- ------------ ---- ---- ---- ----
Dell PERC3/QC 101E:1960:1028:0471
Dell PERC3/DC 101E:1960:1028:0493
Dell PERC3/SC 101E:1960:1028:0475
Dell PERC3/Di 1028:000E:1028:0123
Dell PERC4/SC 1000:1960:1028:0520
Dell PERC4/DC 1000:1960:1028:0518
Dell PERC4/QC 1000:0407:1028:0531
Dell PERC4/Di 1028:000F:1028:014A
Dell PERC 4e/Si 1028:0013:1028:016c
Dell PERC 4e/Di 1028:0013:1028:016d
Dell PERC 4e/Di 1028:0013:1028:016e
Dell PERC 4e/Di 1028:0013:1028:016f
Dell PERC 4e/Di 1028:0013:1028:0170
Dell PERC 4e/DC 1000:0408:1028:0002
Dell PERC 4e/SC 1000:0408:1028:0001
LSI MegaRAID SCSI 320-0 1000:1960:1000:A520
LSI MegaRAID SCSI 320-1 1000:1960:1000:0520
LSI MegaRAID SCSI 320-2 1000:1960:1000:0518
LSI MegaRAID SCSI 320-0X 1000:0407:1000:0530
LSI MegaRAID SCSI 320-2X 1000:0407:1000:0532
LSI MegaRAID SCSI 320-4X 1000:0407:1000:0531
LSI MegaRAID SCSI 320-1E 1000:0408:1000:0001
LSI MegaRAID SCSI 320-2E 1000:0408:1000:0002
LSI MegaRAID SATA 150-4 1000:1960:1000:4523
LSI MegaRAID SATA 150-6 1000:1960:1000:0523
LSI MegaRAID SATA 300-4X 1000:0409:1000:3004
LSI MegaRAID SATA 300-8X 1000:0409:1000:3008
INTEL RAID Controller SRCU42X 1000:0407:8086:0532
INTEL RAID Controller SRCS16 1000:1960:8086:0523
INTEL RAID Controller SRCU42E 1000:0408:8086:0002
INTEL RAID Controller SRCZCRX 1000:0407:8086:0530
INTEL RAID Controller SRCS28X 1000:0409:8086:3008
INTEL RAID Controller SROMBU42E 1000:0408:8086:3431
INTEL RAID Controller SROMBU42E 1000:0408:8086:3499
INTEL RAID Controller SRCU51L 1000:1960:8086:0520
FSC MegaRAID PCI Express ROMB 1000:0408:1734:1065
ACER MegaRAID ROMB-2E 1000:0408:1025:004D
NEC MegaRAID PCI Express ROMB 1000:0408:1033:8287
To compile this driver as a module, choose M here: the
module will be called megaraid_mbox
config MEGARAID_LEGACY
tristate "LSI Logic Legacy MegaRAID Driver"
depends on PCI && SCSI
help
This driver supports the LSI MegaRAID 418, 428, 438, 466, 762, 490
and 467 SCSI host adapters. This driver also support the all U320
RAID controllers
To compile this driver as a module, choose M here: the
module will be called megaraid
config MEGARAID_SAS
tristate "LSI Logic MegaRAID SAS RAID Module"
depends on PCI && SCSI
help
Module for LSI Logic's SAS based RAID controllers.
To compile this driver as a module, choose 'm' here.
Module will be called megaraid_sas

5
drivers/scsi/megaraid/Makefile Normal file
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obj-$(CONFIG_MEGARAID_MM) += megaraid_mm.o
obj-$(CONFIG_MEGARAID_MAILBOX) += megaraid_mbox.o
obj-$(CONFIG_MEGARAID_SAS) += megaraid_sas.o
megaraid_sas-objs := megaraid_sas_base.o megaraid_sas_fusion.o \
megaraid_sas_fp.o

790
drivers/scsi/megaraid/mbox_defs.h Normal file
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/*
*
* Linux MegaRAID Unified device driver
*
* Copyright (c) 2003-2004 LSI Logic Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* FILE : mbox_defs.h
*
*/
#ifndef _MRAID_MBOX_DEFS_H_
#define _MRAID_MBOX_DEFS_H_
#include <linux/types.h>
/*
* Commands and states for mailbox based controllers
*/
#define MBOXCMD_LREAD 0x01
#define MBOXCMD_LWRITE 0x02
#define MBOXCMD_PASSTHRU 0x03
#define MBOXCMD_ADPEXTINQ 0x04
#define MBOXCMD_ADAPTERINQ 0x05
#define MBOXCMD_LREAD64 0xA7
#define MBOXCMD_LWRITE64 0xA8
#define MBOXCMD_PASSTHRU64 0xC3
#define MBOXCMD_EXTPTHRU 0xE3
#define MAIN_MISC_OPCODE 0xA4
#define GET_MAX_SG_SUPPORT 0x01
#define SUPPORT_EXT_CDB 0x16
#define FC_NEW_CONFIG 0xA1
#define NC_SUBOP_PRODUCT_INFO 0x0E
#define NC_SUBOP_ENQUIRY3 0x0F
#define ENQ3_GET_SOLICITED_FULL 0x02
#define OP_DCMD_READ_CONFIG 0x04
#define NEW_READ_CONFIG_8LD 0x67
#define READ_CONFIG_8LD 0x07
#define FLUSH_ADAPTER 0x0A
#define FLUSH_SYSTEM 0xFE
/*
* Command for random deletion of logical drives
*/
#define FC_DEL_LOGDRV 0xA4
#define OP_SUP_DEL_LOGDRV 0x2A
#define OP_GET_LDID_MAP 0x18
#define OP_DEL_LOGDRV 0x1C
/*
* BIOS commands
*/
#define IS_BIOS_ENABLED 0x62
#define GET_BIOS 0x01
#define CHNL_CLASS 0xA9
#define GET_CHNL_CLASS 0x00
#define SET_CHNL_CLASS 0x01
#define CH_RAID 0x01
#define CH_SCSI 0x00
#define BIOS_PVT_DATA 0x40
#define GET_BIOS_PVT_DATA 0x00
/*
* Commands to support clustering
*/
#define GET_TARGET_ID 0x7D
#define CLUSTER_OP 0x70
#define GET_CLUSTER_MODE 0x02
#define CLUSTER_CMD 0x6E
#define RESERVE_LD 0x01
#define RELEASE_LD 0x02
#define RESET_RESERVATIONS 0x03
#define RESERVATION_STATUS 0x04
#define RESERVE_PD 0x05
#define RELEASE_PD 0x06
/*
* Module battery status
*/
#define BATTERY_MODULE_MISSING 0x01
#define BATTERY_LOW_VOLTAGE 0x02
#define BATTERY_TEMP_HIGH 0x04
#define BATTERY_PACK_MISSING 0x08
#define BATTERY_CHARGE_MASK 0x30
#define BATTERY_CHARGE_DONE 0x00
#define BATTERY_CHARGE_INPROG 0x10
#define BATTERY_CHARGE_FAIL 0x20
#define BATTERY_CYCLES_EXCEEDED 0x40
/*
* Physical drive states.
*/
#define PDRV_UNCNF 0
#define PDRV_ONLINE 3
#define PDRV_FAILED 4
#define PDRV_RBLD 5
#define PDRV_HOTSPARE 6
/*
* Raid logical drive states.
*/
#define RDRV_OFFLINE 0
#define RDRV_DEGRADED 1
#define RDRV_OPTIMAL 2
#define RDRV_DELETED 3
/*
* Read, write and cache policies
*/
#define NO_READ_AHEAD 0
#define READ_AHEAD 1
#define ADAP_READ_AHEAD 2
#define WRMODE_WRITE_THRU 0
#define WRMODE_WRITE_BACK 1
#define CACHED_IO 0
#define DIRECT_IO 1
#define MAX_LOGICAL_DRIVES_8LD 8
#define MAX_LOGICAL_DRIVES_40LD 40
#define FC_MAX_PHYSICAL_DEVICES 256
#define MAX_MBOX_CHANNELS 5
#define MAX_MBOX_TARGET 15
#define MBOX_MAX_PHYSICAL_DRIVES MAX_MBOX_CHANNELS*MAX_MBOX_TARGET
#define MAX_ROW_SIZE_40LD 32
#define MAX_ROW_SIZE_8LD 8
#define SPAN_DEPTH_8_SPANS 8
#define SPAN_DEPTH_4_SPANS 4
#define MAX_REQ_SENSE_LEN 0x20
/**
* struct mbox_t - Driver and f/w handshake structure.
* @cmd : firmware command
* @cmdid : command id
* @numsectors : number of sectors to be transferred
* @lba : Logical Block Address on LD
* @xferaddr : DMA address for data transfer
* @logdrv : logical drive number
* @numsge : number of scatter gather elements in sg list
* @resvd : reserved
* @busy : f/w busy, must wait to issue more commands.
* @numstatus : number of commands completed.
* @status : status of the commands completed
* @completed : array of completed command ids.
* @poll : poll and ack sequence
* @ack : poll and ack sequence
*
* The central handshake structure between the driver and the firmware. This
* structure must be allocated by the driver and aligned at 8-byte boundary.
*/
#define MBOX_MAX_FIRMWARE_STATUS 46
typedef struct {
uint8_t cmd;
uint8_t cmdid;
uint16_t numsectors;
uint32_t lba;
uint32_t xferaddr;
uint8_t logdrv;
uint8_t numsge;
uint8_t resvd;
uint8_t busy;
uint8_t numstatus;
uint8_t status;
uint8_t completed[MBOX_MAX_FIRMWARE_STATUS];
uint8_t poll;
uint8_t ack;
} __attribute__ ((packed)) mbox_t;
/**
* mbox64_t - 64-bit extension for the mailbox
* @segment_lo : the low 32-bits of the address of the scatter-gather list
* @segment_hi : the upper 32-bits of the address of the scatter-gather list
* @mbox : 32-bit mailbox, whose xferadder field must be set to
* 0xFFFFFFFF
*
* This is the extension of the 32-bit mailbox to be able to perform DMA
* beyond 4GB address range.
*/
typedef struct {
uint32_t xferaddr_lo;
uint32_t xferaddr_hi;
mbox_t mbox32;
} __attribute__ ((packed)) mbox64_t;
/*
* mailbox structure used for internal commands
*/
typedef struct {
u8 cmd;
u8 cmdid;
u8 opcode;
u8 subopcode;
u32 lba;
u32 xferaddr;
u8 logdrv;
u8 rsvd[3];
u8 numstatus;
u8 status;
} __attribute__ ((packed)) int_mbox_t;
/**
* mraid_passthru_t - passthru structure to issue commands to physical devices
* @timeout : command timeout, 0=6sec, 1=60sec, 2=10min, 3=3hr
* @ars : set if ARS required after check condition
* @islogical : set if command meant for logical devices
* @logdrv : logical drive number if command for LD
* @channel : Channel on which physical device is located
* @target : SCSI target of the device
* @queuetag : unused
* @queueaction : unused
* @cdb : SCSI CDB
* @cdblen : length of the CDB
* @reqsenselen : amount of request sense data to be returned
* @reqsensearea : Sense information buffer
* @numsge : number of scatter-gather elements in the sg list
* @scsistatus : SCSI status of the command completed.
* @dataxferaddr : DMA data transfer address
* @dataxferlen : amount of the data to be transferred.
*/
typedef struct {
uint8_t timeout :3;
uint8_t ars :1;
uint8_t reserved :3;
uint8_t islogical :1;
uint8_t logdrv;
uint8_t channel;
uint8_t target;
uint8_t queuetag;
uint8_t queueaction;
uint8_t cdb[10];
uint8_t cdblen;
uint8_t reqsenselen;
uint8_t reqsensearea[MAX_REQ_SENSE_LEN];
uint8_t numsge;
uint8_t scsistatus;
uint32_t dataxferaddr;
uint32_t dataxferlen;
} __attribute__ ((packed)) mraid_passthru_t;
typedef struct {
uint32_t dataxferaddr_lo;
uint32_t dataxferaddr_hi;
mraid_passthru_t pthru32;
} __attribute__ ((packed)) mega_passthru64_t;
/**
* mraid_epassthru_t - passthru structure to issue commands to physical devices
* @timeout : command timeout, 0=6sec, 1=60sec, 2=10min, 3=3hr
* @ars : set if ARS required after check condition
* @rsvd1 : reserved field
* @cd_rom : (?)
* @rsvd2 : reserved field
* @islogical : set if command meant for logical devices
* @logdrv : logical drive number if command for LD
* @channel : Channel on which physical device is located
* @target : SCSI target of the device
* @queuetag : unused
* @queueaction : unused
* @cdblen : length of the CDB
* @rsvd3 : reserved field
* @cdb : SCSI CDB
* @numsge : number of scatter-gather elements in the sg list
* @status : SCSI status of the command completed.
* @reqsenselen : amount of request sense data to be returned
* @reqsensearea : Sense information buffer
* @rsvd4 : reserved field
* @dataxferaddr : DMA data transfer address
* @dataxferlen : amount of the data to be transferred.
*/
typedef struct {
uint8_t timeout :3;
uint8_t ars :1;
uint8_t rsvd1 :1;
uint8_t cd_rom :1;
uint8_t rsvd2 :1;
uint8_t islogical :1;
uint8_t logdrv;
uint8_t channel;
uint8_t target;
uint8_t queuetag;
uint8_t queueaction;
uint8_t cdblen;
uint8_t rsvd3;
uint8_t cdb[16];
uint8_t numsge;
uint8_t status;
uint8_t reqsenselen;
uint8_t reqsensearea[MAX_REQ_SENSE_LEN];
uint8_t rsvd4;
uint32_t dataxferaddr;
uint32_t dataxferlen;
} __attribute__ ((packed)) mraid_epassthru_t;
/**
* mraid_pinfo_t - product info, static information about the controller
* @data_size : current size in bytes (not including resvd)
* @config_signature : Current value is 0x00282008
* @fw_version : Firmware version
* @bios_version : version of the BIOS
* @product_name : Name given to the controller
* @max_commands : Maximum concurrent commands supported
* @nchannels : Number of SCSI Channels detected
* @fc_loop_present : Number of Fibre Loops detected
* @mem_type : EDO, FPM, SDRAM etc
* @signature :
* @dram_size : In terms of MB
* @subsysid : device PCI subsystem ID
* @subsysvid : device PCI subsystem vendor ID
* @notify_counters :
* @pad1k : 135 + 889 resvd = 1024 total size
*
* This structures holds the information about the controller which is not
* expected to change dynamically.
*
* The current value of config signature is 0x00282008:
* 0x28 = MAX_LOGICAL_DRIVES,
* 0x20 = Number of stripes and
* 0x08 = Number of spans
*/
typedef struct {
uint32_t data_size;
uint32_t config_signature;
uint8_t fw_version[16];
uint8_t bios_version[16];
uint8_t product_name[80];
uint8_t max_commands;
uint8_t nchannels;
uint8_t fc_loop_present;
uint8_t mem_type;
uint32_t signature;
uint16_t dram_size;
uint16_t subsysid;
uint16_t subsysvid;
uint8_t notify_counters;
uint8_t pad1k[889];
} __attribute__ ((packed)) mraid_pinfo_t;
/**
* mraid_notify_t - the notification structure
* @global_counter : Any change increments this counter
* @param_counter : Indicates any params changed
* @param_id : Param modified - defined below
* @param_val : New val of last param modified
* @write_config_counter : write config occurred
* @write_config_rsvd :
* @ldrv_op_counter : Indicates ldrv op started/completed
* @ldrv_opid : ldrv num
* @ldrv_opcmd : ldrv operation - defined below
* @ldrv_opstatus : status of the operation
* @ldrv_state_counter : Indicates change of ldrv state
* @ldrv_state_id : ldrv num
* @ldrv_state_new : New state
* @ldrv_state_old : old state
* @pdrv_state_counter : Indicates change of ldrv state
* @pdrv_state_id : pdrv id
* @pdrv_state_new : New state
* @pdrv_state_old : old state
* @pdrv_fmt_counter : Indicates pdrv format started/over
* @pdrv_fmt_id : pdrv id
* @pdrv_fmt_val : format started/over
* @pdrv_fmt_rsvd :
* @targ_xfer_counter : Indicates SCSI-2 Xfer rate change
* @targ_xfer_id : pdrv Id
* @targ_xfer_val : new Xfer params of last pdrv
* @targ_xfer_rsvd :
* @fcloop_id_chg_counter : Indicates loopid changed
* @fcloopid_pdrvid : pdrv id
* @fcloop_id0 : loopid on fc loop 0
* @fcloop_id1 : loopid on fc loop 1
* @fcloop_state_counter : Indicates loop state changed
* @fcloop_state0 : state of fc loop 0
* @fcloop_state1 : state of fc loop 1
* @fcloop_state_rsvd :
*/
typedef struct {
uint32_t global_counter;
uint8_t param_counter;
uint8_t param_id;
uint16_t param_val;
uint8_t write_config_counter;
uint8_t write_config_rsvd[3];
uint8_t ldrv_op_counter;
uint8_t ldrv_opid;
uint8_t ldrv_opcmd;
uint8_t ldrv_opstatus;
uint8_t ldrv_state_counter;
uint8_t ldrv_state_id;
uint8_t ldrv_state_new;
uint8_t ldrv_state_old;
uint8_t pdrv_state_counter;
uint8_t pdrv_state_id;
uint8_t pdrv_state_new;
uint8_t pdrv_state_old;
uint8_t pdrv_fmt_counter;
uint8_t pdrv_fmt_id;
uint8_t pdrv_fmt_val;
uint8_t pdrv_fmt_rsvd;
uint8_t targ_xfer_counter;
uint8_t targ_xfer_id;
uint8_t targ_xfer_val;
uint8_t targ_xfer_rsvd;
uint8_t fcloop_id_chg_counter;
uint8_t fcloopid_pdrvid;
uint8_t fcloop_id0;
uint8_t fcloop_id1;
uint8_t fcloop_state_counter;
uint8_t fcloop_state0;
uint8_t fcloop_state1;
uint8_t fcloop_state_rsvd;
} __attribute__ ((packed)) mraid_notify_t;
/**
* mraid_inquiry3_t - enquiry for device information
*
* @data_size : current size in bytes (not including resvd)
* @notify :
* @notify_rsvd :
* @rebuild_rate : rebuild rate (0% - 100%)
* @cache_flush_int : cache flush interval in seconds
* @sense_alert :
* @drive_insert_count : drive insertion count
* @battery_status :
* @num_ldrv : no. of Log Drives configured
* @recon_state : state of reconstruct
* @ldrv_op_status : logdrv Status
* @ldrv_size : size of each log drv
* @ldrv_prop :
* @ldrv_state : state of log drives
* @pdrv_state : state of phys drvs.
* @pdrv_format :
* @targ_xfer : phys device transfer rate
* @pad1k : 761 + 263reserved = 1024 bytes total size
*/
#define MAX_NOTIFY_SIZE 0x80
#define CUR_NOTIFY_SIZE sizeof(mraid_notify_t)
typedef struct {
uint32_t data_size;
mraid_notify_t notify;
uint8_t notify_rsvd[MAX_NOTIFY_SIZE - CUR_NOTIFY_SIZE];
uint8_t rebuild_rate;
uint8_t cache_flush_int;
uint8_t sense_alert;
uint8_t drive_insert_count;
uint8_t battery_status;
uint8_t num_ldrv;
uint8_t recon_state[MAX_LOGICAL_DRIVES_40LD / 8];
uint16_t ldrv_op_status[MAX_LOGICAL_DRIVES_40LD / 8];
uint32_t ldrv_size[MAX_LOGICAL_DRIVES_40LD];
uint8_t ldrv_prop[MAX_LOGICAL_DRIVES_40LD];
uint8_t ldrv_state[MAX_LOGICAL_DRIVES_40LD];
uint8_t pdrv_state[FC_MAX_PHYSICAL_DEVICES];
uint16_t pdrv_format[FC_MAX_PHYSICAL_DEVICES / 16];
uint8_t targ_xfer[80];
uint8_t pad1k[263];
} __attribute__ ((packed)) mraid_inquiry3_t;
/**
* mraid_adapinfo_t - information about the adapter
* @max_commands : max concurrent commands supported
* @rebuild_rate : rebuild rate - 0% thru 100%
* @max_targ_per_chan : max targ per channel
* @nchannels : number of channels on HBA
* @fw_version : firmware version
* @age_of_flash : number of times FW has been flashed
* @chip_set_value : contents of 0xC0000832
* @dram_size : in MB
* @cache_flush_interval : in seconds
* @bios_version :
* @board_type :
* @sense_alert :
* @write_config_count : increase with every configuration change
* @drive_inserted_count : increase with every drive inserted
* @inserted_drive : channel:Id of inserted drive
* @battery_status : bit 0: battery module missing
* bit 1: VBAD
* bit 2: temperature high
* bit 3: battery pack missing
* bit 4,5:
* 00 - charge complete
* 01 - fast charge in progress
* 10 - fast charge fail
* 11 - undefined
* bit 6: counter > 1000
* bit 7: Undefined
* @dec_fault_bus_info :
*/
typedef struct {
uint8_t max_commands;
uint8_t rebuild_rate;
uint8_t max_targ_per_chan;
uint8_t nchannels;
uint8_t fw_version[4];
uint16_t age_of_flash;
uint8_t chip_set_value;
uint8_t dram_size;
uint8_t cache_flush_interval;
uint8_t bios_version[4];
uint8_t board_type;
uint8_t sense_alert;
uint8_t write_config_count;
uint8_t battery_status;
uint8_t dec_fault_bus_info;
} __attribute__ ((packed)) mraid_adapinfo_t;
/**
* mraid_ldrv_info_t - information about the logical drives
* @nldrv : Number of logical drives configured
* @rsvd :
* @size : size of each logical drive
* @prop :
* @state : state of each logical drive
*/
typedef struct {
uint8_t nldrv;
uint8_t rsvd[3];
uint32_t size[MAX_LOGICAL_DRIVES_8LD];
uint8_t prop[MAX_LOGICAL_DRIVES_8LD];
uint8_t state[MAX_LOGICAL_DRIVES_8LD];
} __attribute__ ((packed)) mraid_ldrv_info_t;
/**
* mraid_pdrv_info_t - information about the physical drives
* @pdrv_state : state of each physical drive
*/
typedef struct {
uint8_t pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
uint8_t rsvd;
} __attribute__ ((packed)) mraid_pdrv_info_t;
/**
* mraid_inquiry_t - RAID inquiry, mailbox command 0x05
* @mraid_adapinfo_t : adapter information
* @mraid_ldrv_info_t : logical drives information
* @mraid_pdrv_info_t : physical drives information
*/
typedef struct {
mraid_adapinfo_t adapter_info;
mraid_ldrv_info_t logdrv_info;
mraid_pdrv_info_t pdrv_info;
} __attribute__ ((packed)) mraid_inquiry_t;
/**
* mraid_extinq_t - RAID extended inquiry, mailbox command 0x04
*
* @raid_inq : raid inquiry
* @phys_drv_format :
* @stack_attn :
* @modem_status :
* @rsvd :
*/
typedef struct {
mraid_inquiry_t raid_inq;
uint16_t phys_drv_format[MAX_MBOX_CHANNELS];
uint8_t stack_attn;
uint8_t modem_status;
uint8_t rsvd[2];
} __attribute__ ((packed)) mraid_extinq_t;
/**
* adap_device_t - device information
* @channel : channel fpor the device
* @target : target ID of the device
*/
typedef struct {
uint8_t channel;
uint8_t target;
}__attribute__ ((packed)) adap_device_t;
/**
* adap_span_40ld_t - 40LD span
* @start_blk : starting block
* @num_blks : number of blocks
*/
typedef struct {
uint32_t start_blk;
uint32_t num_blks;
adap_device_t device[MAX_ROW_SIZE_40LD];
}__attribute__ ((packed)) adap_span_40ld_t;
/**
* adap_span_8ld_t - 8LD span
* @start_blk : starting block
* @num_blks : number of blocks
*/
typedef struct {
uint32_t start_blk;
uint32_t num_blks;
adap_device_t device[MAX_ROW_SIZE_8LD];
}__attribute__ ((packed)) adap_span_8ld_t;
/**
* logdrv_param_t - logical drives parameters
*
* @span_depth : total number of spans
* @level : RAID level
* @read_ahead : read ahead, no read ahead, adaptive read ahead
* @stripe_sz : encoded stripe size
* @status : status of the logical drive
* @write_mode : write mode, write_through/write_back
* @direct_io : direct io or through cache
* @row_size : number of stripes in a row
*/
typedef struct {
uint8_t span_depth;
uint8_t level;
uint8_t read_ahead;
uint8_t stripe_sz;
uint8_t status;
uint8_t write_mode;
uint8_t direct_io;
uint8_t row_size;
} __attribute__ ((packed)) logdrv_param_t;
/**
* logdrv_40ld_t - logical drive definition for 40LD controllers
* @lparam : logical drives parameters
* @span : span
*/
typedef struct {
logdrv_param_t lparam;
adap_span_40ld_t span[SPAN_DEPTH_8_SPANS];
}__attribute__ ((packed)) logdrv_40ld_t;
/**
* logdrv_8ld_span8_t - logical drive definition for 8LD controllers
* @lparam : logical drives parameters
* @span : span
*
* 8-LD logical drive with up to 8 spans
*/
typedef struct {
logdrv_param_t lparam;
adap_span_8ld_t span[SPAN_DEPTH_8_SPANS];
}__attribute__ ((packed)) logdrv_8ld_span8_t;
/**
* logdrv_8ld_span4_t - logical drive definition for 8LD controllers
* @lparam : logical drives parameters
* @span : span
*
* 8-LD logical drive with up to 4 spans
*/
typedef struct {
logdrv_param_t lparam;
adap_span_8ld_t span[SPAN_DEPTH_4_SPANS];
}__attribute__ ((packed)) logdrv_8ld_span4_t;
/**
* phys_drive_t - physical device information
* @type : Type of the device
* @cur_status : current status of the device
* @tag_depth : Level of tagging
* @sync_neg : sync negotiation - ENABLE or DISABLE
* @size : configurable size in terms of 512 byte
*/
typedef struct {
uint8_t type;
uint8_t cur_status;
uint8_t tag_depth;
uint8_t sync_neg;
uint32_t size;
}__attribute__ ((packed)) phys_drive_t;
/**
* disk_array_40ld_t - disk array for 40LD controllers
* @numldrv : number of logical drives
* @resvd :
* @ldrv : logical drives information
* @pdrv : physical drives information
*/
typedef struct {
uint8_t numldrv;
uint8_t resvd[3];
logdrv_40ld_t ldrv[MAX_LOGICAL_DRIVES_40LD];
phys_drive_t pdrv[MBOX_MAX_PHYSICAL_DRIVES];
}__attribute__ ((packed)) disk_array_40ld_t;
/**
* disk_array_8ld_span8_t - disk array for 8LD controllers
* @numldrv : number of logical drives
* @resvd :
* @ldrv : logical drives information
* @pdrv : physical drives information
*
* Disk array for 8LD logical drives with up to 8 spans
*/
typedef struct {
uint8_t numldrv;
uint8_t resvd[3];
logdrv_8ld_span8_t ldrv[MAX_LOGICAL_DRIVES_8LD];
phys_drive_t pdrv[MBOX_MAX_PHYSICAL_DRIVES];
}__attribute__ ((packed)) disk_array_8ld_span8_t;
/**
* disk_array_8ld_span4_t - disk array for 8LD controllers
* @numldrv : number of logical drives
* @resvd :
* @ldrv : logical drives information
* @pdrv : physical drives information
*
* Disk array for 8LD logical drives with up to 4 spans
*/
typedef struct {
uint8_t numldrv;
uint8_t resvd[3];
logdrv_8ld_span4_t ldrv[MAX_LOGICAL_DRIVES_8LD];
phys_drive_t pdrv[MBOX_MAX_PHYSICAL_DRIVES];
}__attribute__ ((packed)) disk_array_8ld_span4_t;
/**
* struct private_bios_data - bios private data for boot devices
* @geometry : bits 0-3 - BIOS geometry, 0x0001 - 1GB, 0x0010 - 2GB,
* 0x1000 - 8GB, Others values are invalid
* @unused : bits 4-7 are unused
* @boot_drv : logical drive set as boot drive, 0..7 - for 8LD cards,
* 0..39 - for 40LD cards
* @cksum : 0-(sum of first 13 bytes of this structure)
*/
struct private_bios_data {
uint8_t geometry :4;
uint8_t unused :4;
uint8_t boot_drv;
uint8_t rsvd[12];
uint16_t cksum;
} __attribute__ ((packed));
/**
* mbox_sgl64 - 64-bit scatter list for mailbox based controllers
* @address : address of the buffer
* @length : data transfer length
*/
typedef struct {
uint64_t address;
uint32_t length;
} __attribute__ ((packed)) mbox_sgl64;
/**
* mbox_sgl32 - 32-bit scatter list for mailbox based controllers
* @address : address of the buffer
* @length : data transfer length
*/
typedef struct {
uint32_t address;
uint32_t length;
} __attribute__ ((packed)) mbox_sgl32;
#endif // _MRAID_MBOX_DEFS_H_
/* vim: set ts=8 sw=8 tw=78: */

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drivers/scsi/megaraid/mega_common.h Normal file
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/*
*
* Linux MegaRAID device driver
*
* Copyright (c) 2003-2004 LSI Logic Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* FILE : mega_common.h
*
* Libaray of common routine used by all low-level megaraid drivers
*/
#ifndef _MEGA_COMMON_H_
#define _MEGA_COMMON_H_
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/blkdev.h>
#include <linux/list.h>
#include <linux/moduleparam.h>
#include <linux/dma-mapping.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#define LSI_MAX_CHANNELS 16
#define LSI_MAX_LOGICAL_DRIVES_64LD (64+1)
#define HBA_SIGNATURE_64_BIT 0x299
#define PCI_CONF_AMISIG64 0xa4
#define MEGA_SCSI_INQ_EVPD 1
#define MEGA_INVALID_FIELD_IN_CDB 0x24
/**
* scb_t - scsi command control block
* @ccb : command control block for individual driver
* @list : list of control blocks
* @gp : general purpose field for LLDs
* @sno : all SCBs have a serial number
* @scp : associated scsi command
* @state : current state of scb
* @dma_dir : direction of data transfer
* @dma_type : transfer with sg list, buffer, or no data transfer
* @dev_channel : actual channel on the device
* @dev_target : actual target on the device
* @status : completion status
*
* This is our central data structure to issue commands the each driver.
* Driver specific data structures are maintained in the ccb field.
* scb provides a field 'gp', which can be used by LLD for its own purposes
*
* dev_channel and dev_target must be initialized with the actual channel and
* target on the controller.
*/
typedef struct {
caddr_t ccb;
struct list_head list;
unsigned long gp;
unsigned int sno;
struct scsi_cmnd *scp;
uint32_t state;
uint32_t dma_direction;
uint32_t dma_type;
uint16_t dev_channel;
uint16_t dev_target;
uint32_t status;
} scb_t;
/*
* SCB states as it transitions from one state to another
*/
#define SCB_FREE 0x0000 /* on the free list */
#define SCB_ACTIVE 0x0001 /* off the free list */
#define SCB_PENDQ 0x0002 /* on the pending queue */
#define SCB_ISSUED 0x0004 /* issued - owner f/w */
#define SCB_ABORT 0x0008 /* Got an abort for this one */
#define SCB_RESET 0x0010 /* Got a reset for this one */
/*
* DMA types for scb
*/
#define MRAID_DMA_NONE 0x0000 /* no data transfer for this command */
#define MRAID_DMA_WSG 0x0001 /* data transfer using a sg list */
#define MRAID_DMA_WBUF 0x0002 /* data transfer using a contiguous buffer */
/**
* struct adapter_t - driver's initialization structure
* @aram dpc_h : tasklet handle
* @pdev : pci configuration pointer for kernel
* @host : pointer to host structure of mid-layer
* @lock : synchronization lock for mid-layer and driver
* @quiescent : driver is quiescent for now.
* @outstanding_cmds : number of commands pending in the driver
* @kscb_list : pointer to the bulk of SCBs pointers for IO
* @kscb_pool : pool of free scbs for IO
* @kscb_pool_lock : lock for pool of free scbs
* @pend_list : pending commands list
* @pend_list_lock : exclusion lock for pending commands list
* @completed_list : list of completed commands
* @completed_list_lock : exclusion lock for list of completed commands
* @sglen : max sg elements supported
* @device_ids : to convert kernel device addr to our devices.
* @raid_device : raid adapter specific pointer
* @max_channel : maximum channel number supported - inclusive
* @max_target : max target supported - inclusive
* @max_lun : max lun supported - inclusive
* @unique_id : unique identifier for each adapter
* @irq : IRQ for this adapter
* @ito : internal timeout value, (-1) means no timeout
* @ibuf : buffer to issue internal commands
* @ibuf_dma_h : dma handle for the above buffer
* @uscb_list : SCB pointers for user cmds, common mgmt module
* @uscb_pool : pool of SCBs for user commands
* @uscb_pool_lock : exclusion lock for these SCBs
* @max_cmds : max outstanding commands
* @fw_version : firmware version
* @bios_version : bios version
* @max_cdb_sz : biggest CDB size supported.
* @ha : is high availability present - clustering
* @init_id : initiator ID, the default value should be 7
* @max_sectors : max sectors per request
* @cmd_per_lun : max outstanding commands per LUN
* @being_detached : set when unloading, no more mgmt calls
*
*
* mraid_setup_device_map() can be called anytime after the device map is
* available and MRAID_GET_DEVICE_MAP() can be called whenever the mapping is
* required, usually from LLD's queue entry point. The formar API sets up the
* MRAID_IS_LOGICAL(adapter_t *, struct scsi_cmnd *) to find out if the
* device in question is a logical drive.
*
* quiescent flag should be set by the driver if it is not accepting more
* commands
*
* NOTE: The fields of this structures are placed to minimize cache misses
*/
// amount of space required to store the bios and firmware version strings
#define VERSION_SIZE 16
typedef struct {
struct tasklet_struct dpc_h;
struct pci_dev *pdev;
struct Scsi_Host *host;
spinlock_t lock;
uint8_t quiescent;
int outstanding_cmds;
scb_t *kscb_list;
struct list_head kscb_pool;
spinlock_t kscb_pool_lock;
struct list_head pend_list;
spinlock_t pend_list_lock;
struct list_head completed_list;
spinlock_t completed_list_lock;
uint16_t sglen;
int device_ids[LSI_MAX_CHANNELS]
[LSI_MAX_LOGICAL_DRIVES_64LD];
caddr_t raid_device;
uint8_t max_channel;
uint16_t max_target;
uint8_t max_lun;
uint32_t unique_id;
int irq;
uint8_t ito;
caddr_t ibuf;
dma_addr_t ibuf_dma_h;
scb_t *uscb_list;
struct list_head uscb_pool;
spinlock_t uscb_pool_lock;
int max_cmds;
uint8_t fw_version[VERSION_SIZE];
uint8_t bios_version[VERSION_SIZE];
uint8_t max_cdb_sz;
uint8_t ha;
uint16_t init_id;
uint16_t max_sectors;
uint16_t cmd_per_lun;
atomic_t being_detached;
} adapter_t;
#define SCSI_FREE_LIST_LOCK(adapter) (&adapter->kscb_pool_lock)
#define USER_FREE_LIST_LOCK(adapter) (&adapter->uscb_pool_lock)
#define PENDING_LIST_LOCK(adapter) (&adapter->pend_list_lock)
#define COMPLETED_LIST_LOCK(adapter) (&adapter->completed_list_lock)
// conversion from scsi command
#define SCP2HOST(scp) (scp)->device->host // to host
#define SCP2HOSTDATA(scp) SCP2HOST(scp)->hostdata // to soft state
#define SCP2CHANNEL(scp) (scp)->device->channel // to channel
#define SCP2TARGET(scp) (scp)->device->id // to target
#define SCP2LUN(scp) (u32)(scp)->device->lun // to LUN
// generic macro to convert scsi command and host to controller's soft state
#define SCSIHOST2ADAP(host) (((caddr_t *)(host->hostdata))[0])
#define SCP2ADAPTER(scp) (adapter_t *)SCSIHOST2ADAP(SCP2HOST(scp))
#define MRAID_IS_LOGICAL(adp, scp) \
(SCP2CHANNEL(scp) == (adp)->max_channel) ? 1 : 0
#define MRAID_IS_LOGICAL_SDEV(adp, sdev) \
(sdev->channel == (adp)->max_channel) ? 1 : 0
/**
* MRAID_GET_DEVICE_MAP - device ids
* @adp : adapter's soft state
* @scp : mid-layer scsi command pointer
* @p_chan : physical channel on the controller
* @target : target id of the device or logical drive number
* @islogical : set if the command is for the logical drive
*
* Macro to retrieve information about device class, logical or physical and
* the corresponding physical channel and target or logical drive number
*/
#define MRAID_GET_DEVICE_MAP(adp, scp, p_chan, target, islogical) \
/* \
* Is the request coming for the virtual channel \
*/ \
islogical = MRAID_IS_LOGICAL(adp, scp); \
\
/* \
* Get an index into our table of drive ids mapping \
*/ \
if (islogical) { \
p_chan = 0xFF; \
target = \
(adp)->device_ids[(adp)->max_channel][SCP2TARGET(scp)]; \
} \
else { \
p_chan = ((adp)->device_ids[SCP2CHANNEL(scp)] \
[SCP2TARGET(scp)] >> 8) & 0xFF; \
target = ((adp)->device_ids[SCP2CHANNEL(scp)] \
[SCP2TARGET(scp)] & 0xFF); \
}
/*
* ### Helper routines ###
*/
#define LSI_DBGLVL mraid_debug_level // each LLD must define a global
// mraid_debug_level
#ifdef DEBUG
#if defined (_ASSERT_PANIC)
#define ASSERT_ACTION panic
#else
#define ASSERT_ACTION printk
#endif
#define ASSERT(expression) \
if (!(expression)) { \
ASSERT_ACTION("assertion failed:(%s), file: %s, line: %d:%s\n", \
#expression, __FILE__, __LINE__, __func__); \
}
#else
#define ASSERT(expression)
#endif
/**
* struct mraid_pci_blk - structure holds DMA memory block info
* @vaddr : virtual address to a memory block
* @dma_addr : DMA handle to a memory block
*
* This structure is filled up for the caller. It is the responsibilty of the
* caller to allocate this array big enough to store addresses for all
* requested elements
*/
struct mraid_pci_blk {
caddr_t vaddr;
dma_addr_t dma_addr;
};
#endif // _MEGA_COMMON_H_
// vim: set ts=8 sw=8 tw=78:

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drivers/scsi/megaraid/megaraid_ioctl.h Normal file
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/*
*
* Linux MegaRAID device driver
*
* Copyright (c) 2003-2004 LSI Logic Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* FILE : megaraid_ioctl.h
*
* Definitions to interface with user level applications
*/
#ifndef _MEGARAID_IOCTL_H_
#define _MEGARAID_IOCTL_H_
#include <linux/types.h>
#include <linux/semaphore.h>
#include "mbox_defs.h"
/*
* console messages debug levels
*/
#define CL_ANN 0 /* print unconditionally, announcements */
#define CL_DLEVEL1 1 /* debug level 1, informative */
#define CL_DLEVEL2 2 /* debug level 2, verbose */
#define CL_DLEVEL3 3 /* debug level 3, very verbose */
/**
* con_log() - console log routine
* @level : indicates the severity of the message.
* @fmt : format string
*
* con_log displays the error messages on the console based on the current
* debug level. Also it attaches the appropriate kernel severity level with
* the message.
*/
#define con_log(level, fmt) if (LSI_DBGLVL >= level) printk fmt;
/*
* Definitions & Declarations needed to use common management module
*/
#define MEGAIOC_MAGIC 'm'
#define MEGAIOCCMD _IOWR(MEGAIOC_MAGIC, 0, mimd_t)
#define MEGAIOC_QNADAP 'm' /* Query # of adapters */
#define MEGAIOC_QDRVRVER 'e' /* Query driver version */
#define MEGAIOC_QADAPINFO 'g' /* Query adapter information */
#define USCSICMD 0x80
#define UIOC_RD 0x00001
#define UIOC_WR 0x00002
#define MBOX_CMD 0x00000
#define GET_DRIVER_VER 0x10000
#define GET_N_ADAP 0x20000
#define GET_ADAP_INFO 0x30000
#define GET_CAP 0x40000
#define GET_STATS 0x50000
#define GET_IOCTL_VERSION 0x01
#define EXT_IOCTL_SIGN_SZ 16
#define EXT_IOCTL_SIGN "$$_EXTD_IOCTL_$$"
#define MBOX_LEGACY 0x00 /* ioctl has legacy mbox*/
#define MBOX_HPE 0x01 /* ioctl has hpe mbox */
#define APPTYPE_MIMD 0x00 /* old existing apps */
#define APPTYPE_UIOC 0x01 /* new apps using uioc */
#define IOCTL_ISSUE 0x00000001 /* Issue ioctl */
#define IOCTL_ABORT 0x00000002 /* Abort previous ioctl */
#define DRVRTYPE_MBOX 0x00000001 /* regular mbox driver */
#define DRVRTYPE_HPE 0x00000002 /* new hpe driver */
#define MKADAP(adapno) (MEGAIOC_MAGIC << 8 | (adapno) )
#define GETADAP(mkadap) ((mkadap) ^ MEGAIOC_MAGIC << 8)
#define MAX_DMA_POOLS 5 /* 4k, 8k, 16k, 32k, 64k*/
/**
* struct uioc_t - the common ioctl packet structure
*
* @signature : Must be "$$_EXTD_IOCTL_$$"
* @mb_type : Type of the mail box (MB_LEGACY or MB_HPE)
* @app_type : Type of the issuing application (existing or new)
* @opcode : Opcode of the command
* @adapno : Adapter number
* @cmdbuf : Pointer to buffer - can point to mbox or plain data buffer
* @xferlen : xferlen for DCMD and non mailbox commands
* @data_dir : Direction of the data transfer
* @status : Status from the driver
* @reserved : reserved bytes for future expansion
*
* @user_data : user data transfer address is saved in this
* @user_data_len: length of the data buffer sent by user app
* @user_pthru : user passthru address is saves in this (null if DCMD)
* @pthru32 : kernel address passthru (allocated per kioc)
* @pthru32_h : physicall address of @pthru32
* @list : for kioc free pool list maintenance
* @done : call back routine for llds to call when kioc is completed
* @buf_vaddr : dma pool buffer attached to kioc for data transfer
* @buf_paddr : physical address of the dma pool buffer
* @pool_index : index of the dma pool that @buf_vaddr is taken from
* @free_buf : indicates if buffer needs to be freed after kioc completes
*
* Note : All LSI drivers understand only this packet. Any other
* : format sent by applications would be converted to this.
*/
typedef struct uioc {
/* User Apps: */
uint8_t signature[EXT_IOCTL_SIGN_SZ];
uint16_t mb_type;
uint16_t app_type;
uint32_t opcode;
uint32_t adapno;
uint64_t cmdbuf;
uint32_t xferlen;
uint32_t data_dir;
int32_t status;
uint8_t reserved[128];
/* Driver Data: */
void __user * user_data;
uint32_t user_data_len;
/* 64bit alignment */
uint32_t pad_for_64bit_align;
mraid_passthru_t __user *user_pthru;
mraid_passthru_t *pthru32;
dma_addr_t pthru32_h;
struct list_head list;
void (*done)(struct uioc*);
caddr_t buf_vaddr;
dma_addr_t buf_paddr;
int8_t pool_index;
uint8_t free_buf;
uint8_t timedout;
} __attribute__ ((aligned(1024),packed)) uioc_t;
/**
* struct mraid_hba_info - information about the controller
*
* @pci_vendor_id : PCI vendor id
* @pci_device_id : PCI device id
* @subsystem_vendor_id : PCI subsystem vendor id
* @subsystem_device_id : PCI subsystem device id
* @baseport : base port of hba memory
* @pci_bus : PCI bus
* @pci_dev_fn : PCI device/function values
* @irq : interrupt vector for the device
*
* Extended information of 256 bytes about the controller. Align on the single
* byte boundary so that 32-bit applications can be run on 64-bit platform
* drivers withoug re-compilation.
* NOTE: reduce the number of reserved bytes whenever new field are added, so
* that total size of the structure remains 256 bytes.
*/
typedef struct mraid_hba_info {
uint16_t pci_vendor_id;
uint16_t pci_device_id;
uint16_t subsys_vendor_id;
uint16_t subsys_device_id;
uint64_t baseport;
uint8_t pci_bus;
uint8_t pci_dev_fn;
uint8_t pci_slot;
uint8_t irq;
uint32_t unique_id;
uint32_t host_no;
uint8_t num_ldrv;
} __attribute__ ((aligned(256), packed)) mraid_hba_info_t;
/**
* mcontroller : adapter info structure for old mimd_t apps
*
* @base : base address
* @irq : irq number
* @numldrv : number of logical drives
* @pcibus : pci bus
* @pcidev : pci device
* @pcifun : pci function
* @pciid : pci id
* @pcivendor : vendor id
* @pcislot : slot number
* @uid : unique id
*/
typedef struct mcontroller {
uint64_t base;
uint8_t irq;
uint8_t numldrv;
uint8_t pcibus;
uint16_t pcidev;
uint8_t pcifun;
uint16_t pciid;
uint16_t pcivendor;
uint8_t pcislot;
uint32_t uid;
} __attribute__ ((packed)) mcontroller_t;
/**
* mm_dmapool_t : Represents one dma pool with just one buffer
*
* @vaddr : Virtual address
* @paddr : DMA physicall address
* @bufsize : In KB - 4 = 4k, 8 = 8k etc.
* @handle : Handle to the dma pool
* @lock : lock to synchronize access to the pool
* @in_use : If pool already in use, attach new block
*/
typedef struct mm_dmapool {
caddr_t vaddr;
dma_addr_t paddr;
uint32_t buf_size;
struct dma_pool *handle;
spinlock_t lock;
uint8_t in_use;
} mm_dmapool_t;
/**
* mraid_mmadp_t: Structure that drivers pass during (un)registration
*
* @unique_id : Any unique id (usually PCI bus+dev+fn)
* @drvr_type : megaraid or hpe (DRVRTYPE_MBOX or DRVRTYPE_HPE)
* @drv_data : Driver specific; not touched by the common module
* @timeout : timeout for issued kiocs
* @max_kioc : Maximum ioctl packets acceptable by the lld
* @pdev : pci dev; used for allocating dma'ble memory
* @issue_uioc : Driver supplied routine to issue uioc_t commands
* : issue_uioc(drvr_data, kioc, ISSUE/ABORT, uioc_done)
* @quiescent : flag to indicate if ioctl can be issued to this adp
* @list : attach with the global list of adapters
* @kioc_list : block of mem for @max_kioc number of kiocs
* @kioc_pool : pool of free kiocs
* @kioc_pool_lock : protection for free pool
* @kioc_semaphore : so as not to exceed @max_kioc parallel ioctls
* @mbox_list : block of mem for @max_kioc number of mboxes
* @pthru_dma_pool : DMA pool to allocate passthru packets
* @dma_pool_list : array of dma pools
*/
typedef struct mraid_mmadp {
/* Filled by driver */
uint32_t unique_id;
uint32_t drvr_type;
unsigned long drvr_data;
uint16_t timeout;
uint8_t max_kioc;
struct pci_dev *pdev;
int(*issue_uioc)(unsigned long, uioc_t *, uint32_t);
/* Maintained by common module */
uint32_t quiescent;
struct list_head list;
uioc_t *kioc_list;
struct list_head kioc_pool;
spinlock_t kioc_pool_lock;
struct semaphore kioc_semaphore;
mbox64_t *mbox_list;
struct dma_pool *pthru_dma_pool;
mm_dmapool_t dma_pool_list[MAX_DMA_POOLS];
} mraid_mmadp_t;
int mraid_mm_register_adp(mraid_mmadp_t *);
int mraid_mm_unregister_adp(uint32_t);
uint32_t mraid_mm_adapter_app_handle(uint32_t);
#endif /* _MEGARAID_IOCTL_H_ */

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/*
*
* Linux MegaRAID device driver
*
* Copyright (c) 2003-2004 LSI Logic Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* FILE : megaraid_mbox.h
*/
#ifndef _MEGARAID_H_
#define _MEGARAID_H_
#include "mega_common.h"
#include "mbox_defs.h"
#include "megaraid_ioctl.h"
#define MEGARAID_VERSION "2.20.5.1"
#define MEGARAID_EXT_VERSION "(Release Date: Thu Nov 16 15:32:35 EST 2006)"
/*
* Define some PCI values here until they are put in the kernel
*/
#define PCI_DEVICE_ID_PERC4_DI_DISCOVERY 0x000E
#define PCI_SUBSYS_ID_PERC4_DI_DISCOVERY 0x0123
#define PCI_DEVICE_ID_PERC4_SC 0x1960
#define PCI_SUBSYS_ID_PERC4_SC 0x0520
#define PCI_DEVICE_ID_PERC4_DC 0x1960
#define PCI_SUBSYS_ID_PERC4_DC 0x0518
#define PCI_DEVICE_ID_VERDE 0x0407
#define PCI_DEVICE_ID_PERC4_DI_EVERGLADES 0x000F
#define PCI_SUBSYS_ID_PERC4_DI_EVERGLADES 0x014A
#define PCI_DEVICE_ID_PERC4E_SI_BIGBEND 0x0013
#define PCI_SUBSYS_ID_PERC4E_SI_BIGBEND 0x016c
#define PCI_DEVICE_ID_PERC4E_DI_KOBUK 0x0013
#define PCI_SUBSYS_ID_PERC4E_DI_KOBUK 0x016d
#define PCI_DEVICE_ID_PERC4E_DI_CORVETTE 0x0013
#define PCI_SUBSYS_ID_PERC4E_DI_CORVETTE 0x016e
#define PCI_DEVICE_ID_PERC4E_DI_EXPEDITION 0x0013
#define PCI_SUBSYS_ID_PERC4E_DI_EXPEDITION 0x016f
#define PCI_DEVICE_ID_PERC4E_DI_GUADALUPE 0x0013
#define PCI_SUBSYS_ID_PERC4E_DI_GUADALUPE 0x0170
#define PCI_DEVICE_ID_DOBSON 0x0408
#define PCI_DEVICE_ID_MEGARAID_SCSI_320_0 0x1960
#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0 0xA520
#define PCI_DEVICE_ID_MEGARAID_SCSI_320_1 0x1960
#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1 0x0520
#define PCI_DEVICE_ID_MEGARAID_SCSI_320_2 0x1960
#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2 0x0518
#define PCI_DEVICE_ID_MEGARAID_I4_133_RAID 0x1960
#define PCI_SUBSYS_ID_MEGARAID_I4_133_RAID 0x0522
#define PCI_DEVICE_ID_MEGARAID_SATA_150_4 0x1960
#define PCI_SUBSYS_ID_MEGARAID_SATA_150_4 0x4523
#define PCI_DEVICE_ID_MEGARAID_SATA_150_6 0x1960
#define PCI_SUBSYS_ID_MEGARAID_SATA_150_6 0x0523
#define PCI_DEVICE_ID_LINDSAY 0x0409
#define PCI_DEVICE_ID_INTEL_RAID_SRCS16 0x1960
#define PCI_SUBSYS_ID_INTEL_RAID_SRCS16 0x0523
#define PCI_DEVICE_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x1960
#define PCI_SUBSYS_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x0520
#define PCI_SUBSYS_ID_PERC3_QC 0x0471
#define PCI_SUBSYS_ID_PERC3_DC 0x0493
#define PCI_SUBSYS_ID_PERC3_SC 0x0475
#define PCI_SUBSYS_ID_CERC_ATA100_4CH 0x0511
#define MBOX_MAX_SCSI_CMDS 128 // number of cmds reserved for kernel
#define MBOX_MAX_USER_CMDS 32 // number of cmds for applications
#define MBOX_DEF_CMD_PER_LUN 64 // default commands per lun
#define MBOX_DEFAULT_SG_SIZE 26 // default sg size supported by all fw
#define MBOX_MAX_SG_SIZE 32 // maximum scatter-gather list size
#define MBOX_MAX_SECTORS 128 // maximum sectors per IO
#define MBOX_TIMEOUT 30 // timeout value for internal cmds
#define MBOX_BUSY_WAIT 10 // max usec to wait for busy mailbox
#define MBOX_RESET_WAIT 180 // wait these many seconds in reset
#define MBOX_RESET_EXT_WAIT 120 // extended wait reset
#define MBOX_SYNC_WAIT_CNT 0xFFFF // wait loop index for synchronous mode
#define MBOX_SYNC_DELAY_200 200 // 200 micro-seconds
/*
* maximum transfer that can happen through the firmware commands issued
* internnaly from the driver.
*/
#define MBOX_IBUF_SIZE 4096
/**
* mbox_ccb_t - command control block specific to mailbox based controllers
* @raw_mbox : raw mailbox pointer
* @mbox : mailbox
* @mbox64 : extended mailbox
* @mbox_dma_h : maibox dma address
* @sgl64 : 64-bit scatter-gather list
* @sgl32 : 32-bit scatter-gather list
* @sgl_dma_h : dma handle for the scatter-gather list
* @pthru : passthru structure
* @pthru_dma_h : dma handle for the passthru structure
* @epthru : extended passthru structure
* @epthru_dma_h : dma handle for extended passthru structure
* @buf_dma_h : dma handle for buffers w/o sg list
*
* command control block specific to the mailbox based controllers
*/
typedef struct {
uint8_t *raw_mbox;
mbox_t *mbox;
mbox64_t *mbox64;
dma_addr_t mbox_dma_h;
mbox_sgl64 *sgl64;
mbox_sgl32 *sgl32;
dma_addr_t sgl_dma_h;
mraid_passthru_t *pthru;
dma_addr_t pthru_dma_h;
mraid_epassthru_t *epthru;
dma_addr_t epthru_dma_h;
dma_addr_t buf_dma_h;
} mbox_ccb_t;
/**
* mraid_device_t - adapter soft state structure for mailbox controllers
* @una_mbox64 : 64-bit mbox - unaligned
* @una_mbox64_dma : mbox dma addr - unaligned
* @mbox : 32-bit mbox - aligned
* @mbox64 : 64-bit mbox - aligned
* @mbox_dma : mbox dma addr - aligned
* @mailbox_lock : exclusion lock for the mailbox
* @baseport : base port of hba memory
* @baseaddr : mapped addr of hba memory
* @mbox_pool : pool of mailboxes
* @mbox_pool_handle : handle for the mailbox pool memory
* @epthru_pool : a pool for extended passthru commands
* @epthru_pool_handle : handle to the pool above
* @sg_pool : pool of scatter-gather lists for this driver
* @sg_pool_handle : handle to the pool above
* @ccb_list : list of our command control blocks
* @uccb_list : list of cmd control blocks for mgmt module
* @umbox64 : array of mailbox for user commands (cmm)
* @pdrv_state : array for state of each physical drive.
* @last_disp : flag used to show device scanning
* @hw_error : set if FW not responding
* @fast_load : If set, skip physical device scanning
* @channel_class : channel class, RAID or SCSI
* @sysfs_mtx : mutex to serialize access to sysfs res.
* @sysfs_uioc : management packet to issue FW calls from sysfs
* @sysfs_mbox64 : mailbox packet to issue FW calls from sysfs
* @sysfs_buffer : data buffer for FW commands issued from sysfs
* @sysfs_buffer_dma : DMA buffer for FW commands issued from sysfs
* @sysfs_wait_q : wait queue for sysfs operations
* @random_del_supported : set if the random deletion is supported
* @curr_ldmap : current LDID map
*
* Initialization structure for mailbox controllers: memory based and IO based
* All the fields in this structure are LLD specific and may be discovered at
* init() or start() time.
*
* NOTE: The fields of this structures are placed to minimize cache misses
*/
#define MAX_LD_EXTENDED64 64
typedef struct {
mbox64_t *una_mbox64;
dma_addr_t una_mbox64_dma;
mbox_t *mbox;
mbox64_t *mbox64;
dma_addr_t mbox_dma;
spinlock_t mailbox_lock;
unsigned long baseport;
void __iomem * baseaddr;
struct mraid_pci_blk mbox_pool[MBOX_MAX_SCSI_CMDS];
struct dma_pool *mbox_pool_handle;
struct mraid_pci_blk epthru_pool[MBOX_MAX_SCSI_CMDS];
struct dma_pool *epthru_pool_handle;
struct mraid_pci_blk sg_pool[MBOX_MAX_SCSI_CMDS];
struct dma_pool *sg_pool_handle;
mbox_ccb_t ccb_list[MBOX_MAX_SCSI_CMDS];
mbox_ccb_t uccb_list[MBOX_MAX_USER_CMDS];
mbox64_t umbox64[MBOX_MAX_USER_CMDS];
uint8_t pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
uint32_t last_disp;
int hw_error;
int fast_load;
uint8_t channel_class;
struct mutex sysfs_mtx;
uioc_t *sysfs_uioc;
mbox64_t *sysfs_mbox64;
caddr_t sysfs_buffer;
dma_addr_t sysfs_buffer_dma;
wait_queue_head_t sysfs_wait_q;
int random_del_supported;
uint16_t curr_ldmap[MAX_LD_EXTENDED64];
} mraid_device_t;
// route to raid device from adapter
#define ADAP2RAIDDEV(adp) ((mraid_device_t *)((adp)->raid_device))
#define MAILBOX_LOCK(rdev) (&(rdev)->mailbox_lock)
// Find out if this channel is a RAID or SCSI
#define IS_RAID_CH(rdev, ch) (((rdev)->channel_class >> (ch)) & 0x01)
#define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20)
#define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C)
#define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20)
#define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C)
#endif // _MEGARAID_H_
// vim: set ts=8 sw=8 tw=78:

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/*
*
* Linux MegaRAID device driver
*
* Copyright (c) 2003-2004 LSI Logic Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* FILE : megaraid_mm.h
*/
#ifndef MEGARAID_MM_H
#define MEGARAID_MM_H
#include <linux/spinlock.h>
#include <linux/fs.h>
#include <asm/uaccess.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/list.h>
#include <linux/miscdevice.h>
#include "mbox_defs.h"
#include "megaraid_ioctl.h"
#define LSI_COMMON_MOD_VERSION "2.20.2.7"
#define LSI_COMMON_MOD_EXT_VERSION \
"(Release Date: Sun Jul 16 00:01:03 EST 2006)"
#define LSI_DBGLVL dbglevel
// The smallest dma pool
#define MRAID_MM_INIT_BUFF_SIZE 4096
/**
* mimd_t : Old style ioctl packet structure (deprecated)
*
* @inlen :
* @outlen :
* @fca :
* @opcode :
* @subopcode :
* @adapno :
* @buffer :
* @pad :
* @length :
* @mbox :
* @pthru :
* @data :
* @pad :
*
* Note : This structure is DEPRECATED. New applications must use
* : uioc_t structure instead. All new hba drivers use the new
* : format. If we get this mimd packet, we will convert it into
* : new uioc_t format and send it to the hba drivers.
*/
typedef struct mimd {
uint32_t inlen;
uint32_t outlen;
union {
uint8_t fca[16];
struct {
uint8_t opcode;
uint8_t subopcode;
uint16_t adapno;
#if BITS_PER_LONG == 32
uint8_t __user *buffer;
uint8_t pad[4];
#endif
#if BITS_PER_LONG == 64
uint8_t __user *buffer;
#endif
uint32_t length;
} __attribute__ ((packed)) fcs;
} __attribute__ ((packed)) ui;
uint8_t mbox[18]; /* 16 bytes + 2 status bytes */
mraid_passthru_t pthru;
#if BITS_PER_LONG == 32
char __user *data; /* buffer <= 4096 for 0x80 commands */
char pad[4];
#endif
#if BITS_PER_LONG == 64
char __user *data;
#endif
} __attribute__ ((packed))mimd_t;
#endif // MEGARAID_MM_H
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/*
* Linux MegaRAID driver for SAS based RAID controllers
*
* Copyright (c) 2009-2012 LSI Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* FILE: megaraid_sas_fusion.h
*
* Authors: LSI Corporation
* Manoj Jose
* Sumant Patro
*
* Send feedback to: <megaraidlinux@lsi.com>
*
* Mail to: LSI Corporation, 1621 Barber Lane, Milpitas, CA 95035
* ATTN: Linuxraid
*/
#ifndef _MEGARAID_SAS_FUSION_H_
#define _MEGARAID_SAS_FUSION_H_
/* Fusion defines */
#define MEGASAS_MAX_SZ_CHAIN_FRAME 1024
#define MFI_FUSION_ENABLE_INTERRUPT_MASK (0x00000009)
#define MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE 256
#define MEGASAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST 0xF0
#define MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST 0xF1
#define MEGASAS_LOAD_BALANCE_FLAG 0x1
#define MEGASAS_DCMD_MBOX_PEND_FLAG 0x1
#define HOST_DIAG_WRITE_ENABLE 0x80
#define HOST_DIAG_RESET_ADAPTER 0x4
#define MEGASAS_FUSION_MAX_RESET_TRIES 3
#define MAX_MSIX_QUEUES_FUSION 128
/* Invader defines */
#define MPI2_TYPE_CUDA 0x2
#define MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH 0x4000
#define MR_RL_FLAGS_GRANT_DESTINATION_CPU0 0x00
#define MR_RL_FLAGS_GRANT_DESTINATION_CPU1 0x10
#define MR_RL_FLAGS_GRANT_DESTINATION_CUDA 0x80
#define MR_RL_FLAGS_SEQ_NUM_ENABLE 0x8
/* T10 PI defines */
#define MR_PROT_INFO_TYPE_CONTROLLER 0x8
#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f
#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9
#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB
#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18
#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20
#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60
#define MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C)
#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
/*
* Raid context flags
*/
#define MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT 0x4
#define MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_MASK 0x30
enum MR_RAID_FLAGS_IO_SUB_TYPE {
MR_RAID_FLAGS_IO_SUB_TYPE_NONE = 0,
MR_RAID_FLAGS_IO_SUB_TYPE_SYSTEM_PD = 1,
};
/*
* Request descriptor types
*/
#define MEGASAS_REQ_DESCRIPT_FLAGS_LD_IO 0x7
#define MEGASAS_REQ_DESCRIPT_FLAGS_MFA 0x1
#define MEGASAS_REQ_DESCRIPT_FLAGS_NO_LOCK 0x2
#define MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 1
#define MEGASAS_FP_CMD_LEN 16
#define MEGASAS_FUSION_IN_RESET 0
#define THRESHOLD_REPLY_COUNT 50
/*
* Raid Context structure which describes MegaRAID specific IO Parameters
* This resides at offset 0x60 where the SGL normally starts in MPT IO Frames
*/
struct RAID_CONTEXT {
#if defined(__BIG_ENDIAN_BITFIELD)
u8 nseg:4;
u8 Type:4;
#else
u8 Type:4;
u8 nseg:4;
#endif
u8 resvd0;
u16 timeoutValue;
u8 regLockFlags;
u8 resvd1;
u16 VirtualDiskTgtId;
u64 regLockRowLBA;
u32 regLockLength;
u16 nextLMId;
u8 exStatus;
u8 status;
u8 RAIDFlags;
u8 numSGE;
u16 configSeqNum;
u8 spanArm;
u8 resvd2[3];
};
#define RAID_CTX_SPANARM_ARM_SHIFT (0)
#define RAID_CTX_SPANARM_ARM_MASK (0x1f)
#define RAID_CTX_SPANARM_SPAN_SHIFT (5)
#define RAID_CTX_SPANARM_SPAN_MASK (0xE0)
/*
* define region lock types
*/
enum REGION_TYPE {
REGION_TYPE_UNUSED = 0,
REGION_TYPE_SHARED_READ = 1,
REGION_TYPE_SHARED_WRITE = 2,
REGION_TYPE_EXCLUSIVE = 3,
};
/* MPI2 defines */
#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
#define MPI2_WHOINIT_HOST_DRIVER (0x04)
#define MPI2_VERSION_MAJOR (0x02)
#define MPI2_VERSION_MINOR (0x00)
#define MPI2_VERSION_MAJOR_MASK (0xFF00)
#define MPI2_VERSION_MAJOR_SHIFT (8)
#define MPI2_VERSION_MINOR_MASK (0x00FF)
#define MPI2_VERSION_MINOR_SHIFT (0)
#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
MPI2_VERSION_MINOR)
#define MPI2_HEADER_VERSION_UNIT (0x10)
#define MPI2_HEADER_VERSION_DEV (0x00)
#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
#define MPI2_HEADER_VERSION_DEV_SHIFT (0)
#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | \
MPI2_HEADER_VERSION_DEV)
#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
struct MPI25_IEEE_SGE_CHAIN64 {
u64 Address;
u32 Length;
u16 Reserved1;
u8 NextChainOffset;
u8 Flags;
};
struct MPI2_SGE_SIMPLE_UNION {
u32 FlagsLength;
union {
u32 Address32;
u64 Address64;
} u;
};
struct MPI2_SCSI_IO_CDB_EEDP32 {
u8 CDB[20]; /* 0x00 */
u32 PrimaryReferenceTag; /* 0x14 */
u16 PrimaryApplicationTag; /* 0x18 */
u16 PrimaryApplicationTagMask; /* 0x1A */
u32 TransferLength; /* 0x1C */
};
struct MPI2_SGE_CHAIN_UNION {
u16 Length;
u8 NextChainOffset;
u8 Flags;
union {
u32 Address32;
u64 Address64;
} u;
};
struct MPI2_IEEE_SGE_SIMPLE32 {
u32 Address;
u32 FlagsLength;
};
struct MPI2_IEEE_SGE_CHAIN32 {
u32 Address;
u32 FlagsLength;
};
struct MPI2_IEEE_SGE_SIMPLE64 {
u64 Address;
u32 Length;
u16 Reserved1;
u8 Reserved2;
u8 Flags;
};
struct MPI2_IEEE_SGE_CHAIN64 {
u64 Address;
u32 Length;
u16 Reserved1;
u8 Reserved2;
u8 Flags;
};
union MPI2_IEEE_SGE_SIMPLE_UNION {
struct MPI2_IEEE_SGE_SIMPLE32 Simple32;
struct MPI2_IEEE_SGE_SIMPLE64 Simple64;
};
union MPI2_IEEE_SGE_CHAIN_UNION {
struct MPI2_IEEE_SGE_CHAIN32 Chain32;
struct MPI2_IEEE_SGE_CHAIN64 Chain64;
};
union MPI2_SGE_IO_UNION {
struct MPI2_SGE_SIMPLE_UNION MpiSimple;
struct MPI2_SGE_CHAIN_UNION MpiChain;
union MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
union MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
};
union MPI2_SCSI_IO_CDB_UNION {
u8 CDB32[32];
struct MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
struct MPI2_SGE_SIMPLE_UNION SGE;
};
/*
* RAID SCSI IO Request Message
* Total SGE count will be one less than _MPI2_SCSI_IO_REQUEST
*/
struct MPI2_RAID_SCSI_IO_REQUEST {
u16 DevHandle; /* 0x00 */
u8 ChainOffset; /* 0x02 */
u8 Function; /* 0x03 */
u16 Reserved1; /* 0x04 */
u8 Reserved2; /* 0x06 */
u8 MsgFlags; /* 0x07 */
u8 VP_ID; /* 0x08 */
u8 VF_ID; /* 0x09 */
u16 Reserved3; /* 0x0A */
u32 SenseBufferLowAddress; /* 0x0C */
u16 SGLFlags; /* 0x10 */
u8 SenseBufferLength; /* 0x12 */
u8 Reserved4; /* 0x13 */
u8 SGLOffset0; /* 0x14 */
u8 SGLOffset1; /* 0x15 */
u8 SGLOffset2; /* 0x16 */
u8 SGLOffset3; /* 0x17 */
u32 SkipCount; /* 0x18 */
u32 DataLength; /* 0x1C */
u32 BidirectionalDataLength; /* 0x20 */
u16 IoFlags; /* 0x24 */
u16 EEDPFlags; /* 0x26 */
u32 EEDPBlockSize; /* 0x28 */
u32 SecondaryReferenceTag; /* 0x2C */
u16 SecondaryApplicationTag; /* 0x30 */
u16 ApplicationTagTranslationMask; /* 0x32 */
u8 LUN[8]; /* 0x34 */
u32 Control; /* 0x3C */
union MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
struct RAID_CONTEXT RaidContext; /* 0x60 */
union MPI2_SGE_IO_UNION SGL; /* 0x80 */
};
/*
* MPT RAID MFA IO Descriptor.
*/
struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR {
u32 RequestFlags:8;
u32 MessageAddress1:24;
u32 MessageAddress2;
};
/* Default Request Descriptor */
struct MPI2_DEFAULT_REQUEST_DESCRIPTOR {
u8 RequestFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u16 LMID; /* 0x04 */
u16 DescriptorTypeDependent; /* 0x06 */
};
/* High Priority Request Descriptor */
struct MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR {
u8 RequestFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u16 LMID; /* 0x04 */
u16 Reserved1; /* 0x06 */
};
/* SCSI IO Request Descriptor */
struct MPI2_SCSI_IO_REQUEST_DESCRIPTOR {
u8 RequestFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u16 LMID; /* 0x04 */
u16 DevHandle; /* 0x06 */
};
/* SCSI Target Request Descriptor */
struct MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR {
u8 RequestFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u16 LMID; /* 0x04 */
u16 IoIndex; /* 0x06 */
};
/* RAID Accelerator Request Descriptor */
struct MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR {
u8 RequestFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u16 LMID; /* 0x04 */
u16 Reserved; /* 0x06 */
};
/* union of Request Descriptors */
union MEGASAS_REQUEST_DESCRIPTOR_UNION {
struct MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
struct MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
struct MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
struct MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
struct MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR MFAIo;
union {
struct {
u32 low;
u32 high;
} u;
u64 Words;
};
};
/* Default Reply Descriptor */
struct MPI2_DEFAULT_REPLY_DESCRIPTOR {
u8 ReplyFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 DescriptorTypeDependent1; /* 0x02 */
u32 DescriptorTypeDependent2; /* 0x04 */
};
/* Address Reply Descriptor */
struct MPI2_ADDRESS_REPLY_DESCRIPTOR {
u8 ReplyFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u32 ReplyFrameAddress; /* 0x04 */
};
/* SCSI IO Success Reply Descriptor */
struct MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR {
u8 ReplyFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u16 TaskTag; /* 0x04 */
u16 Reserved1; /* 0x06 */
};
/* TargetAssist Success Reply Descriptor */
struct MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR {
u8 ReplyFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u8 SequenceNumber; /* 0x04 */
u8 Reserved1; /* 0x05 */
u16 IoIndex; /* 0x06 */
};
/* Target Command Buffer Reply Descriptor */
struct MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR {
u8 ReplyFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u8 VP_ID; /* 0x02 */
u8 Flags; /* 0x03 */
u16 InitiatorDevHandle; /* 0x04 */
u16 IoIndex; /* 0x06 */
};
/* RAID Accelerator Success Reply Descriptor */
struct MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR {
u8 ReplyFlags; /* 0x00 */
u8 MSIxIndex; /* 0x01 */
u16 SMID; /* 0x02 */
u32 Reserved; /* 0x04 */
};
/* union of Reply Descriptors */
union MPI2_REPLY_DESCRIPTORS_UNION {
struct MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
struct MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
struct MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
struct MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
struct MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
struct MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR
RAIDAcceleratorSuccess;
u64 Words;
};
/* IOCInit Request message */
struct MPI2_IOC_INIT_REQUEST {
u8 WhoInit; /* 0x00 */
u8 Reserved1; /* 0x01 */
u8 ChainOffset; /* 0x02 */
u8 Function; /* 0x03 */
u16 Reserved2; /* 0x04 */
u8 Reserved3; /* 0x06 */
u8 MsgFlags; /* 0x07 */
u8 VP_ID; /* 0x08 */
u8 VF_ID; /* 0x09 */
u16 Reserved4; /* 0x0A */
u16 MsgVersion; /* 0x0C */
u16 HeaderVersion; /* 0x0E */
u32 Reserved5; /* 0x10 */
u16 Reserved6; /* 0x14 */
u8 Reserved7; /* 0x16 */
u8 HostMSIxVectors; /* 0x17 */
u16 Reserved8; /* 0x18 */
u16 SystemRequestFrameSize; /* 0x1A */
u16 ReplyDescriptorPostQueueDepth; /* 0x1C */
u16 ReplyFreeQueueDepth; /* 0x1E */
u32 SenseBufferAddressHigh; /* 0x20 */
u32 SystemReplyAddressHigh; /* 0x24 */
u64 SystemRequestFrameBaseAddress; /* 0x28 */
u64 ReplyDescriptorPostQueueAddress;/* 0x30 */
u64 ReplyFreeQueueAddress; /* 0x38 */
u64 TimeStamp; /* 0x40 */
};
/* mrpriv defines */
#define MR_PD_INVALID 0xFFFF
#define MAX_SPAN_DEPTH 8
#define MAX_QUAD_DEPTH MAX_SPAN_DEPTH
#define MAX_RAIDMAP_SPAN_DEPTH (MAX_SPAN_DEPTH)
#define MAX_ROW_SIZE 32
#define MAX_RAIDMAP_ROW_SIZE (MAX_ROW_SIZE)
#define MAX_LOGICAL_DRIVES 64
#define MAX_LOGICAL_DRIVES_EXT 256
#define MAX_RAIDMAP_LOGICAL_DRIVES (MAX_LOGICAL_DRIVES)
#define MAX_RAIDMAP_VIEWS (MAX_LOGICAL_DRIVES)
#define MAX_ARRAYS 128
#define MAX_RAIDMAP_ARRAYS (MAX_ARRAYS)
#define MAX_ARRAYS_EXT 256
#define MAX_API_ARRAYS_EXT (MAX_ARRAYS_EXT)
#define MAX_PHYSICAL_DEVICES 256
#define MAX_RAIDMAP_PHYSICAL_DEVICES (MAX_PHYSICAL_DEVICES)
#define MR_DCMD_LD_MAP_GET_INFO 0x0300e101
#define MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC 0x010e8485 /* SR-IOV HB alloc*/
#define MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111 0x03200200
#define MR_DCMD_LD_VF_MAP_GET_ALL_LDS 0x03150200
struct MR_DEV_HANDLE_INFO {
u16 curDevHdl;
u8 validHandles;
u8 reserved;
u16 devHandle[2];
};
struct MR_ARRAY_INFO {
u16 pd[MAX_RAIDMAP_ROW_SIZE];
};
struct MR_QUAD_ELEMENT {
u64 logStart;
u64 logEnd;
u64 offsetInSpan;
u32 diff;
u32 reserved1;
};
struct MR_SPAN_INFO {
u32 noElements;
u32 reserved1;
struct MR_QUAD_ELEMENT quad[MAX_RAIDMAP_SPAN_DEPTH];
};
struct MR_LD_SPAN {
u64 startBlk;
u64 numBlks;
u16 arrayRef;
u8 spanRowSize;
u8 spanRowDataSize;
u8 reserved[4];
};
struct MR_SPAN_BLOCK_INFO {
u64 num_rows;
struct MR_LD_SPAN span;
struct MR_SPAN_INFO block_span_info;
};
struct MR_LD_RAID {
struct {
#if defined(__BIG_ENDIAN_BITFIELD)
u32 reserved4:7;
u32 fpNonRWCapable:1;
u32 fpReadAcrossStripe:1;
u32 fpWriteAcrossStripe:1;
u32 fpReadCapable:1;
u32 fpWriteCapable:1;
u32 encryptionType:8;
u32 pdPiMode:4;
u32 ldPiMode:4;
u32 reserved5:3;
u32 fpCapable:1;
#else
u32 fpCapable:1;
u32 reserved5:3;
u32 ldPiMode:4;
u32 pdPiMode:4;
u32 encryptionType:8;
u32 fpWriteCapable:1;
u32 fpReadCapable:1;
u32 fpWriteAcrossStripe:1;
u32 fpReadAcrossStripe:1;
u32 fpNonRWCapable:1;
u32 reserved4:7;
#endif
} capability;
u32 reserved6;
u64 size;
u8 spanDepth;
u8 level;
u8 stripeShift;
u8 rowSize;
u8 rowDataSize;
u8 writeMode;
u8 PRL;
u8 SRL;
u16 targetId;
u8 ldState;
u8 regTypeReqOnWrite;
u8 modFactor;
u8 regTypeReqOnRead;
u16 seqNum;
struct {
u32 ldSyncRequired:1;
u32 reserved:31;
} flags;
u8 LUN[8]; /* 0x24 8 byte LUN field used for SCSI IO's */
u8 fpIoTimeoutForLd;/*0x2C timeout value used by driver in FP IO*/
u8 reserved3[0x80-0x2D]; /* 0x2D */
};
struct MR_LD_SPAN_MAP {
struct MR_LD_RAID ldRaid;
u8 dataArmMap[MAX_RAIDMAP_ROW_SIZE];
struct MR_SPAN_BLOCK_INFO spanBlock[MAX_RAIDMAP_SPAN_DEPTH];
};
struct MR_FW_RAID_MAP {
u32 totalSize;
union {
struct {
u32 maxLd;
u32 maxSpanDepth;
u32 maxRowSize;
u32 maxPdCount;
u32 maxArrays;
} validationInfo;
u32 version[5];
};
u32 ldCount;
u32 Reserved1;
u8 ldTgtIdToLd[MAX_RAIDMAP_LOGICAL_DRIVES+
MAX_RAIDMAP_VIEWS];
u8 fpPdIoTimeoutSec;
u8 reserved2[7];
struct MR_ARRAY_INFO arMapInfo[MAX_RAIDMAP_ARRAYS];
struct MR_DEV_HANDLE_INFO devHndlInfo[MAX_RAIDMAP_PHYSICAL_DEVICES];
struct MR_LD_SPAN_MAP ldSpanMap[1];
};
struct IO_REQUEST_INFO {
u64 ldStartBlock;
u32 numBlocks;
u16 ldTgtId;
u8 isRead;
u16 devHandle;
u64 pdBlock;
u8 fpOkForIo;
u8 IoforUnevenSpan;
u8 start_span;
u8 reserved;
u64 start_row;
u8 span_arm; /* span[7:5], arm[4:0] */
u8 pd_after_lb;
};
struct MR_LD_TARGET_SYNC {
u8 targetId;
u8 reserved;
u16 seqNum;
};
#define IEEE_SGE_FLAGS_ADDR_MASK (0x03)
#define IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
#define IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
#define IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
#define IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
#define IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
#define IEEE_SGE_FLAGS_END_OF_LIST (0x40)
struct megasas_register_set;
struct megasas_instance;
union desc_word {
u64 word;
struct {
u32 low;
u32 high;
} u;
};
struct megasas_cmd_fusion {
struct MPI2_RAID_SCSI_IO_REQUEST *io_request;
dma_addr_t io_request_phys_addr;
union MPI2_SGE_IO_UNION *sg_frame;
dma_addr_t sg_frame_phys_addr;
u8 *sense;
dma_addr_t sense_phys_addr;
struct list_head list;
struct scsi_cmnd *scmd;
struct megasas_instance *instance;
u8 retry_for_fw_reset;
union MEGASAS_REQUEST_DESCRIPTOR_UNION *request_desc;
/*
* Context for a MFI frame.
* Used to get the mfi cmd from list when a MFI cmd is completed
*/
u32 sync_cmd_idx;
u32 index;
u8 flags;
u8 pd_r1_lb;
};
struct LD_LOAD_BALANCE_INFO {
u8 loadBalanceFlag;
u8 reserved1;
atomic_t scsi_pending_cmds[MAX_PHYSICAL_DEVICES];
u64 last_accessed_block[MAX_PHYSICAL_DEVICES];
};
/* SPAN_SET is info caclulated from span info from Raid map per LD */
typedef struct _LD_SPAN_SET {
u64 log_start_lba;
u64 log_end_lba;
u64 span_row_start;
u64 span_row_end;
u64 data_strip_start;
u64 data_strip_end;
u64 data_row_start;
u64 data_row_end;
u8 strip_offset[MAX_SPAN_DEPTH];
u32 span_row_data_width;
u32 diff;
u32 reserved[2];
} LD_SPAN_SET, *PLD_SPAN_SET;
typedef struct LOG_BLOCK_SPAN_INFO {
LD_SPAN_SET span_set[MAX_SPAN_DEPTH];
} LD_SPAN_INFO, *PLD_SPAN_INFO;
struct MR_FW_RAID_MAP_ALL {
struct MR_FW_RAID_MAP raidMap;
struct MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES - 1];
} __attribute__ ((packed));
struct MR_DRV_RAID_MAP {
/* total size of this structure, including this field.
* This feild will be manupulated by driver for ext raid map,
* else pick the value from firmware raid map.
*/
u32 totalSize;
union {
struct {
u32 maxLd;
u32 maxSpanDepth;
u32 maxRowSize;
u32 maxPdCount;
u32 maxArrays;
} validationInfo;
u32 version[5];
};
/* timeout value used by driver in FP IOs*/
u8 fpPdIoTimeoutSec;
u8 reserved2[7];
u16 ldCount;
u16 arCount;
u16 spanCount;
u16 reserve3;
struct MR_DEV_HANDLE_INFO devHndlInfo[MAX_RAIDMAP_PHYSICAL_DEVICES];
u8 ldTgtIdToLd[MAX_LOGICAL_DRIVES_EXT];
struct MR_ARRAY_INFO arMapInfo[MAX_API_ARRAYS_EXT];
struct MR_LD_SPAN_MAP ldSpanMap[1];
};
/* Driver raid map size is same as raid map ext
* MR_DRV_RAID_MAP_ALL is created to sync with old raid.
* And it is mainly for code re-use purpose.
*/
struct MR_DRV_RAID_MAP_ALL {
struct MR_DRV_RAID_MAP raidMap;
struct MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES_EXT - 1];
} __packed;
struct MR_FW_RAID_MAP_EXT {
/* Not usred in new map */
u32 reserved;
union {
struct {
u32 maxLd;
u32 maxSpanDepth;
u32 maxRowSize;
u32 maxPdCount;
u32 maxArrays;
} validationInfo;
u32 version[5];
};
u8 fpPdIoTimeoutSec;
u8 reserved2[7];
u16 ldCount;
u16 arCount;
u16 spanCount;
u16 reserve3;
struct MR_DEV_HANDLE_INFO devHndlInfo[MAX_RAIDMAP_PHYSICAL_DEVICES];
u8 ldTgtIdToLd[MAX_LOGICAL_DRIVES_EXT];
struct MR_ARRAY_INFO arMapInfo[MAX_API_ARRAYS_EXT];
struct MR_LD_SPAN_MAP ldSpanMap[MAX_LOGICAL_DRIVES_EXT];
};
struct fusion_context {
struct megasas_cmd_fusion **cmd_list;
struct list_head cmd_pool;
spinlock_t mpt_pool_lock;
dma_addr_t req_frames_desc_phys;
u8 *req_frames_desc;
struct dma_pool *io_request_frames_pool;
dma_addr_t io_request_frames_phys;
u8 *io_request_frames;
struct dma_pool *sg_dma_pool;
struct dma_pool *sense_dma_pool;
dma_addr_t reply_frames_desc_phys;
union MPI2_REPLY_DESCRIPTORS_UNION *reply_frames_desc;
struct dma_pool *reply_frames_desc_pool;
u16 last_reply_idx[MAX_MSIX_QUEUES_FUSION];
u32 reply_q_depth;
u32 request_alloc_sz;
u32 reply_alloc_sz;
u32 io_frames_alloc_sz;
u16 max_sge_in_main_msg;
u16 max_sge_in_chain;
u8 chain_offset_io_request;
u8 chain_offset_mfi_pthru;
struct MR_FW_RAID_MAP_ALL *ld_map[2];
dma_addr_t ld_map_phys[2];
/*Non dma-able memory. Driver local copy.*/
struct MR_DRV_RAID_MAP_ALL *ld_drv_map[2];
u32 max_map_sz;
u32 current_map_sz;
u32 old_map_sz;
u32 new_map_sz;
u32 drv_map_sz;
u32 drv_map_pages;
u8 fast_path_io;
struct LD_LOAD_BALANCE_INFO load_balance_info[MAX_LOGICAL_DRIVES_EXT];
LD_SPAN_INFO log_to_span[MAX_LOGICAL_DRIVES_EXT];
};
union desc_value {
u64 word;
struct {
u32 low;
u32 high;
} u;
};
#endif /* _MEGARAID_SAS_FUSION_H_ */