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Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
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424
drivers/soc/samsung/pwrcal/S5E8890/S5E8890-vclk.h Normal file
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#ifndef __EXYNOS8890_VCLK_H__
#define __EXYNOS8890_VCLK_H__
enum {
invalid_vclk_id = 0x00000FFF,
gate_apollo_ppmu = 0x0A000000,
gate_apollo_bts,
gate_mngs_ppmu,
gate_mngs_bts,
gate_aud_common,
gate_aud_lpass,
gate_aud_mi2s,
gate_aud_pcm,
gate_aud_uart,
gate_aud_dma,
gate_aud_slimbus,
gate_aud_sysmmu,
gate_aud_ppmu,
gate_aud_bts,
gate_aud_sclk_mi2s,
gate_aud_sclk_pcm,
gate_aud_sclk_slimbus,
gate_bus0_display,
gate_bus0_cam,
gate_bus0_fsys1,
gate_bus1_mfc,
gate_bus1_mscl,
gate_bus1_fsys0,
gate_cam0_common,
gate_cam0_csis0,
gate_cam0_csis1,
gate_cam0_fimc_bns,
gate_cam0_fimc_3aa0,
gate_cam0_fimc_3aa1,
gate_cam0_hpm,
gate_cam0_sysmmu,
gate_cam0_ppmu,
gate_cam0_bts,
gate_cam0_phyclk_hs0_csis0_rx_byte,
gate_cam0_phyclk_hs1_csis0_rx_byte,
gate_cam0_phyclk_hs2_csis0_rx_byte,
gate_cam0_phyclk_hs3_csis0_rx_byte,
gate_cam0_phyclk_hs0_csis1_rx_byte,
gate_cam0_phyclk_hs1_csis1_rx_byte,
gate_cam1_common,
gate_cam1_isp_cpu_gic_common,
gate_cam1_isp_cpu,
gate_cam1_gic_is,
gate_cam1_csis2,
gate_cam1_csis3,
gate_cam1_fimc_vra,
gate_cam1_mc_scaler,
gate_cam1_i2c0_isp,
gate_cam1_i2c1_isp,
gate_cam1_i2c2_isp,
gate_cam1_i2c3_isp,
gate_cam1_wdt_isp,
gate_cam1_mcuctl_isp,
gate_cam1_uart_isp,
gate_cam1_sclk_uart_isp,
gate_cam1_spi0_isp,
gate_cam1_spi1_isp,
gate_cam1_pdma_isp,
gate_cam1_pwm_isp,
gate_cam1_sclk_pwm_isp,
gate_cam1_sysmmu,
gate_cam1_ppmu,
gate_cam1_bts,
gate_cam1_phyclk_hs0_csis2_rx_byte,
gate_cam1_phyclk_hs1_csis2_rx_byte,
gate_cam1_phyclk_hs2_csis2_rx_byte,
gate_cam1_phyclk_hs3_csis2_rx_byte,
gate_cam1_phyclk_hs0_csis3_rx_byte,
gate_ccore_i2c,
gate_disp0_common,
gate_disp0_decon0,
gate_disp0_dsim0,
gate_disp0_dsim1,
gate_disp0_dsim2,
gate_disp0_hdmi,
gate_disp0_dp,
gate_disp0_hpm_apbif_disp0,
gate_disp0_sysmmu,
gate_disp0_ppmu,
gate_disp0_bts,
gate_disp0_phyclk_hdmiphy_tmds_20b_clko,
gate_disp0_phyclk_hdmiphy_tmds_10b_clko,
gate_disp0_phyclk_hdmiphy_pixel_clko,
gate_disp0_phyclk_mipidphy0_rxclkesc0,
gate_disp0_phyclk_mipidphy0_bitclkdiv8,
gate_disp0_phyclk_mipidphy1_rxclkesc0,
gate_disp0_phyclk_mipidphy1_bitclkdiv8,
gate_disp0_phyclk_mipidphy2_rxclkesc0,
gate_disp0_phyclk_mipidphy2_bitclkdiv8,
gate_disp0_phyclk_dpphy_ch0_txd_clk,
gate_disp0_phyclk_dpphy_ch1_txd_clk,
gate_disp0_phyclk_dpphy_ch2_txd_clk,
gate_disp0_phyclk_dpphy_ch3_txd_clk,
gate_disp0_oscclk_dp_i_clk_24m,
gate_disp0_oscclk_i_dptx_phy_i_ref_clk_24m,
gate_disp0_oscclk_i_mipi_dphy_m1s0_m_xi,
gate_disp0_oscclk_i_mipi_dphy_m4s0_m_xi,
gate_disp0_oscclk_i_mipi_dphy_m4s4_m_xi,
gate_disp1_common,
gate_disp1_decon1,
gate_disp1_hpmdisp1,
gate_disp1_sysmmu,
gate_disp1_ppmu,
gate_disp1_bts,
gate_fsys0_common,
gate_fsys0_usbdrd_etrusb_common,
gate_fsys0_usbdrd30,
gate_fsys0_etr_usb,
gate_fsys0_usbhost20,
gate_fsys0_mmc0_ufs_common,
gate_fsys0_mmc0,
gate_fsys0_ufs_linkemedded,
gate_fsys0_pdma_common,
gate_fsys0_pdma0,
gate_fsys0_pdmas,
gate_fsys0_ppmu,
gate_fsys0_bts,
gate_fsys0_hpm,
gate_fsys0_phyclk_usbdrd30_udrd30_phyclock,
gate_fsys0_phyclk_usbdrd30_udrd30_pipe_pclk,
gate_fsys0_phyclk_ufs_tx0_symbol,
gate_fsys0_phyclk_ufs_rx0_symbol,
gate_fsys0_phyclk_usbhost20_phyclock,
gate_fsys0_phyclk_usbhost20_freeclk,
gate_fsys0_phyclk_usbhost20_clk48mohci,
gate_fsys0_phyclk_usbhost20phy_ref_clk,
gate_fsys0_phyclk_ufs_rx_pwm_clk,
gate_fsys0_phyclk_ufs_tx_pwm_clk,
gate_fsys0_phyclk_ufs_refclk_out_soc,
gate_fsys1_common,
gate_fsys1_mmc2_ufs_common,
gate_fsys1_mmc2,
gate_fsys1_ufs20_sdcard,
gate_fsys1_sromc,
gate_fsys1_pciewifi0,
gate_fsys1_pciewifi1,
gate_fsys1_ppmu,
gate_fsys1_bts,
gate_fsys1_hpm,
gate_fsys1_phyclk_ufs_link_sdcard_tx0_symbol,
gate_fsys1_phyclk_ufs_link_sdcard_rx0_symbol,
gate_fsys1_phyclk_pcie_wifi0_tx0,
gate_fsys1_phyclk_pcie_wifi0_rx0,
gate_fsys1_phyclk_pcie_wifi1_tx0,
gate_fsys1_phyclk_pcie_wifi1_rx0,
gate_fsys1_phyclk_pcie_wifi0_dig_refclk,
gate_fsys1_phyclk_pcie_wifi1_dig_refclk,
gate_fsys1_phyclk_ufs_link_sdcard_rx_pwm_clk,
gate_fsys1_phyclk_ufs_link_sdcard_tx_pwm_clk,
gate_fsys1_phyclk_ufs_link_sdcard_refclk_out_soc,
gate_g3d_common,
gate_g3d_g3d_common,
gate_g3d_g3d,
gate_g3d_iram_path_test,
gate_g3d_ppmu,
gate_g3d_bts,
gate_imem_common,
gate_imem_apm_sss_rtic_mc_common,
gate_imem_apm,
gate_imem_sss,
gate_imem_rtic,
gate_imem_mc,
gate_imem_intmem,
gate_imem_intmem_alv,
gate_imem_gic400,
gate_imem_ppmu,
gate_isp0_common,
gate_isp0_fimc_isp0,
gate_isp0_fimc_tpu,
gate_isp0_sysmmu,
gate_isp0_ppmu,
gate_isp0_bts,
gate_isp1_fimc_isp1,
gate_isp1_sysmmu,
gate_isp1_ppmu,
gate_isp1_bts,
gate_mfc_common,
gate_mfc_mfc,
gate_mfc_hpm,
gate_mfc_sysmmu,
gate_mfc_ppmu,
gate_mscl_common,
gate_mscl_mscl0_jpeg_common,
gate_mscl_mscl0,
gate_mscl_jpeg,
gate_mscl_mscl1_g2d_common,
gate_mscl_mscl1,
gate_mscl_g2d,
gate_mscl_sysmmu,
gate_mscl_ppmu,
gate_mscl_bts,
gate_peric0_hsi2c0,
gate_peric0_hsi2c1,
gate_peric0_hsi2c4,
gate_peric0_hsi2c5,
gate_peric0_hsi2c9,
gate_peric0_hsi2c10,
gate_peric0_hsi2c11,
gate_peric0_uart0,
gate_peric0_adcif,
gate_peric0_pwm,
gate_peric0_sclk_pwm,
gate_peric1_hsi2c_common,
gate_peric1_hsi2c2,
gate_peric1_hsi2c3,
gate_peric1_hsi2c6,
gate_peric1_hsi2c7,
gate_peric1_hsi2c8,
gate_peric1_hsi2c12,
gate_peric1_hsi2c13,
gate_peric1_hsi2c14,
gate_peric1_spi_i2s_pcm1_spdif_common,
gate_peric1_uart1,
gate_peric1_uart2,
gate_peric1_uart3,
gate_peric1_uart4,
gate_peric1_uart5,
gate_peric1_spi0,
gate_peric1_spi1,
gate_peric1_spi2,
gate_peric1_spi3,
gate_peric1_spi4,
gate_peric1_spi5,
gate_peric1_spi6,
gate_peric1_spi7,
gate_peric1_i2s1,
gate_peric1_pcm1,
gate_peric1_spdif,
gate_peric1_gpio_nfc,
gate_peric1_gpio_touch,
gate_peric1_gpio_fp,
gate_peric1_gpio_ese,
gate_peris_sfr_apbif_hdmi_cec,
gate_peris_hpm,
gate_peris_mct,
gate_peris_wdt_mngs,
gate_peris_wdt_apollo,
gate_peris_sysreg_peris,
gate_peris_monocnt_apbif,
gate_peris_rtc_apbif,
gate_peris_top_rtc,
gate_peris_otp_con_top,
gate_peris_chipid,
gate_peris_tmu,
vclk_group_grpgate_end,
num_of_grpgate = vclk_group_grpgate_end - 0x0A000000,
sclk_decon0_eclk0 = 0x0A010000,
sclk_decon0_vclk0,
sclk_decon0_vclk1,
sclk_hdmi_audio,
sclk_decon1_eclk0,
sclk_decon1_eclk1,
sclk_usbdrd30,
sclk_mmc0,
sclk_ufsunipro20,
sclk_phy24m,
sclk_ufsunipro_cfg,
sclk_mmc2,
sclk_ufsunipro20_sdcard,
sclk_pcie_phy,
sclk_ufsunipro_sdcard_cfg,
sclk_uart0,
sclk_spi0,
sclk_spi1,
sclk_spi2,
sclk_spi3,
sclk_spi4,
sclk_spi5,
sclk_spi6,
sclk_spi7,
sclk_uart1,
sclk_uart2,
sclk_uart3,
sclk_uart4,
sclk_uart5,
sclk_promise_int,
sclk_promise_disp,
sclk_ap2cp_mif_pll_out,
sclk_isp_spi0,
sclk_isp_spi1,
sclk_isp_uart,
sclk_isp_sensor0,
sclk_isp_sensor1,
sclk_isp_sensor2,
sclk_isp_sensor3,
sclk_decon0_eclk0_local,
sclk_decon0_vclk0_local,
sclk_decon0_vclk1_local,
sclk_decon1_eclk0_local,
sclk_decon1_eclk1_local,
vclk_group_m1d1g1_end,
num_of_m1d1g1 = vclk_group_m1d1g1_end - 0x0A010000,
p1_disp_pll = 0x0A020000,
p1_aud_pll,
p1_mfc_pll,
vclk_group_p1_end,
num_of_p1 = vclk_group_p1_end - 0x0A020000,
m1_dummy = 0x0A030000,
vclk_group_m1_end,
num_of_m1 = vclk_group_m1_end - 0x0A030000,
d1_sclk_i2s_local = 0x0A040000,
d1_sclk_pcm_local,
d1_sclk_slimbus,
d1_sclk_cp_i2s,
d1_sclk_asrc,
vclk_group_d1_end,
num_of_d1 = vclk_group_d1_end - 0x0A040000,
pxmxdx_top = 0x0A050000,
pxmxdx_mfc,
pxmxdx_mscl,
pxmxdx_imem,
pxmxdx_fsys0,
pxmxdx_fsys0_qch_usbdrd30,
pxmxdx_fsys1,
pxmxdx_disp0,
pxmxdx_disp1,
pxmxdx_aud,
pxmxdx_aud_cp,
pxmxdx_isp0_isp0,
pxmxdx_isp0_tpu,
pxmxdx_isp0_trex,
pxmxdx_isp0_pxl_asbs,
pxmxdx_isp1_isp1,
pxmxdx_cam0_csis0,
pxmxdx_cam0_csis1,
pxmxdx_cam0_csis2,
pxmxdx_cam0_csis3,
pxmxdx_cam0_3aa0,
pxmxdx_cam0_3aa1,
pxmxdx_cam0_trex,
pxmxdx_cam1_arm,
pxmxdx_cam1_vra,
pxmxdx_cam1_trex,
pxmxdx_cam1_bus,
pxmxdx_cam1_peri,
pxmxdx_cam1_csis2,
pxmxdx_cam1_csis3,
pxmxdx_cam1_scl,
pxmxdx_oscclk_nfc,
pxmxdx_oscclk_aud,
vclk_group_pxmxdx_end,
num_of_pxmxdx = vclk_group_pxmxdx_end - 0x0A050000,
umux_bus0_aclk_bus0_528 = 0x0A060000,
umux_bus0_aclk_bus0_200,
umux_bus1_aclk_bus1_528,
umux_cam0_phyclk_rxbyteclkhs0_csis0_user,
umux_cam0_phyclk_rxbyteclkhs1_csis0_user,
umux_cam0_phyclk_rxbyteclkhs2_csis0_user,
umux_cam0_phyclk_rxbyteclkhs3_csis0_user,
umux_cam0_phyclk_rxbyteclkhs0_csis1_user,
umux_cam0_phyclk_rxbyteclkhs1_csis1_user,
umux_cam1_phyclk_rxbyteclkhs0_csis2_user,
umux_cam1_phyclk_rxbyteclkhs1_csis2_user,
umux_cam1_phyclk_rxbyteclkhs2_csis2_user,
umux_cam1_phyclk_rxbyteclkhs3_csis2_user,
umux_cam1_phyclk_rxbyteclkhs0_csis3_user,
umux_disp0_phyclk_hdmiphy_pixel_clko_user,
umux_disp0_phyclk_hdmiphy_tmds_clko_user,
umux_disp0_phyclk_mipidphy0_rxclkesc0_user,
umux_disp0_phyclk_mipidphy0_bitclkdiv2_user,
umux_disp0_phyclk_mipidphy0_bitclkdiv8_user,
umux_disp0_phyclk_mipidphy1_rxclkesc0_user,
umux_disp0_phyclk_mipidphy1_bitclkdiv2_user,
umux_disp0_phyclk_mipidphy1_bitclkdiv8_user,
umux_disp0_phyclk_mipidphy2_rxclkesc0_user,
umux_disp0_phyclk_mipidphy2_bitclkdiv2_user,
umux_disp0_phyclk_mipidphy2_bitclkdiv8_user,
umux_disp0_phyclk_dpphy_ch0_txd_clk_user,
umux_disp0_phyclk_dpphy_ch1_txd_clk_user,
umux_disp0_phyclk_dpphy_ch2_txd_clk_user,
umux_disp0_phyclk_dpphy_ch3_txd_clk_user,
umux_disp1_phyclk_mipidphy0_bitclkdiv2_user,
umux_disp1_phyclk_mipidphy1_bitclkdiv2_user,
umux_disp1_phyclk_mipidphy2_bitclkdiv2_user,
umux_disp1_phyclk_disp1_hdmiphy_pixel_clko_user,
umux_fsys0_phyclk_usbdrd30_udrd30_phyclock_user,
umux_fsys0_phyclk_usbdrd30_udrd30_pipe_pclk_user,
umux_fsys0_phyclk_ufs_tx0_symbol_user,
umux_fsys0_phyclk_ufs_rx0_symbol_user,
umux_fsys0_phyclk_usbhost20_phyclock_user,
umux_fsys0_phyclk_usbhost20_freeclk_user,
umux_fsys0_phyclk_usbhost20_clk48mohci_user,
umux_fsys0_phyclk_usbhost20phy_ref_clk,
umux_fsys0_phyclk_ufs_rx_pwm_clk_user,
umux_fsys0_phyclk_ufs_tx_pwm_clk_user,
umux_fsys0_phyclk_ufs_refclk_out_soc_user,
umux_fsys1_phyclk_ufs_link_sdcard_tx0_symbol_user,
umux_fsys1_phyclk_ufs_link_sdcard_rx0_symbol_user,
umux_fsys1_phyclk_pcie_wifi0_tx0_user,
umux_fsys1_phyclk_pcie_wifi0_rx0_user,
umux_fsys1_phyclk_pcie_wifi1_tx0_user,
umux_fsys1_phyclk_pcie_wifi1_rx0_user,
umux_fsys1_phyclk_pcie_wifi0_dig_refclk_user,
umux_fsys1_phyclk_pcie_wifi1_dig_refclk_user,
umux_fsys1_phyclk_ufs_link_sdcard_rx_pwm_clk_user,
umux_fsys1_phyclk_ufs_link_sdcard_tx_pwm_clk_user,
umux_fsys1_phyclk_ufs_link_sdcard_refclk_out_soc_user,
vclk_group_umux_end,
num_of_umux = vclk_group_umux_end - 0x0A060000,
dvfs_big = 0x0A070000,
dvfs_little,
dvfs_g3d,
dvfs_mif,
dvfs_int,
dvfs_cam,
dvfs_disp,
vclk_group_dfs_end,
num_of_dfs = vclk_group_dfs_end - 0x0A070000,
};
#endif