mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-31 08:08:51 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
473
drivers/soc/samsung/pwrcal/pwrcal-cmu.c
Normal file
473
drivers/soc/samsung/pwrcal/pwrcal-cmu.c
Normal file
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@ -0,0 +1,473 @@
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#include "pwrcal-env.h"
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#include "pwrcal-clk.h"
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#include "pwrcal-rae.h"
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struct pwrcal_clk_none clk_0;
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struct pwrcal_pll clk_pll_start, clk_pll_end;
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struct pwrcal_clk_fixed_rate clk_fixed_rate_start, clk_fixed_rate_end;
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struct pwrcal_clk_fixed_factor clk_fixed_factor_start, clk_fixed_factor_end;
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struct pwrcal_mux clk_mux_start, clk_mux_end;
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struct pwrcal_div clk_div_start, clk_div_end;
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struct pwrcal_gate clk_gate_start, clk_gate_end;
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unsigned int _cal_clk_get(char *name)
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{
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int id;
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struct pwrcal_pll *pll;
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struct pwrcal_clk_fixed_rate *fixed_rate;
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struct pwrcal_clk_fixed_factor *fixed_factor;
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struct pwrcal_mux *mux;
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struct pwrcal_div *div;
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struct pwrcal_gate *gate;
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for (pll = &clk_pll_start, id = 0; pll < &clk_pll_end; pll++, id++)
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if (!strcmp(pll->clk.name, name))
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return pll_type + id;
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for (fixed_rate = &clk_fixed_rate_start, id = 0; fixed_rate < &clk_fixed_rate_end; fixed_rate++, id++)
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if (!strcmp(fixed_rate->clk.name, name))
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return fixed_rate_type + id;
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for (fixed_factor = &clk_fixed_factor_start, id = 0; fixed_factor < &clk_fixed_factor_end; fixed_factor++, id++)
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if (!strcmp(fixed_factor->clk.name, name))
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return fixed_factor_type + id;
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for (mux = &clk_mux_start, id = 0; mux < &clk_mux_end; mux++, id++)
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if (!strcmp(mux->clk.name, name))
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return mux_type + id;
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for (div = &clk_div_start, id = 0; div < &clk_div_end; div++, id++)
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if (!strcmp(div->clk.name, name))
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return div_type + id;
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for (gate = &clk_gate_start, id = 0; gate < &clk_gate_end; gate++, id++)
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if (!strcmp(gate->clk.name, name))
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return gate_type + id;
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return 0;
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}
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struct pwrcal_clk *cal_get_clk(unsigned int id)
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{
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struct pwrcal_clk *ret = NULL;
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switch (id & mask_of_type) {
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case pll_type:
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ret = &((&clk_pll_start)[id & 0x00000FFF].clk);
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break;
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case fixed_rate_type:
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ret = &((&clk_fixed_rate_start)[id & 0x00000FFF].clk);
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break;
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case fixed_factor_type:
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ret = &((&clk_fixed_factor_start)[id & 0x00000FFF].clk);
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break;
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case mux_type:
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ret = &((&clk_mux_start)[id & 0x00000FFF].clk);
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break;
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case div_type:
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ret = &((&clk_div_start)[id & 0x00000FFF].clk);
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break;
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case gate_type:
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ret = &((&clk_gate_start)[id & 0x00000FFF].clk);
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break;
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default:
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break;
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}
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return ret;
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}
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int pwrcal_gate_is_enabled(struct pwrcal_clk *clk)
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{
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return pwrcal_getbit(clk->offset, clk->shift);
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}
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int pwrcal_gate_enable(struct pwrcal_clk *clk)
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{
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pwrcal_setbit(clk->offset, clk->shift, 1);
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return 0;
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}
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int pwrcal_gate_disable(struct pwrcal_clk *clk)
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{
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pwrcal_setbit(clk->offset, clk->shift, 0);
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return 0;
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}
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int pwrcal_mux_is_enabled(struct pwrcal_clk *clk)
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{
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if (clk->enable)
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return pwrcal_getbit(clk->enable, clk->e_shift);
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return 1;
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}
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int pwrcal_mux_enable(struct pwrcal_clk *clk)
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{
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if (clk->enable)
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pwrcal_setbit(clk->enable, clk->e_shift, 1);
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return 0;
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}
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int pwrcal_mux_disable(struct pwrcal_clk *clk)
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{
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if (clk->enable)
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pwrcal_setbit(clk->enable, clk->e_shift, 0);
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return 0;
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}
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int pwrcal_mux_get_src(struct pwrcal_clk *clk)
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{
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return pwrcal_getf(clk->offset, clk->shift, TO_MASK(clk->width));
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}
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int pwrcal_mux_set_src(struct pwrcal_clk *clk, unsigned int src)
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{
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struct pwrcal_mux *mux = to_mux(clk);
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int timeout;
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unsigned int mux_stat;
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int muxgate = 1;
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if (src >= (unsigned int)(mux->num_parents))
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return -1;
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if (_pwrcal_is_private_mux_set_src(clk))
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return _pwrcal_private_mux_set_src(clk, src);
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if (mux->gate != CLK_NONE) {
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muxgate = pwrcal_gate_is_enabled(mux->gate);
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if (!muxgate)
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pwrcal_gate_enable(mux->gate);
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}
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if ((clk->id & user_mux_type) == user_mux_type && src == 1)
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pwrcal_setbit(clk->offset, 27, 0);
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pwrcal_setf(clk->offset, clk->shift, TO_MASK(clk->width), src);
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if ((clk->id & user_mux_type) == user_mux_type && src == 0)
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pwrcal_setbit(clk->offset, 27, 1);
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if ((clk->id & user_mux_type) == user_mux_type)
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return 0;
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if (clk->status) {
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for (timeout = 0;; timeout++) {
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mux_stat = pwrcal_getf(clk->status, clk->s_shift, TO_MASK(clk->s_width));
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if (mux_stat == (1 << src))
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break;
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if (timeout > CLK_WAIT_CNT)
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goto timeout_error;
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cpu_relax();
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}
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}
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if (!muxgate)
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pwrcal_gate_disable(mux->gate);
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return 0;
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timeout_error:
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pr_err("stat(=%d) check time out, \'%s\', src_num(=%d)",
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mux_stat, clk->name, src);
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return -1;
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}
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int pwrcal_mux_get_parents(struct pwrcal_clk *clk, struct pwrcal_clk **parents)
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{
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struct pwrcal_mux *mux = to_mux(clk);
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int i;
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for (i = 0; i < mux->num_parents; i++)
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parents[i] = mux->parents[i];
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return mux->num_parents;
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}
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struct pwrcal_clk *pwrcal_mux_get_parent(struct pwrcal_clk *clk)
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{
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struct pwrcal_mux *mux = to_mux(clk);
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int src;
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src = pwrcal_mux_get_src(clk);
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return mux->parents[src];
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}
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int pwrcal_div_is_enabled(struct pwrcal_clk *clk)
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{
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return 1;
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}
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int pwrcal_div_enable(struct pwrcal_clk *clk)
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{
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return 0;
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}
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int pwrcal_div_disable(struct pwrcal_clk *clk)
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{
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return 0;
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}
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unsigned int pwrcal_div_get_ratio(struct pwrcal_clk *clk)
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{
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return pwrcal_getf(clk->offset, clk->shift, TO_MASK(clk->width)) + 1;
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}
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int pwrcal_div_set_ratio(struct pwrcal_clk *clk, unsigned int ratio)
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{
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int timeout;
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unsigned int div_stat_val;
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struct pwrcal_div *div = to_div(clk);
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int divgate = 1;
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if (ratio == 0) {
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pr_err("ratio is 0. \'%s\'", clk->name);
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return -1;
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}
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if (ratio > (TO_MASK(clk->width) + 1)) {
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pr_err("ratio is bigger than max. (%d) > of (%d) \'%s\'",
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ratio,
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TO_MASK(clk->width) + 1,
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clk->name);
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return -1;
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}
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if (div->gate != CLK_NONE) {
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divgate = pwrcal_gate_is_enabled(div->gate);
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if (!divgate)
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pwrcal_gate_enable(div->gate);
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}
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pwrcal_setf(clk->offset, clk->shift, TO_MASK(clk->width), ratio - 1);
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if (clk->status != 0) {
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for (timeout = 0;; timeout++) {
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div_stat_val = pwrcal_getf(clk->status,
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clk->s_shift,
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TO_MASK(clk->s_width));
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if (0 == div_stat_val)
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break;
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if (timeout > CLK_WAIT_CNT)
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goto timeout_error;
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cpu_relax();
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}
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}
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if (!divgate)
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pwrcal_gate_disable(div->gate);
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return 0;
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timeout_error:
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pr_err("stat(=%d) check time out, \'%s\'", div_stat_val, clk->name);
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return -1;
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}
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unsigned int pwrcal_div_get_max_ratio(struct pwrcal_clk *clk)
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{
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return TO_MASK(clk->width) + 1;
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}
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struct pwrcal_clk *pwrcal_clk_get_parent(struct pwrcal_clk *clk)
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{
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struct pwrcal_mux *mux;
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unsigned int src;
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switch (clk->id & mask_of_type) {
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case fixed_rate_type:
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case fixed_factor_type:
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case pll_type:
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case div_type:
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case gate_type:
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return clk->parent;
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break;
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case mux_type:
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mux = to_mux(clk);
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src = pwrcal_mux_get_src(clk);
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return mux->parents[src];
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break;
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default:
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break;
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}
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return CLK_NONE;
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}
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unsigned long long pwrcal_clk_get_rate(struct pwrcal_clk *clk)
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{
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struct pwrcal_clk *cur = clk;
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struct pwrcal_clk_fixed_rate *frate;
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struct pwrcal_clk_fixed_factor *ffacor;
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struct pwrcal_mux *mux;
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unsigned int src;
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struct pwrcal_clk *clk_stack[32];
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unsigned int p = 0;
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unsigned long long rate = 0;
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unsigned int ratio;
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while (cur != CLK_NONE) {
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clk_stack[p++] = cur;
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switch (cur->id & mask_of_type) {
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case fixed_rate_type:
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case fixed_factor_type:
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case pll_type:
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case div_type:
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case gate_type:
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cur = cur->parent;
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break;
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case mux_type:
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mux = to_mux(cur);
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src = pwrcal_mux_get_src(cur);
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cur = mux->parents[src];
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break;
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default:
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return 0;
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}
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}
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/* calc rate */
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while (p != 0) {
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cur = clk_stack[--p];
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switch (cur->id & mask_of_type) {
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case fixed_rate_type:
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frate = to_frate(cur);
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rate = frate->fixed_rate;
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break;
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case fixed_factor_type:
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ffacor = to_ffactor(cur);
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ratio = (unsigned int)(ffacor->ratio);
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do_div(rate, ratio);
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break;
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case pll_type:
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if (pwrcal_pll_is_enabled(cur) == 0)
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return 0;
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rate = pwrcal_pll_get_rate(cur);
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break;
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case mux_type:
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if (pwrcal_mux_is_enabled(cur) == 0)
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return 0;
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break;
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case div_type:
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if (pwrcal_div_is_enabled(cur) == 0)
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return 0;
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ratio = pwrcal_div_get_ratio(cur);
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do_div(rate, ratio);
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break;
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case gate_type:
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if (pwrcal_gate_is_enabled(cur) == 0)
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return 0;
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break;
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default:
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return 0;
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}
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}
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return rate;
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}
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int pwrcal_mux_set_rate(struct pwrcal_clk *clk, unsigned long long rate)
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{
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struct pwrcal_clk *parents[48];
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int num_of_parents, i, min_diff_parent = -1;
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unsigned long long parents_rate;
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unsigned long long diff = 0xFFFFFFFFFFFFFFFF;
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num_of_parents = pwrcal_mux_get_parents(clk, parents);
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for (i = 0; i < num_of_parents; i++) {
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parents_rate = pwrcal_clk_get_rate(parents[i]);
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if (parents_rate == rate) {
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min_diff_parent = i;
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break;
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}
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if (rate > parents_rate && diff > rate - parents_rate) {
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diff = rate - parents_rate;
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min_diff_parent = i;
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}
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}
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if (min_diff_parent == -1)
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return -1;
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return pwrcal_mux_set_src(clk, min_diff_parent);
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}
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int pwrcal_div_set_rate(struct pwrcal_clk *clk, unsigned long long rate)
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{
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unsigned long long parents_rate;
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unsigned long long ratio;
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if (clk->parent == CLK_NONE)
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return -1;
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parents_rate = pwrcal_clk_get_rate(clk->parent);
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ratio = parents_rate / rate;
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if (rate < parents_rate / ratio)
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ratio += 1;
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return pwrcal_div_set_ratio(clk, ratio);
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}
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int pwrcal_clk_set_rate(struct pwrcal_clk *clk, unsigned long long rate)
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{
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int ret = -1;
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switch (clk->id & mask_of_type) {
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case pll_type:
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ret = pwrcal_pll_set_rate(clk, rate);
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break;
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case mux_type:
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ret = pwrcal_mux_set_rate(clk, rate);
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break;
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case div_type:
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ret = pwrcal_div_set_rate(clk, rate);
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break;
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default:
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break;
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}
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return ret;
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}
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int pwrcal_clk_enable(struct pwrcal_clk *clk)
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{
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int ret = -1;
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switch (clk->id & mask_of_type) {
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case pll_type:
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ret = pwrcal_pll_enable(clk);
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break;
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case mux_type:
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ret = pwrcal_mux_enable(clk);
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break;
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case div_type:
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ret = pwrcal_div_enable(clk);
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break;
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case gate_type:
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ret = pwrcal_gate_enable(clk);
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break;
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default:
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break;
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}
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return ret;
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}
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int pwrcal_clk_disable(struct pwrcal_clk *clk)
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{
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int ret = -1;
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switch (clk->id & mask_of_type) {
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case pll_type:
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ret = pwrcal_pll_disable(clk);
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break;
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case mux_type:
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ret = pwrcal_mux_disable(clk);
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break;
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case div_type:
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ret = pwrcal_div_disable(clk);
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break;
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case gate_type:
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ret = pwrcal_gate_disable(clk);
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break;
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default:
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break;
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}
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return ret;
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}
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