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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 17:18:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
315
drivers/usb/host/ohci-pci.c
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315
drivers/usb/host/ohci-pci.c
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/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
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*
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* [ Initialisation is based on Linus' ]
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* [ uhci code and gregs ohci fragments ]
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* [ (C) Copyright 1999 Linus Torvalds ]
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* [ (C) Copyright 1999 Gregory P. Smith]
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*
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* PCI Bus Glue
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*
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* This file is licenced under the GPL.
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include "ohci.h"
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#include "pci-quirks.h"
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#define DRIVER_DESC "OHCI PCI platform driver"
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static const char hcd_name[] = "ohci-pci";
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/*-------------------------------------------------------------------------*/
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static int broken_suspend(struct usb_hcd *hcd)
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{
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device_init_wakeup(&hcd->self.root_hub->dev, 0);
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return 0;
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}
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/* AMD 756, for most chips (early revs), corrupts register
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* values on read ... so enable the vendor workaround.
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*/
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static int ohci_quirk_amd756(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags = OHCI_QUIRK_AMD756;
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ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
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/* also erratum 10 (suspend/resume issues) */
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return broken_suspend(hcd);
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}
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/* Apple's OHCI driver has a lot of bizarre workarounds
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* for this chip. Evidently control and bulk lists
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* can get confused. (B&W G3 models, and ...)
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*/
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static int ohci_quirk_opti(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
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return 0;
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}
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/* Check for NSC87560. We have to look at the bridge (fn1) to
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* identify the USB (fn2). This quirk might apply to more or
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* even all NSC stuff.
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*/
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static int ohci_quirk_ns(struct usb_hcd *hcd)
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{
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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struct pci_dev *b;
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b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
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if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
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&& b->vendor == PCI_VENDOR_ID_NS) {
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags |= OHCI_QUIRK_SUPERIO;
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ohci_dbg (ohci, "Using NSC SuperIO setup\n");
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}
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pci_dev_put(b);
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return 0;
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}
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/* Check for Compaq's ZFMicro chipset, which needs short
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* delays before control or bulk queues get re-activated
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* in finish_unlinks()
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*/
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static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags |= OHCI_QUIRK_ZFMICRO;
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ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
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return 0;
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}
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/* Check for Toshiba SCC OHCI which has big endian registers
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* and little endian in memory data structures
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*/
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static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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/* That chip is only present in the southbridge of some
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* cell based platforms which are supposed to select
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* CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
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* that was the case though.
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*/
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#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
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ohci->flags |= OHCI_QUIRK_BE_MMIO;
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ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
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return 0;
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#else
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ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
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return -ENXIO;
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#endif
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}
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/* Check for NEC chip and apply quirk for allegedly lost interrupts.
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*/
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static void ohci_quirk_nec_worker(struct work_struct *work)
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{
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struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
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int status;
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status = ohci_restart(ohci);
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if (status != 0)
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ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
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"ohci_restart", status);
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}
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static int ohci_quirk_nec(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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ohci->flags |= OHCI_QUIRK_NEC;
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INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
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ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
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return 0;
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}
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static int ohci_quirk_amd700(struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci(hcd);
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if (usb_amd_find_chipset_info())
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ohci->flags |= OHCI_QUIRK_AMD_PLL;
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/* SB800 needs pre-fetch fix */
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if (usb_amd_prefetch_quirk()) {
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ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
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ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
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}
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ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
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return 0;
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}
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/* List of quirks for OHCI */
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static const struct pci_device_id ohci_pci_quirks[] = {
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{
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PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
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.driver_data = (unsigned long)ohci_quirk_amd756,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
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.driver_data = (unsigned long)ohci_quirk_opti,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
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.driver_data = (unsigned long)ohci_quirk_ns,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
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.driver_data = (unsigned long)ohci_quirk_zfmicro,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
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.driver_data = (unsigned long)ohci_quirk_toshiba_scc,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
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.driver_data = (unsigned long)ohci_quirk_nec,
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},
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{
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/* Toshiba portege 4000 */
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.vendor = PCI_VENDOR_ID_AL,
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.device = 0x5237,
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.subvendor = PCI_VENDOR_ID_TOSHIBA,
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.subdevice = 0x0004,
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.driver_data = (unsigned long) broken_suspend,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
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.driver_data = (unsigned long) broken_suspend,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
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.driver_data = (unsigned long)ohci_quirk_amd700,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
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.driver_data = (unsigned long)ohci_quirk_amd700,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
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.driver_data = (unsigned long)ohci_quirk_amd700,
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},
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/* FIXME for some of the early AMD 760 southbridges, OHCI
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* won't work at all. blacklist them.
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*/
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{},
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};
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static int ohci_pci_reset (struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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int ret = 0;
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if (hcd->self.controller) {
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const struct pci_device_id *quirk_id;
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quirk_id = pci_match_id(ohci_pci_quirks, pdev);
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if (quirk_id != NULL) {
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int (*quirk)(struct usb_hcd *ohci);
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quirk = (void *)quirk_id->driver_data;
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ret = quirk(hcd);
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}
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}
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if (ret == 0)
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ret = ohci_setup(hcd);
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/*
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* After ohci setup RWC may not be set for add-in PCI cards.
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* This transfers PCI PM wakeup capabilities.
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*/
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if (device_can_wakeup(&pdev->dev))
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ohci->hc_control |= OHCI_CTRL_RWC;
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return ret;
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}
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static struct hc_driver __read_mostly ohci_pci_hc_driver;
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static const struct ohci_driver_overrides pci_overrides __initconst = {
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.product_desc = "OHCI PCI host controller",
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.reset = ohci_pci_reset,
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};
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static const struct pci_device_id pci_ids [] = { {
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/* handle any USB OHCI controller */
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PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
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.driver_data = (unsigned long) &ohci_pci_hc_driver,
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}, {
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/* The device in the ConneXT I/O hub has no class reg */
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PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
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.driver_data = (unsigned long) &ohci_pci_hc_driver,
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}, { /* end: all zeroes */ }
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};
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MODULE_DEVICE_TABLE (pci, pci_ids);
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/* pci driver glue; this is a "new style" PCI driver module */
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static struct pci_driver ohci_pci_driver = {
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.name = (char *) hcd_name,
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.id_table = pci_ids,
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.probe = usb_hcd_pci_probe,
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.remove = usb_hcd_pci_remove,
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.shutdown = usb_hcd_pci_shutdown,
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#ifdef CONFIG_PM
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.driver = {
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.pm = &usb_hcd_pci_pm_ops
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},
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#endif
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};
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static int __init ohci_pci_init(void)
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{
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if (usb_disabled())
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return -ENODEV;
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pr_info("%s: " DRIVER_DESC "\n", hcd_name);
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ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
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#ifdef CONFIG_PM
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/* Entries for the PCI suspend/resume callbacks are special */
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ohci_pci_hc_driver.pci_suspend = ohci_suspend;
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ohci_pci_hc_driver.pci_resume = ohci_resume;
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#endif
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return pci_register_driver(&ohci_pci_driver);
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}
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module_init(ohci_pci_init);
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static void __exit ohci_pci_cleanup(void)
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{
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pci_unregister_driver(&ohci_pci_driver);
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}
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module_exit(ohci_pci_cleanup);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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MODULE_SOFTDEP("pre: ehci_pci");
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